Skip to content

Commit ca901cd

Browse files
committed
修复CI问题
1 parent f0e716d commit ca901cd

File tree

3 files changed

+6
-7
lines changed

3 files changed

+6
-7
lines changed

components/lwp/arch/common/vdso.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@
55
*
66
* Change Logs:
77
* Date Author Notes
8+
* 2024-07-04 rcitach init ver.
89
* 2025-04-22 ScuDays Add VDSO functionality under the riscv64 architecture.
910
*/
1011

components/lwp/vdso/SConscript

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -22,12 +22,10 @@ src = Glob('kernel/*.c')
2222
src +=Glob('kernel/*.S')
2323

2424

25-
26-
PREFIX = rtconfig.PREFIX
27-
CPP = PREFIX + 'cpp'
28-
CPPFLAGS= ' -E -P -x assembler-with-cpp'
29-
rtconfig.CPP = CPP
30-
rtconfig.CPPFLAGS = CPPFLAGS
25+
if not hasattr(rtconfig, 'CPP') or rtconfig.CPP is None:
26+
rtconfig.CPP = rtconfig.PREFIX + 'cpp'
27+
if not hasattr(rtconfig, 'CPPFLAGS') or rtconfig.CPPFLAGS is None:
28+
rtconfig.CPPFLAGS = ' -E -P -x assembler-with-cpp'
3129

3230
if not os.path.exists(cwd + "/user" + "/arch" +"/" + rtconfig.ARCH + "/vdso.lds"):
3331
Preprocessing("user/arch/" + rtconfig.ARCH + "/vdso.lds.S", ".lds", CPPPATH=[cwd])

components/lwp/vdso/user/arch/risc-v/vdso_sys.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@ static inline uint64_t __arch_get_hw_counter()
3434
arch_counter_enforce_ordering;
3535
return res;
3636
}
37-
37+
// 使用了rt_weak弱符号标记该函数,默认为10000000,请根据对应平台实现这个函数。
3838
rt_weak inline uint64_t __arch_get_hw_frq()
3939
{
4040
return 10000000;

0 commit comments

Comments
 (0)