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玄铁全系列RISC-V内核支持（E系列/R系列/C系列） (#10343)
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‎.github/ALL_BSP_COMPILE.json

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@@ -468,7 +468,16 @@
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"RTT_BSP": "xuantie",
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"RTT_TOOL_CHAIN": "sourcery-Xuantie-900-gcc-elf-newlib",
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"SUB_RTT_BSP": [
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"xuantie/smartl/e906"
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"xuantie/smartl/e902",
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"xuantie/smartl/e906",
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"xuantie/smartl/e907",
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"xuantie/xiaohui/c906",
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"xuantie/xiaohui/c907",
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"xuantie/xiaohui/c908",
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"xuantie/xiaohui/c910",
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"xuantie/xiaohui/r908",
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"xuantie/xiaohui/r910",
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"xuantie/xiaohui/r920"
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]
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}
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]

‎bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/gcc_flash_xiaohui.ld

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@@ -21,7 +21,7 @@ MEMORY
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DRAM : ORIGIN = 0x50000000, LENGTH = 0x100000 /* on-chip DRAM 1*1MB */
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}
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__min_heap_size = 0x200;
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__min_heap_size = 0x20000;
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PROVIDE (__ram_end = 0x50100000 - 0x8);
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PROVIDE (__heap_end = __ram_end);
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‎bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c906/startup.S

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