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Add RA4E2-EK RA Smart generate code and init uart0
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‎bsp/renesas/ra4e2-ek/.api_xml‎

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<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
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<ddscApi/>

‎bsp/renesas/ra4e2-ek/.secure_azone‎

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<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
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<azone>
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<rzone name="R7FA4E2B93CFM.rzone"/>
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<partition>
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<peripheral name="PORT0.CM33" group="PORT">
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<slot name="P000.CM33" secure="true"/>
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<slot name="P001.CM33" secure="true"/>
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<slot name="P002.CM33" secure="true"/>
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<slot name="P003.CM33" secure="true"/>
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<slot name="P004.CM33" secure="true"/>
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<slot name="P005.CM33" secure="true"/>
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<slot name="P006.CM33" secure="true"/>
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<slot name="P008.CM33" secure="true"/>
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<slot name="P013.CM33" secure="true"/>
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<slot name="P014.CM33" secure="true"/>
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<slot name="P015.CM33" secure="true"/>
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</peripheral>
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<peripheral name="PORT1.CM33" group="PORT">
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<slot name="P100.CM33" secure="true"/>
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<slot name="P101.CM33" secure="true"/>
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<slot name="P102.CM33" secure="true"/>
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<slot name="P103.CM33" secure="true"/>
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<slot name="P104.CM33" secure="true"/>
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<slot name="P105.CM33" secure="true"/>
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<slot name="P106.CM33" secure="true"/>
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<slot name="P107.CM33" secure="true"/>
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<slot name="P108.CM33" secure="true"/>
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<slot name="P109.CM33" secure="true"/>
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<slot name="P110.CM33" secure="true"/>
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<slot name="P111.CM33" secure="true"/>
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<slot name="P112.CM33" secure="true"/>
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<slot name="P113.CM33" secure="true"/>
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</peripheral>
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<peripheral name="PORT2.CM33" group="PORT">
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<slot name="P207.CM33" secure="true"/>
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</peripheral>
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<peripheral name="PORT3.CM33" group="PORT">
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<slot name="P300.CM33" secure="true"/>
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<slot name="P301.CM33" secure="true"/>
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<slot name="P302.CM33" secure="true"/>
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<slot name="P304.CM33" secure="true"/>
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</peripheral>
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<peripheral name="PORT4.CM33" group="PORT">
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<slot name="P400.CM33" secure="true"/>
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<slot name="P401.CM33" secure="true"/>
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<slot name="P402.CM33" secure="true"/>
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<slot name="P403.CM33" secure="true"/>
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<slot name="P407.CM33" secure="true"/>
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<slot name="P408.CM33" secure="true"/>
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<slot name="P409.CM33" secure="true"/>
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<slot name="P410.CM33" secure="true"/>
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<slot name="P411.CM33" secure="true"/>
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</peripheral>
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<peripheral name="PORT5.CM33" group="PORT">
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<slot name="P500.CM33" secure="true"/>
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</peripheral>
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<peripheral name="SCI0.CM33" group="SCI" security="s"/>
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<peripheral name="ICU.CM33">
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<slot name="IRQ0.CM33" secure="true"/>
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<slot name="IRQ1.CM33" secure="true"/>
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<slot name="IRQ2.CM33" secure="true"/>
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<slot name="IRQ3.CM33" secure="true"/>
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</peripheral>
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</partition>
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</azone>

‎bsp/renesas/ra4e2-ek/.secure_rzone‎

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‎bsp/renesas/ra4e2-ek/.secure_xml‎

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<raConfiguration version="11">
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<generalSettings>
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<option key="#Board#" value="board.ra4e2ek"/>
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<option key="CPU" value="RA4E2"/>
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<option key="Core" value="CM33"/>
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<option key="#TargetName#" value="R7FA4E2B93CFM"/>
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<option key="#TargetARCHITECTURE#" value="cortex-m33"/>
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<option key="#DeviceCommand#" value="R7FA4E2B9"/>
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<option key="#RTOS#" value="_none"/>
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<option key="#pinconfiguration#" value="R7FA4E2B93CFM.pincfg"/>
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<option key="#FSPVersion#" value="6.0.0"/>
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<option key="#ConfigurationFragments#" value="Renesas##BSP##Board##ra4e2_ek##"/>
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<option key="#SELECTED_TOOLCHAIN#" value="com.arm.toolchain"/>
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</generalSettings>
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<raBspConfiguration/>
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<raClockConfiguration>
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<node id="board.clock.xtal.freq" mul="20000000" option="_edit"/>
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<node id="board.clock.hoco.freq" option="board.clock.hoco.freq.20m"/>
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<node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
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<node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
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<node id="board.clock.subclk.freq" option="board.clock.subclk.freq.32768"/>
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<node id="board.clock.pll.source" option="board.clock.pll.source.xtal"/>
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<node id="board.clock.pll.div" option="board.clock.pll.div.1"/>
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<node id="board.clock.pll.mul" option="board.clock.pll.mul.100"/>
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<node id="board.clock.pll.display" option="board.clock.pll.display.value"/>
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<node id="board.clock.clock.source" option="board.clock.clock.source.pll"/>
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<node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
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<node id="board.clock.uclk.source" option="board.clock.uclk.source.disabled"/>
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<node id="board.clock.canfdclk.source" option="board.clock.canfdclk.source.disabled"/>
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<node id="board.clock.cecclk.source" option="board.clock.cecclk.source.disabled"/>
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<node id="board.clock.i3cclk.source" option="board.clock.i3cclk.source.disabled"/>
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<node id="board.clock.iclk.div" option="board.clock.iclk.div.2"/>
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<node id="board.clock.pclka.div" option="board.clock.pclka.div.2"/>
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<node id="board.clock.pclkb.div" option="board.clock.pclkb.div.4"/>
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<node id="board.clock.pclkc.div" option="board.clock.pclkc.div.4"/>
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<node id="board.clock.pclkd.div" option="board.clock.pclkd.div.2"/>
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<node id="board.clock.fclk.div" option="board.clock.fclk.div.4"/>
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<node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
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<node id="board.clock.uclk.div" option="board.clock.uclk.div.5"/>
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<node id="board.clock.canfdclk.div" option="board.clock.canfdclk.div.6"/>
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<node id="board.clock.cecclk.div" option="board.clock.cecclk.div.1"/>
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<node id="board.clock.i3cclk.div" option="board.clock.i3cclk.div.1"/>
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<node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
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<node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
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<node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
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<node id="board.clock.pclkc.display" option="board.clock.pclkc.display.value"/>
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<node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
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<node id="board.clock.fclk.display" option="board.clock.fclk.display.value"/>
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<node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
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<node id="board.clock.uclk.display" option="board.clock.uclk.display.value"/>
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<node id="board.clock.canfdclk.display" option="board.clock.canfdclk.display.value"/>
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<node id="board.clock.cecclk.display" option="board.clock.cecclk.display.value"/>
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<node id="board.clock.i3cclk.display" option="board.clock.i3cclk.display.value"/>
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</raClockConfiguration>
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<raPinConfiguration>
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<pincfg active="true" name="" symbol="">
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<configSetting altId="adc0.an000.p000" configurationId="adc0.an000" peripheral="ADC0"/>
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<configSetting altId="adc0.an001.p001" configurationId="adc0.an001" peripheral="ADC0"/>
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<configSetting altId="adc0.an002.p002" configurationId="adc0.an002" peripheral="ADC0"/>
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<configSetting altId="adc0.an004.p004" configurationId="adc0.an004" peripheral="ADC0"/>
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<configSetting altId="adc0.an011.p013" configurationId="adc0.an011" peripheral="ADC0"/>
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<configSetting altId="canfd0.crx0.p402" configurationId="canfd0.crx0" peripheral="CANFD0"/>
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<configSetting altId="canfd0.ctx0.p401" configurationId="canfd0.ctx0" peripheral="CANFD0"/>
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<configSetting altId="i3c_fslash_iic.i3c_scl.p100" configurationId="i3c_fslash_iic.i3c_scl" peripheral="I3C/IIC"/>
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<configSetting altId="i3c_fslash_iic.i3c_sda.p101" configurationId="i3c_fslash_iic.i3c_sda" peripheral="I3C/IIC"/>
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<configSetting altId="jtag_fslash_swd.swclk.p300" configurationId="jtag_fslash_swd.swclk" peripheral="JTAG/SWD"/>
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<configSetting altId="jtag_fslash_swd.swdio.p108" configurationId="jtag_fslash_swd.swdio" peripheral="JTAG/SWD"/>
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<configSetting altId="p003.input" configurationId="p003"/>
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<configSetting altId="p005.input" configurationId="p005"/>
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<configSetting altId="p006.input" configurationId="p006"/>
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<configSetting altId="p008.input" configurationId="p008"/>
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<configSetting altId="p014.input" configurationId="p014"/>
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<configSetting altId="p015.input" configurationId="p015"/>
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<configSetting altId="p102.input" configurationId="p102"/>
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<configSetting altId="p103.input" configurationId="p103"/>
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<configSetting altId="p104.output.low" configurationId="p104"/>
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<configSetting altId="p105.input" configurationId="p105"/>
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<configSetting altId="p106.input" configurationId="p106"/>
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<configSetting altId="p107.input" configurationId="p107"/>
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<configSetting altId="p112.output.low" configurationId="p112"/>
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<configSetting altId="p113.input" configurationId="p113"/>
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<configSetting altId="p207.output.low" configurationId="p207"/>
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<configSetting altId="p301.input" configurationId="p301"/>
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<configSetting altId="p302.input" configurationId="p302"/>
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<configSetting altId="p304.input" configurationId="p304"/>
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<configSetting altId="p400.output.high" configurationId="p400"/>
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<configSetting altId="p403.input" configurationId="p403"/>
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<configSetting altId="p408.input" configurationId="p408"/>
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<configSetting altId="p409.input" configurationId="p409"/>
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<configSetting altId="p500.input" configurationId="p500"/>
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<configSetting altId="sci0.rxd0.p410" configurationId="sci0.rxd0" isUsedByDriver="true" peripheral="SCI0"/>
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<configSetting altId="sci0.txd0.p411" configurationId="sci0.txd0" isUsedByDriver="true" peripheral="SCI0"/>
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<configSetting altId="sci9.rxd9.p110" configurationId="sci9.rxd9" peripheral="SCI9"/>
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<configSetting altId="sci9.sck9.p111" configurationId="sci9.sck9" peripheral="SCI9"/>
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<configSetting altId="sci9.txd9.p109" configurationId="sci9.txd9" peripheral="SCI9"/>
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<configSetting altId="usbfs.usb_vbus.p407" configurationId="usbfs.usb_vbus" peripheral="USB FS"/>
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</pincfg>
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</raPinConfiguration>
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</raConfiguration>

‎bsp/renesas/ra4e2-ek/.settings/standalone.prefs‎

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#Sun Aug 24 00:05:22 CST 2025
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com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp.scat
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com.renesas.cdt.ddsc.contentgen.options/options/suppresswarningspaths=ra/arm
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com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#Main\#\#CoreM\#\#\#\#6.1.0+fsp.6.0.0/all=1441545198,ra/arm/CMSIS_6/LICENSE|409404162,ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_armclang.h|3070162158,ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_clang.h|2642675438,ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_compiler.h|432601292,ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_gcc.h|1219721305,ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_version.h|1716662092,ra/arm/CMSIS_6/CMSIS/Core/Include/core_ca.h|3033126542,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm0.h|3716711724,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm0plus.h|1573341164,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm1.h|1528066797,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm23.h|956077447,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm3.h|3181146757,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm33.h|3422691989,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm35p.h|3011809468,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm4.h|862174236,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm52.h|3557548549,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm55.h|2145813412,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm7.h|215226313,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm85.h|3759822293,ra/arm/CMSIS_6/CMSIS/Core/Include/core_sc000.h|3285488134,ra/arm/CMSIS_6/CMSIS/Core/Include/core_sc300.h|3342995321,ra/arm/CMSIS_6/CMSIS/Core/Include/core_starmc1.h|440777068,ra/arm/CMSIS_6/CMSIS/Core/Include/tz_context.h|987654843,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_armclang_a.h|1790528804,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_clang_a.h|117658130,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_cp15.h|3644000269,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_gcc_a.h|947683335,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_iccarm_a.h|3200474466,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/irq_ctrl.h|2703360002,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv7m_cachel1.h|271089146,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv7m_mpu.h|3180041419,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv81m_pac.h|1572899130,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv8m_mpu.h|1964429271,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv8m_pmu.h|2095512231,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_armclang_m.h|2951442685,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_clang_m.h|1179088122,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_gcc_m.h|1753083115,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_iccarm_m.h|163659099,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_tiarmclang_m.h|718227869,ra/arm/CMSIS_6/CMSIS/Core/Include/r-profile/cmsis_armclang_r.h|681720804,ra/arm/CMSIS_6/CMSIS/Core/Include/r-profile/cmsis_clang_r.h|154254372,ra/arm/CMSIS_6/CMSIS/Core/Include/r-profile/cmsis_gcc_r.h
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com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#Main\#\#CoreM\#\#\#\#6.1.0+fsp.6.0.0/libraries=
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com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra4e2_ek\#\#\#\#6.0.0/all=1146129324,ra/board/ra4e2_ek/board.h|2930081608,ra/board/ra4e2_ek/board_init.c|141220042,ra/board/ra4e2_ek/board_init.h|4050150481,ra/board/ra4e2_ek/board_leds.c|4227161383,ra/board/ra4e2_ek/board_leds.h
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com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra4e2_ek\#\#\#\#6.0.0/libraries=
8+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4e2\#\#device\#\#\#\#6.0.0/all=1312083070,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E2B9.h
9+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4e2\#\#device\#\#\#\#6.0.0/libraries=
10+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4e2\#\#device\#\#R7FA4E2B93CFM\#\#6.0.0/all=
11+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4e2\#\#device\#\#R7FA4E2B93CFM\#\#6.0.0/libraries=
12+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4e2\#\#events\#\#\#\#6.0.0/all=
13+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4e2\#\#events\#\#\#\#6.0.0/libraries=
14+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4e2\#\#fsp\#\#\#\#6.0.0/all=2026942077,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|4088081372,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|3173683717,ra/fsp/src/bsp/mcu/ra4e2/bsp_elc.h|79929755,ra/fsp/src/bsp/mcu/ra4e2/bsp_feature.h|219580119,ra/fsp/src/bsp/mcu/ra4e2/bsp_linker.c|1977341195,ra/fsp/src/bsp/mcu/ra4e2/bsp_mcu_info.h|1772088223,ra/fsp/src/bsp/mcu/ra4e2/bsp_peripheral.h|2134721004,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|3593160558,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|864672585,ra/fsp/src/bsp/mcu/all/bsp_common.c|1766417223,ra/fsp/src/bsp/mcu/all/bsp_common.h|2476010042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|1391797498,ra/fsp/src/bsp/mcu/all/bsp_delay.c|1823692586,ra/fsp/src/bsp/mcu/all/bsp_delay.h|1002834645,ra/fsp/src/bsp/mcu/all/bsp_exceptions.h|3294907421,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|2982971571,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|3480596119,ra/fsp/src/bsp/mcu/all/bsp_guard.c|379456290,ra/fsp/src/bsp/mcu/all/bsp_guard.h|554349144,ra/fsp/src/bsp/mcu/all/bsp_io.c|1270173761,ra/fsp/src/bsp/mcu/all/bsp_io.h|4226258005,ra/fsp/src/bsp/mcu/all/bsp_ipc.c|2907652827,ra/fsp/src/bsp/mcu/all/bsp_ipc.h|3952374344,ra/fsp/src/bsp/mcu/all/bsp_irq.c|2972687487,ra/fsp/src/bsp/mcu/all/bsp_irq.h|1355081035,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|1712869516,ra/fsp/src/bsp/mcu/all/bsp_mmf.h|1272853908,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|3336678806,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|277796574,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|2455669964,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|659341578,ra/fsp/src/bsp/mcu/all/bsp_sdram.c|2275550317,ra/fsp/src/bsp/mcu/all/bsp_sdram.h|963966360,ra/fsp/src/bsp/mcu/all/bsp_security.c|1515045059,ra/fsp/src/bsp/mcu/all/bsp_security.h|686902729,ra/fsp/src/bsp/mcu/all/bsp_macl.c|3660402312,ra/fsp/src/bsp/mcu/all/bsp_macl.h|3202460155,ra/fsp/src/bsp/mcu/all/bsp_tfu.h|2646736735,ra/fsp/inc/fsp_features.h|678846915,ra/fsp/inc/instances/r_ioport.h|2968025458,script/fsp.scat
15+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4e2\#\#fsp\#\#\#\#6.0.0/libraries=
16+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4e2\#\#linker\#\#\#\#6.0.0/all=
17+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4e2\#\#linker\#\#\#\#6.0.0/libraries=
18+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#6.0.0/all=2029657729,ra/fsp/inc/fsp_version.h|1808519175,ra/fsp/inc/api/fsp_common_api.h|1692739955,ra/fsp/inc/api/r_ioport_api.h|2238316510,ra/fsp/inc/api/bsp_api.h|3894236990,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|2057644446,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h
19+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#6.0.0/libraries=
20+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#6.0.0/all=1692739955,ra/fsp/inc/api/r_ioport_api.h|678846915,ra/fsp/inc/instances/r_ioport.h|3160786249,ra/fsp/src/r_ioport/r_ioport.c
21+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#6.0.0/libraries=
22+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#6.0.0/all=429738396,ra/fsp/inc/api/r_transfer_api.h|2894177435,ra/fsp/inc/api/r_uart_api.h|3371921742,ra/fsp/inc/instances/r_sci_uart.h|4212520575,ra/fsp/src/r_sci_uart/r_sci_uart.c
23+
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#6.0.0/libraries=
24+
com.renesas.cdt.ddsc.project.standalone.projectgenerationoptions/isCpp=false
25+
com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=SWPConfigurator
26+
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.1020785638=false

‎bsp/renesas/ra4e2-ek/JLinkSettings.JLinkScript‎

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/***********************************************************************
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* This file was automatically generated by RASC
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*
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* J-Link script file to change the device being used for a debug
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* session. This is required when the RA MCU being debugged is in
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* NSECSD device life-cycle state, when the normal flash driver mechanism
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* cannot be used as the use of RAM on the target MCU is not permitted.
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* This means an alternate, but slower, flash driver mechanism is
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* required, which makes no use of target RAM. This alternate mechanism
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* is enabled through the use of device names post-pended with "_RAMLess".
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*
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* To use normal flash driver:
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* => Set _USE_RAMLESS_FLASH_DRIVER to 0.
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*
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* To use slower, alternate flash driver:
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* => Set _USE_RAMLESS_FLASH_DRIVER to 1.
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*
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* Note that the "_RAMLess" device name specified in the call to
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* JLINK_SetDevice() must match the actual target device.
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***********************************************************************/
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__constant U32 _USE_RAMLESS_FLASH_DRIVER = 0;
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int ConfigTargetSettings(void) {
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if (_USE_RAMLESS_FLASH_DRIVER != 0) {
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JLINK_SYS_Report("J-Link script: ConfigTargetSettings()");
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JLINK_SYS_Report("Setting Device for flash driver that requires no RAM");
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// Ensure below device matches your target MCU (but with _RAMLess added)
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JLINK_SetDevice("R7FA4E2B9_RAMLess");
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}
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return 0;
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}

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