[libcpu][arm] fix rt_hw_cpu_dcache_ops clean invalid bug

labrick · mysterywolf · commit e4d6dd88c92f · 2022-08-13T22:12:17.000-04:00
clean_invalid must be set at the same time, and call
clean_invalid, or call clean/invalid
diff --git a/libcpu/arm/cortex-m7/cpu_cache.c b/libcpu/arm/cortex-m7/cpu_cache.c
@@ -69,8 +69,9 @@ void rt_hw_cpu_dcache_ops(int ops, void* addr, int size)
 {
     rt_uint32_t startAddr = (rt_uint32_t)addr & (rt_uint32_t)~(L1CACHE_LINESIZE_BYTE - 1);
     rt_uint32_t size_byte = size + (rt_uint32_t)addr - startAddr;
+    rt_uint32_t clean_invalid = RT_HW_CACHE_FLUSH | RT_HW_CACHE_INVALIDATE;
 
-    if (ops & (RT_HW_CACHE_FLUSH | RT_HW_CACHE_INVALIDATE))
+    if ((ops & clean_invalid) == clean_invalid)
     {
         SCB_CleanInvalidateDCache_by_Addr((uint32_t *)startAddr, size_byte);
     }

Original file line number	Diff line number	Diff line change
`@@ -69,8 +69,9 @@ void rt_hw_cpu_dcache_ops(int ops, void* addr, int size)`
`69`	`69`	`{`
`70`	`70`	`rt_uint32_t startAddr = (rt_uint32_t)addr & (rt_uint32_t)~(L1CACHE_LINESIZE_BYTE - 1);`
`71`	`71`	`rt_uint32_t size_byte = size + (rt_uint32_t)addr - startAddr;`
	`72`	`+ rt_uint32_t clean_invalid = RT_HW_CACHE_FLUSH \| RT_HW_CACHE_INVALIDATE;`
`72`	`73`
`73`		`- if (ops & (RT_HW_CACHE_FLUSH \| RT_HW_CACHE_INVALIDATE))`
	`74`	`+ if ((ops & clean_invalid) == clean_invalid)`
`74`	`75`	`{`
`75`	`76`	`SCB_CleanInvalidateDCache_by_Addr((uint32_t *)startAddr, size_byte);`
`76`	`77`	`}`