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MuChengerMuChenger
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Merge branch 'gd32h7' of https://github.com/MuChenger/rt-thread into gd32h7
2 parents f32e8fe + 11b77dd commit fdf0bba

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-64
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2 files changed

+100
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‎bsp/gd32/arm/libraries/gd32_drivers/drv_hard_i2c.c‎

Lines changed: 87 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
* Date Author Notes
88
* 2021-12-20 BruceOu the first version
99
*/
10+
1011
#include "drv_hard_i2c.h"
1112

1213
#ifdef RT_USING_I2C
@@ -107,12 +108,12 @@ struct rt_i2c_bus_device i2c5;
107108
static const struct gd32_i2c_bus gd_i2c_config[] = {
108109
#ifdef BSP_USING_HARD_I2C0
109110
{
110-
I2C0, /* uart peripheral index */
111+
I2C0, /* uart peripheral index */
111112

112-
RCU_I2C0, RCU_GPIOB, RCU_GPIOB, /* periph clock, scl gpio clock, sda gpio clock */
113+
RCU_I2C0, RCU_GPIOB, RCU_GPIOB, /* periph clock, scl gpio clock, sda gpio clock */
113114

114-
GPIOB, GPIO_AF_4, GPIO_PIN_6, /* scl port, scl alternate, scl pin */
115-
GPIOB, GPIO_AF_4, GPIO_PIN_7, /* sda port, sda alternate, sda pin */
115+
GPIOB, GPIO_AF_4, GPIO_PIN_6, /* scl port, scl alternate, scl pin */
116+
GPIOB, GPIO_AF_4, GPIO_PIN_7, /* sda port, sda alternate, sda pin */
116117

117118
&i2c0,
118119
"hwi2c0",
@@ -121,12 +122,12 @@ static const struct gd32_i2c_bus gd_i2c_config[] = {
121122

122123
#ifdef BSP_USING_HARD_I2C1
123124
{
124-
I2C1, /* uart peripheral index */
125+
I2C1, /* uart peripheral index */
125126

126-
RCU_I2C1, RCU_GPIOH, RCU_GPIOB, /* periph clock, scl gpio clock, sda gpio clock */
127+
RCU_I2C1, RCU_GPIOH, RCU_GPIOB, /* periph clock, scl gpio clock, sda gpio clock */
127128

128-
GPIOH, GPIO_AF_4, GPIO_PIN_4, /* scl port, scl alternate, scl pin */
129-
GPIOB, GPIO_AF_4, GPIO_PIN_11, /* sda port, sda alternate, sda pin */
129+
GPIOH, GPIO_AF_4, GPIO_PIN_4, /* scl port, scl alternate, scl pin */
130+
GPIOB, GPIO_AF_4, GPIO_PIN_11, /* sda port, sda alternate, sda pin */
130131

131132
&i2c1,
132133
"hwi2c1",
@@ -135,12 +136,12 @@ static const struct gd32_i2c_bus gd_i2c_config[] = {
135136

136137
#ifdef BSP_USING_HARD_I2C2
137138
{
138-
I2C2, /* uart peripheral index */
139+
I2C2, /* uart peripheral index */
139140

140-
RCU_I2C2, RCU_GPIOA, RCU_GPIOC, /* periph clock, scl gpio clock, sda gpio clock */
141+
RCU_I2C2, RCU_GPIOA, RCU_GPIOC, /* periph clock, scl gpio clock, sda gpio clock */
141142

142-
GPIOA, GPIO_AF_4, GPIO_PIN_8, /* scl port, scl alternate, scl pin */
143-
GPIOC, GPIO_AF_4, GPIO_PIN_9, /* sda port, sda alternate, sda pin */
143+
GPIOA, GPIO_AF_4, GPIO_PIN_8, /* scl port, scl alternate, scl pin */
144+
GPIOC, GPIO_AF_4, GPIO_PIN_9, /* sda port, sda alternate, sda pin */
144145

145146
&i2c2,
146147
"hwi2c2",
@@ -149,38 +150,38 @@ static const struct gd32_i2c_bus gd_i2c_config[] = {
149150

150151
#ifdef BSP_USING_HARD_I2C3
151152
{
152-
I2C3, /* uart peripheral index */
153+
I2C3, /* uart peripheral index */
153154

154-
RCU_I2C3, RCU_GPIOF, RCU_GPIOF, /* periph clock, scl gpio clock, sda gpio clock */
155+
RCU_I2C3, RCU_GPIOF, RCU_GPIOF, /* periph clock, scl gpio clock, sda gpio clock */
155156

156-
GPIOF, GPIO_AF_4, GPIO_PIN_14, /* scl port, scl alternate, scl pin */
157-
GPIOF, GPIO_AF_4, GPIO_PIN_15, /* sda port, sda alternate, sda pin */
157+
GPIOF, GPIO_AF_4, GPIO_PIN_14, /* scl port, scl alternate, scl pin */
158+
GPIOF, GPIO_AF_4, GPIO_PIN_15, /* sda port, sda alternate, sda pin */
158159

159160
&i2c3,
160161
"hwi2c3",
161162
},
162163
#endif
163164
#ifdef BSP_USING_HARD_I2C4
164165
{
165-
I2C4, /* uart peripheral index */
166+
I2C4, /* uart peripheral index */
166167

167-
RCU_I2C4, RCU_GPIOG, RCU_GPIOG, /* periph clock, scl gpio clock, sda gpio clock */
168+
RCU_I2C4, RCU_GPIOG, RCU_GPIOG, /* periph clock, scl gpio clock, sda gpio clock */
168169

169-
GPIOG, GPIO_AF_6, GPIO_PIN_7, /* scl port, scl alternate, scl pin */
170-
GPIOG, GPIO_AF_6, GPIO_PIN_8, /* sda port, sda alternate, sda pin */
170+
GPIOG, GPIO_AF_6, GPIO_PIN_7, /* scl port, scl alternate, scl pin */
171+
GPIOG, GPIO_AF_6, GPIO_PIN_8, /* sda port, sda alternate, sda pin */
171172

172173
&i2c4,
173174
"hwi2c4",
174175
},
175176
#endif
176177
#ifdef BSP_USING_HARD_I2C5
177178
{
178-
I2C5, /* uart peripheral index */
179+
I2C5, /* uart peripheral index */
179180

180-
RCU_I2C5, RCU_GPIOF, RCU_GPIOF, /* periph clock, scl gpio clock, sda gpio clock */
181+
RCU_I2C5, RCU_GPIOF, RCU_GPIOF, /* periph clock, scl gpio clock, sda gpio clock */
181182

182-
GPIOF, GPIO_AF_4, GPIO_PIN_11, /* scl port, scl alternate, scl pin */
183-
GPIOF, GPIO_AF_4, GPIO_PIN_12, /* sda port, sda alternate, sda pin */
183+
GPIOF, GPIO_AF_4, GPIO_PIN_11, /* scl port, scl alternate, scl pin */
184+
GPIOF, GPIO_AF_4, GPIO_PIN_12, /* sda port, sda alternate, sda pin */
184185

185186
&i2c5,
186187
"hwi2c5",
@@ -230,23 +231,29 @@ static uint8_t gd32_i2c_read(rt_uint32_t i2c_periph, rt_uint8_t *p_buffer, rt_ui
230231
if (data_byte == 0) return 1;
231232
/* while there is data to be read */
232233

233-
while(data_byte) {
234+
while(data_byte)
235+
{
234236
#if defined (SOC_SERIES_GD32F5xx) || defined (SOC_SERIES_GD32F4xx)
235-
if(IS_I2C_LEGACY(i2c_periph)) {
236-
if(3 == data_byte) {
237+
if(IS_I2C_LEGACY(i2c_periph))
238+
{
239+
if(3 == data_byte)
240+
{
237241
/* wait until BTC bit is set */
238242
while(!i2c_flag_get(i2c_periph, I2C_FLAG_BTC));
239243
/* disable acknowledge */
240244
i2c_ack_config(i2c_periph, I2C_ACK_DISABLE);
241245
}
242-
if(2 == data_byte) {
246+
247+
if(2 == data_byte)
248+
{
243249
/* wait until BTC bit is set */
244250
while(!i2c_flag_get(i2c_periph, I2C_FLAG_BTC));
245251
/* send a stop condition to I2C bus */
246252
i2c_stop_on_bus(i2c_periph);
247253
}
248254
/* wait until RBNE bit is set */
249-
if(i2c_flag_get(i2c_periph, I2C_FLAG_RBNE)) {
255+
if(i2c_flag_get(i2c_periph, I2C_FLAG_RBNE))
256+
{
250257
/* read a byte from the EEPROM */
251258
*p_buffer = i2c_data_receive(i2c_periph);
252259
/* point to the next location where the byte read will be saved */
@@ -282,7 +289,8 @@ static uint8_t gd32_i2c_write(rt_uint32_t i2c_periph, uint8_t *p_buffer, uint16_
282289
{
283290
if (data_byte == 0) return 1;
284291

285-
while(data_byte) {
292+
while(data_byte)
293+
{
286294
#if defined (SOC_SERIES_GD32F5xx) || defined (SOC_SERIES_GD32F4xx)
287295
if(IS_I2C_LEGACY(i2c_periph))
288296
{
@@ -303,7 +311,8 @@ static uint8_t gd32_i2c_write(rt_uint32_t i2c_periph, uint8_t *p_buffer, uint16_
303311
I2C_STAT_GD(i2c_periph) |= I2C_STAT_TBE_GD;
304312
while(!i2c_flag_get(i2c_periph, I2C_FLAG_TBE));
305313

306-
while(data_byte) {
314+
while(data_byte)
315+
{
307316
/* wait until the TI bit is set */
308317
while(!i2c_flag_get(i2c_periph, I2C_FLAG_TI_GD));
309318
/* data transmission */
@@ -316,7 +325,9 @@ static uint8_t gd32_i2c_write(rt_uint32_t i2c_periph, uint8_t *p_buffer, uint16_
316325
#endif
317326
}
318327
}
319-
if(data_byte != 0){
328+
329+
if(data_byte != 0)
330+
{
320331
return 1;
321332
}
322333
return 0;
@@ -341,23 +352,31 @@ static rt_ssize_t gd32_i2c_master_xfer(struct rt_i2c_bus_device *bus, struct rt_
341352

342353
struct gd32_i2c_bus *gd32_i2c = (struct gd32_i2c_bus *)bus->priv;
343354

344-
for(i = 0; i < num; i++) {
355+
for(i = 0; i < num; i++)
356+
{
345357
msg = &msgs[i];
346358

347-
if(msg->flags & RT_I2C_RD){
359+
if(msg->flags & RT_I2C_RD)
360+
{
348361
r_total_byte += msg->len;
349362
}else{
350363
w_total_byte += msg->len;
351364
}
352365
}
353-
for(i = 0; i < num; i++) {
366+
367+
for(i = 0; i < num; i++)
368+
{
354369
msg = &msgs[i];
355-
if (!(msg->flags & RT_I2C_NO_START)){
370+
if (!(msg->flags & RT_I2C_NO_START))
371+
{
356372
#if defined (SOC_SERIES_GD32F5xx) || defined (SOC_SERIES_GD32F4xx)
357-
if(IS_I2C_LEGACY(gd32_i2c->i2c_periph)){
373+
if(IS_I2C_LEGACY(gd32_i2c->i2c_periph))
374+
{
358375

359-
if(msg->flags & RT_I2C_RD){
360-
if(i2c_flag_get(gd32_i2c->i2c_periph, I2C_FLAG_I2CBSY)){
376+
if(msg->flags & RT_I2C_RD)
377+
{
378+
if(i2c_flag_get(gd32_i2c->i2c_periph, I2C_FLAG_I2CBSY))
379+
{
361380
i2c_stop_on_bus(gd32_i2c->i2c_periph);
362381
}
363382
/* enable acknowledge */
@@ -392,14 +411,17 @@ static rt_ssize_t gd32_i2c_master_xfer(struct rt_i2c_bus_device *bus, struct rt_
392411
#endif
393412
{
394413
#if defined (SOC_SERIES_GD32F5xx) || defined (SOC_SERIES_GD32H7xx)
395-
if(msg->flags & RT_I2C_ADDR_10BIT) {
414+
if(msg->flags & RT_I2C_ADDR_10BIT)
415+
{
396416
/* enable 10-bit addressing mode in master mode */
397417
i2c_address10_enable_gd(gd32_i2c->i2c_periph);
398418
}else {
399419
/* disable 10-bit addressing mode in master mode */
400420
i2c_address10_disable_gd(gd32_i2c->i2c_periph);
401421
}
402-
if(msg->flags & RT_I2C_RD){
422+
423+
if(msg->flags & RT_I2C_RD)
424+
{
403425
/* configure slave address */
404426
i2c_master_addressing_gd(gd32_i2c->i2c_periph, msg->addr, I2C_MASTER_RECEIVE_GD);
405427

@@ -418,20 +440,26 @@ static rt_ssize_t gd32_i2c_master_xfer(struct rt_i2c_bus_device *bus, struct rt_
418440
#endif
419441
}
420442
}
421-
if(msg->flags & RT_I2C_RD) {
422-
if(gd32_i2c_read(gd32_i2c->i2c_periph, msg->buf, msg->len) != 0) {
443+
444+
if(msg->flags & RT_I2C_RD)
445+
{
446+
if(gd32_i2c_read(gd32_i2c->i2c_periph, msg->buf, msg->len) != 0)
447+
{
423448
LOG_E("i2c bus read failed,i2c bus stop!");
424449
goto out;
425450
}
426451
}else {
427-
if(gd32_i2c_write(gd32_i2c->i2c_periph, msg->buf, msg->len) != 0) {
452+
if(gd32_i2c_write(gd32_i2c->i2c_periph, msg->buf, msg->len) != 0)
453+
{
428454
LOG_E("i2c bus write failed,i2c bus stop!");
429455
goto out;
430456
}
431457
}
432458
#if defined (SOC_SERIES_GD32F5xx) || defined (SOC_SERIES_GD32H7xx)
433-
if(!IS_I2C_LEGACY(gd32_i2c->i2c_periph)){
434-
if(r_total_byte != 0){
459+
if(!IS_I2C_LEGACY(gd32_i2c->i2c_periph))
460+
{
461+
if(r_total_byte != 0)
462+
{
435463
while(!i2c_flag_get_gd(gd32_i2c->i2c_periph, I2C_FLAG_TC_GD));
436464
}
437465
}
@@ -442,10 +470,13 @@ static rt_ssize_t gd32_i2c_master_xfer(struct rt_i2c_bus_device *bus, struct rt_
442470

443471
out:
444472
#if defined (SOC_SERIES_GD32F5xx) || defined (SOC_SERIES_GD32F4xx)
445-
if(IS_I2C_LEGACY(gd32_i2c->i2c_periph)) {
473+
if(IS_I2C_LEGACY(gd32_i2c->i2c_periph))
474+
{
446475

447-
if(!(msg->flags & RT_I2C_NO_STOP)) {
448-
if(msg->flags & RT_I2C_RD){
476+
if(!(msg->flags & RT_I2C_NO_STOP))
477+
{
478+
if(msg->flags & RT_I2C_RD)
479+
{
449480
while((I2C_CTL0(gd32_i2c->i2c_periph) & I2C_CTL0_STOP));
450481
}else{
451482
/* send a stop condition to I2C bus */
@@ -459,7 +490,8 @@ static rt_ssize_t gd32_i2c_master_xfer(struct rt_i2c_bus_device *bus, struct rt_
459490
#endif
460491
{
461492
#if defined (SOC_SERIES_GD32F5xx) || defined (SOC_SERIES_GD32H7xx)
462-
if(!(msg->flags & RT_I2C_NO_STOP)) {
493+
if(!(msg->flags & RT_I2C_NO_STOP))
494+
{
463495
while(!i2c_flag_get_gd(gd32_i2c->i2c_periph, I2C_FLAG_TC_GD));
464496
/* send a stop condition to I2C bus */
465497
i2c_stop_on_bus_gd(gd32_i2c->i2c_periph);
@@ -489,13 +521,15 @@ int rt_hw_i2c_init(void)
489521
rt_size_t obj_num = sizeof(gd_i2c_config) / sizeof(gd_i2c_config[0]);
490522
// rt_err_t result;
491523

492-
for(int i = 0; i < obj_num; i++) {
524+
for(int i = 0; i < obj_num; i++)
525+
{
493526

494527
gd32_i2c_gpio_init(&gd_i2c_config[i]);
495528

496529
/* configure I2C timing. I2C speed clock=400kHz*/
497530
#if defined (SOC_SERIES_GD32F5xx) || defined (SOC_SERIES_GD32F4xx)
498-
if(IS_I2C_LEGACY(gd_i2c_config[i].i2c_periph)){
531+
if(IS_I2C_LEGACY(gd_i2c_config[i].i2c_periph))
532+
{
499533

500534
i2c_clock_config(gd_i2c_config[i].i2c_periph, 100000, I2C_DTCY_2);
501535
i2c_mode_addr_config(gd_i2c_config[i].i2c_periph, I2C_I2CMODE_ENABLE, I2C_ADDFORMAT_7BITS, 0xa0);
@@ -525,3 +559,4 @@ int rt_hw_i2c_init(void)
525559
INIT_BOARD_EXPORT(rt_hw_i2c_init);
526560

527561
#endif /* RT_USING_I2C */
562+

‎bsp/gd32/arm/libraries/gd32_drivers/drv_hard_i2c.h‎

Lines changed: 13 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2006-2022, RT-Thread Development Team
2+
* Copyright (c) 2006-2025, RT-Thread Development Team
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*
@@ -23,19 +23,19 @@ extern "C" {
2323
/* GD32 i2c driver */
2424
struct gd32_i2c_bus
2525
{
26-
uint32_t i2c_periph; //Todo: 3bits
26+
uint32_t i2c_periph; /* Todo: 3bits */
2727

28-
rcu_periph_enum per_clk; //Todo: 5bits
29-
rcu_periph_enum scl_gpio_clk; //Todo: 5bits
30-
rcu_periph_enum sda_gpio_clk; //Todo: 5bits
28+
rcu_periph_enum per_clk; /* Todo: 5bits */
29+
rcu_periph_enum scl_gpio_clk; /* Todo: 5bits */
30+
rcu_periph_enum sda_gpio_clk; /* Todo: 5bits */
3131

32-
uint32_t scl_port; //Todo: 4bits
33-
uint16_t scl_af; //Todo: 4bits
34-
uint16_t scl_pin; //Todo: 4bits
35-
36-
uint32_t sda_port; //Todo: 4bits
37-
uint16_t sda_af; //Todo: 4bits
38-
uint16_t sda_pin; //Todo: 4bits
32+
uint32_t scl_port; /* Todo: 4bits */
33+
uint16_t scl_af; /* Todo: 4bits */
34+
uint16_t scl_pin; /* Todo: 4bits */
35+
36+
uint32_t sda_port; /* Todo: 4bits */
37+
uint16_t sda_af; /* Todo: 4bits */
38+
uint16_t sda_pin; /* Todo: 4bits */
3939

4040
struct rt_i2c_bus_device *i2c_bus;
4141
char *device_name;
@@ -46,3 +46,4 @@ struct gd32_i2c_bus
4646
#endif
4747

4848
#endif /* __DRV_I2C__ */
49+

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