From 8ff6dbce214de8fef257cbb0785237fca4531ada Mon Sep 17 00:00:00 2001 From: DingDing Date: Thu, 9 Jan 2025 14:41:05 +0800 Subject: [PATCH 01/10] Update drv_gpio.c fix `rt_pin_get` function for RENESAS chips, use "PXX_X" or "pXX_X" string format to define a PIN --- bsp/renesas/libraries/HAL_Drivers/drv_gpio.c | 39 +++++--------------- 1 file changed, 10 insertions(+), 29 deletions(-) diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c b/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c index 13dc033a4e3..4f674592a59 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c +++ b/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c @@ -302,38 +302,19 @@ static rt_err_t ra_pin_dettach_irq(struct rt_device *device, rt_base_t pin) #endif } -static rt_base_t ra_pin_get(const char *name) +// USE "PXX_X" or "pXX_X" format, the character 'P'/'p' and '_' are required. +static rt_base_t ra_pin_get(const char *name) { - int pin_number = -1, port = -1, pin = -1; - - if (rt_strlen(name) != 4) - return -1; - - if ((name[0] == 'P' || name[0] == 'p')) + if ((rt_strlen(name) == 5) && + ((name[0] == 'P') || (name[0] == 'p')) && + (name[3] == '_') && + ('0' <= (int) name[1] && (int) name[1] <= '1') && + ('0' <= (int) name[2] && (int) name[2] <= '9') && + ('0' <= (int) name[4] && (int) name[4] <= '7')) { - if ('0' <= name[1] && name[1] <= '9') - { - port = (name[1] - '0') * 16 * 16; - if ('0' <= name[2] && name[2] <= '9' && '0' <= name[3] && name[3] <= '9') - { - pin = (name[2] - '0') * 10 + (name[3] - '0'); - pin_number = port + pin; - - return pin_number; - } - } - else if ('A' <= name[1] && name[1] <= 'Z') - { - port = (name[1] - '0' - 7) * 16 * 16; - if ('0' <= name[2] && name[2] <= '9' && '0' <= name[3] && name[3] <= '9') - { - pin = (name[2] - '0') * 10 + (name[3] - '0'); - pin_number = port + pin; - - return pin_number; - } - } + return (((int) name[1] - '0') * 10 + ((int) name[2] - '0')) * 0x100 + ((int) name[4] - '0'); } + LOG_W("Invalid pin expression, use `PXX_X` format"); return -1; } From 6aa5b72efa5bf39b33fc18f4a72f67e405146a6d Mon Sep 17 00:00:00 2001 From: DingDing Date: Thu, 9 Jan 2025 14:43:43 +0800 Subject: [PATCH 02/10] Update drv_sci.c fix a register problem for R9A07 series chips --- bsp/renesas/libraries/HAL_Drivers/drv_sci.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_sci.c b/bsp/renesas/libraries/HAL_Drivers/drv_sci.c index 93d31dd2e3f..1fec7550d49 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drv_sci.c +++ b/bsp/renesas/libraries/HAL_Drivers/drv_sci.c @@ -358,7 +358,11 @@ static int ra_uart_putc(struct rt_serial_device *serial, char c) sci_uart_instance_ctrl_t *p_ctrl = (sci_uart_instance_ctrl_t *)param->sci_ctrl; p_ctrl->p_reg->TDR = c; +#ifdef SOC_SERIES_R9A07G0 + while ((p_ctrl->p_reg->CSR_b.TEND) == 0); +#else while ((p_ctrl->p_reg->SSR_b.TEND) == 0); +#endif return RT_EOK; } From f5b7844dfc21128f44ee708dc7c755625d698cdc Mon Sep 17 00:00:00 2001 From: DingDing Date: Thu, 9 Jan 2025 15:31:44 +0800 Subject: [PATCH 03/10] Update drv_gpio.c --- bsp/renesas/libraries/HAL_Drivers/drv_gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c b/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c index 4f674592a59..6d340cf8142 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c +++ b/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c @@ -303,14 +303,14 @@ static rt_err_t ra_pin_dettach_irq(struct rt_device *device, rt_base_t pin) } // USE "PXX_X" or "pXX_X" format, the character 'P'/'p' and '_' are required. -static rt_base_t ra_pin_get(const char *name) +static rt_base_t ra_pin_get(const char *name) { if ((rt_strlen(name) == 5) && ((name[0] == 'P') || (name[0] == 'p')) && (name[3] == '_') && ('0' <= (int) name[1] && (int) name[1] <= '1') && ('0' <= (int) name[2] && (int) name[2] <= '9') && - ('0' <= (int) name[4] && (int) name[4] <= '7')) + ('0' <= (int) name[4] && (int) name[4] <= '7')) { return (((int) name[1] - '0') * 10 + ((int) name[2] - '0')) * 0x100 + ((int) name[4] - '0'); } From 53bd56ccf9cb77dd1cec3c3c9e1fde24b0a95267 Mon Sep 17 00:00:00 2001 From: wycwyhwyq <5f20.6d9b@gmail.com> Date: Thu, 9 Jan 2025 15:27:06 +0800 Subject: [PATCH 04/10] [components][dfs_v2]: Fix dfs_devfs_open memory leak --- components/dfs/dfs_v2/filesystems/devfs/devfs.c | 1 + 1 file changed, 1 insertion(+) diff --git a/components/dfs/dfs_v2/filesystems/devfs/devfs.c b/components/dfs/dfs_v2/filesystems/devfs/devfs.c index b09c54eb35a..38e9a2e4550 100644 --- a/components/dfs/dfs_v2/filesystems/devfs/devfs.c +++ b/components/dfs/dfs_v2/filesystems/devfs/devfs.c @@ -77,6 +77,7 @@ static int dfs_devfs_open(struct dfs_file *file) } } } + rt_free(device_name); } return ret; From bdd9447d709213b5076a152fbfa484fbb0f7ee19 Mon Sep 17 00:00:00 2001 From: Meco Man <920369182@qq.com> Date: Wed, 8 Jan 2025 20:12:55 -0500 Subject: [PATCH 05/10] [utest] make RT_USING_CI_ACTION to be clear RT_USING_CI_ACTION will select RT_UTEST_USING_AUTO_RUN and RT_UTEST_USING_ALL_CASES --- components/utilities/Kconfig | 13 +++++++++++++ components/utilities/utest/utest.c | 8 ++++---- src/Kconfig | 2 ++ src/klibc/utest/SConscript | 2 +- 4 files changed, 20 insertions(+), 5 deletions(-) diff --git a/components/utilities/Kconfig b/components/utilities/Kconfig index cade1ba06c9..74e16cc7e43 100644 --- a/components/utilities/Kconfig +++ b/components/utilities/Kconfig @@ -210,6 +210,19 @@ config RT_USING_UTEST config UTEST_THR_PRIORITY int "The utest thread priority" default 20 + + config RT_UTEST_USING_AUTO_RUN + bool "Enable auto run test cases" + default n + help + If enable this option, the test cases will be run automatically when board boot up. + + config RT_UTEST_USING_ALL_CASES + bool "Enable all selected modules' test cases" + default n + help + If enable this option, all selected modules' test cases will be run. + Otherwise, only the test cases that are explicitly enabled will be run. endif config RT_USING_VAR_EXPORT diff --git a/components/utilities/utest/utest.c b/components/utilities/utest/utest.c index 8d9ad7eef3e..f5baa71e20b 100644 --- a/components/utilities/utest/utest.c +++ b/components/utilities/utest/utest.c @@ -316,15 +316,15 @@ static void utest_thread_create(const char *utest_name) } } -#ifdef RT_USING_CI_ACTION -static int utest_ci_action(void) +#ifdef RT_UTEST_USING_AUTO_RUN +static int utest_auto_run(void) { tc_loop = 1; utest_thread_create(RT_NULL); return RT_EOK; } -INIT_APP_EXPORT(utest_ci_action); -#endif /* RT_USING_CI_ACTION */ +INIT_APP_EXPORT(utest_auto_run); +#endif /* RT_UTEST_USING_AUTO_RUN */ int utest_testcase_run(int argc, char** argv) { diff --git a/src/Kconfig b/src/Kconfig index d4cad60d953..75c59ad6515 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -244,6 +244,8 @@ menuconfig RT_USING_DEBUG config RT_USING_CI_ACTION bool "Enable CI Action build mode" select RT_USING_UTEST + select RT_UTEST_USING_AUTO_RUN + select RT_UTEST_USING_ALL_CASES default n help Identify that the environment is CI Action. diff --git a/src/klibc/utest/SConscript b/src/klibc/utest/SConscript index 43ec5e97a5f..a9acd1b3c60 100644 --- a/src/klibc/utest/SConscript +++ b/src/klibc/utest/SConscript @@ -2,7 +2,7 @@ from building import * src = [] -if GetDepend('RT_USING_CI_ACTION') or GetDepend('RT_UTEST_TC_USING_KLIBC'): +if GetDepend('RT_UTEST_USING_ALL_CASES') or GetDepend('RT_UTEST_TC_USING_KLIBC'): src += Glob('TC_*.c') group = DefineGroup('utestcases', src, depend = ['']) From 93c1689299e784c633f55f43521e0b06623ccbe8 Mon Sep 17 00:00:00 2001 From: DingDing Date: Fri, 10 Jan 2025 09:04:24 +0800 Subject: [PATCH 06/10] Update drv_gpio.c --- bsp/renesas/libraries/HAL_Drivers/drv_gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c b/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c index 6d340cf8142..c85ec940b7c 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c +++ b/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c @@ -302,7 +302,7 @@ static rt_err_t ra_pin_dettach_irq(struct rt_device *device, rt_base_t pin) #endif } -// USE "PXX_X" or "pXX_X" format, the character 'P'/'p' and '_' are required. +/* USE "PXX_X" or "pXX_X" format, the character 'P'/'p' and '_' are required, like "P18_1" */ static rt_base_t ra_pin_get(const char *name) { if ((rt_strlen(name) == 5) && From 123ed1be1b17161e64b9b775f7fb9deb1d386416 Mon Sep 17 00:00:00 2001 From: Chen Wang Date: Wed, 8 Jan 2025 16:39:27 +0800 Subject: [PATCH 07/10] bsp: qemu-virt64-riscv: remove config RISCV_S_MODE RISCV_S_MODE configuration only affects the code in libcpu/risc-v/virt64, and the only bsp using this libcpu is qemu-virt64-riscv. Considering s-mode is the default mode RT-Thread running on virt64 machine, it seems unnecessary to make RISCV_S_MODE a Kconfig option. Solution: Remove RISCV_S_MODE from Kconfig and define it as a macro in the code in libcpu/risc-v/virt64. Plus, due to this macro is only related to virt64, rename RISCV_S_MODE to RISCV_VIRT64_S_MODE. Update the .config/rtconfig.h in this patch. Signed-off-by: Chen Wang --- bsp/qemu-virt64-riscv/.config | 2 -- bsp/qemu-virt64-riscv/driver/Kconfig | 4 ---- bsp/qemu-virt64-riscv/rtconfig.h | 1 - libcpu/risc-v/common64/README.md | 2 +- libcpu/risc-v/virt64/plic.c | 2 +- libcpu/risc-v/virt64/plic.h | 5 ++++- 6 files changed, 6 insertions(+), 10 deletions(-) diff --git a/bsp/qemu-virt64-riscv/.config b/bsp/qemu-virt64-riscv/.config index debc4ca311a..67de44eef6e 100644 --- a/bsp/qemu-virt64-riscv/.config +++ b/bsp/qemu-virt64-riscv/.config @@ -272,7 +272,6 @@ CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000 CONFIG_RT_USING_DFS_DEVFS=y CONFIG_RT_USING_DFS_ROMFS=y -# CONFIG_RT_USING_DFS_ROMFS_USER_ROOT is not set # CONFIG_RT_USING_DFS_CROMFS is not set # CONFIG_RT_USING_DFS_TMPFS is not set # CONFIG_RT_USING_DFS_MQUEUE is not set @@ -1434,7 +1433,6 @@ CONFIG_RT_USING_ADT_REF=y # # RISC-V QEMU virt64 configs # -CONFIG_RISCV_S_MODE=y CONFIG_BSP_USING_VIRTIO=y CONFIG_BSP_USING_VIRTIO_BLK=y CONFIG_BSP_USING_VIRTIO_NET=y diff --git a/bsp/qemu-virt64-riscv/driver/Kconfig b/bsp/qemu-virt64-riscv/driver/Kconfig index 590de38f4ad..ba9a2650e19 100644 --- a/bsp/qemu-virt64-riscv/driver/Kconfig +++ b/bsp/qemu-virt64-riscv/driver/Kconfig @@ -1,9 +1,5 @@ menu "RISC-V QEMU virt64 configs" -config RISCV_S_MODE - bool "RT-Thread run in RISC-V S-Mode(supervisor mode)" - default y - config BSP_USING_VIRTIO bool "Using VirtIO" default y diff --git a/bsp/qemu-virt64-riscv/rtconfig.h b/bsp/qemu-virt64-riscv/rtconfig.h index d68cf44446c..221ee5eb9bc 100644 --- a/bsp/qemu-virt64-riscv/rtconfig.h +++ b/bsp/qemu-virt64-riscv/rtconfig.h @@ -519,7 +519,6 @@ /* RISC-V QEMU virt64 configs */ -#define RISCV_S_MODE #define BSP_USING_VIRTIO #define BSP_USING_VIRTIO_BLK #define BSP_USING_VIRTIO_NET diff --git a/libcpu/risc-v/common64/README.md b/libcpu/risc-v/common64/README.md index 1d027216f19..5e7ea4bf92e 100644 --- a/libcpu/risc-v/common64/README.md +++ b/libcpu/risc-v/common64/README.md @@ -33,7 +33,7 @@ | 选项 | 默认值 | 说明 | | --------------- | --- | ---------------------------------------------------------------------------------------------------- | -| RISCV_S_MODE | 打开 | 系统启动后是否运行在S态，关闭时系统将运行在M态；目前系统存在bug尚不可直接运行在M态，故此开关必须打开 | +| RISCV_VIRT64_S_MODE | 打开 | 系统启动后是否运行在S态，关闭时系统将运行在M态；目前系统存在bug尚不可直接运行在M态，故此开关必须打开 | | RT_USING_SMART | 关闭 | 是否开启RTThread SMART版本，开启后系统运行在S+U态，且会开启MMU页表(satp);关闭时系统仅运行在S态，MMU关闭(satp为bare translation) | | ARCH_USING_ASID | 关闭 | MMU是否支持asid | diff --git a/libcpu/risc-v/virt64/plic.c b/libcpu/risc-v/virt64/plic.c index f222146f34d..8aab8b1292b 100644 --- a/libcpu/risc-v/virt64/plic.c +++ b/libcpu/risc-v/virt64/plic.c @@ -52,7 +52,7 @@ void plic_irq_enable(int irq) { int hart = __raw_hartid(); *(uint32_t *)PLIC_ENABLE(hart) = ((*(uint32_t *)PLIC_ENABLE(hart)) | (1 << irq)); -#ifdef RISCV_S_MODE +#ifdef RISCV_VIRT64_S_MODE set_csr(sie, read_csr(sie) | MIP_SEIP); #else set_csr(mie, read_csr(mie) | MIP_MEIP); diff --git a/libcpu/risc-v/virt64/plic.h b/libcpu/risc-v/virt64/plic.h index 314210c66b5..a13b6d96222 100644 --- a/libcpu/risc-v/virt64/plic.h +++ b/libcpu/risc-v/virt64/plic.h @@ -30,7 +30,10 @@ extern size_t plic_base; #define PLIC_ENABLE_STRIDE 0x80 #define PLIC_CONTEXT_STRIDE 0x1000 -#ifndef RISCV_S_MODE +/* RT-Thread runs in S-mode on virt64 by default */ +#define RISCV_VIRT64_S_MODE + +#ifndef RISCV_VIRT64_S_MODE #define PLIC_MENABLE_OFFSET (0x2000) #define PLIC_MTHRESHOLD_OFFSET (0x200000) #define PLIC_MCLAIM_OFFSET (0x200004) From c5a79de38e400f5449c3eabb03739e8d3007283a Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Sun, 12 Jan 2025 10:20:25 +0800 Subject: [PATCH 08/10] [tools] Add sdk_cfg.json setting for env CC detection --- tools/building.py | 19 ++++++++++--------- tools/env_utility.py | 12 +++++++++++- 2 files changed, 21 insertions(+), 10 deletions(-) diff --git a/tools/building.py b/tools/building.py index 5c8e3941984..c64c393ba00 100644 --- a/tools/building.py +++ b/tools/building.py @@ -210,15 +210,16 @@ def PrepareBuilding(env, root_directory, has_libcpu=False, remove_components = [ envm = utils.ImportModule('env_utility') # from env import GetSDKPath exec_path = envm.GetSDKPath(rtconfig.CC) - if 'gcc' in rtconfig.CC: - exec_path = os.path.join(exec_path, 'bin') - - if os.path.exists(exec_path): - Env['log'].debug('set CC to ' + exec_path) - rtconfig.EXEC_PATH = exec_path - os.environ['RTT_EXEC_PATH'] = exec_path - else: - Env['log'].debug('No Toolchain found in path(%s).' % exec_path) + if exec_path != None: + if 'gcc' in rtconfig.CC: + exec_path = os.path.join(exec_path, 'bin') + + if os.path.exists(exec_path): + Env['log'].debug('set CC to ' + exec_path) + rtconfig.EXEC_PATH = exec_path + os.environ['RTT_EXEC_PATH'] = exec_path + else: + Env['log'].debug('No Toolchain found in path(%s).' % exec_path) except Exception as e: # detect failed, ignore Env['log'].debug(e) diff --git a/tools/env_utility.py b/tools/env_utility.py index 608ef4fa156..d950d077334 100644 --- a/tools/env_utility.py +++ b/tools/env_utility.py @@ -55,6 +55,15 @@ def GetSDKPath(name): sdk_pkgs = GetSDKPackagePath() if sdk_pkgs: + # read env/tools/scripts/sdk_cfg.json for curstomized SDK path + if os.path.exists(os.path.join(sdk_pkgs, '..', 'sdk_cfg.json')): + with open(os.path.join(sdk_pkgs, '..', 'sdk_cfg.json'), 'r', encoding='utf-8') as f: + sdk_cfg = json.load(f) + for item in sdk_cfg: + if item['name'] == name: + sdk = os.path.join(sdk_pkgs, item['path']) + return sdk + # read packages.json under env/tools/scripts/packages with open(os.path.join(sdk_pkgs, 'pkgs.json'), 'r', encoding='utf-8') as f: # packages_json = f.read() @@ -68,7 +77,8 @@ def GetSDKPath(name): package = json.load(f) if package['name'] == name: - return os.path.join(sdk_pkgs, package['name'] + '-' + item['ver']) + sdk = os.path.join(sdk_pkgs, package['name'] + '-' + item['ver']) + return sdk # not found named package return None From d322bffc9d345665f79adccd3c95e9b7af338f0f Mon Sep 17 00:00:00 2001 From: newflydd Date: Mon, 13 Jan 2025 13:40:19 +0800 Subject: [PATCH 09/10] fix gpio and sci drivers for RZ series --- bsp/renesas/libraries/HAL_Drivers/drv_gpio.c | 53 +++++++++----------- bsp/renesas/libraries/HAL_Drivers/drv_sci.c | 4 ++ bsp/renesas/libraries/Kconfig | 26 +++++----- 3 files changed, 40 insertions(+), 43 deletions(-) diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c b/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c index 13dc033a4e3..9bf5cef602e 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c +++ b/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c @@ -7,6 +7,7 @@ * Date Author Notes * 2021-07-29 KyleChan first version * 2022-01-19 Sherman add PIN2IRQX_TABLE + * 2025-01-13 newflydd pin_get for RZ */ #include @@ -304,37 +305,31 @@ static rt_err_t ra_pin_dettach_irq(struct rt_device *device, rt_base_t pin) static rt_base_t ra_pin_get(const char *name) { - int pin_number = -1, port = -1, pin = -1; - - if (rt_strlen(name) != 4) - return -1; - - if ((name[0] == 'P' || name[0] == 'p')) +#ifdef SOC_FAMILY_RENESAS_RZ + /* RZ series: use "PXX_X" format, like "P01_1" */ + if ((rt_strlen(name) == 5) && + ((name[0] == 'P') || (name[0] == 'p')) && + (name[3] == '_') && + ('0' <= (int) name[1] && (int) name[1] <= '1') && + ('0' <= (int) name[2] && (int) name[2] <= '9') && + ('0' <= (int) name[4] && (int) name[4] <= '7')) { - if ('0' <= name[1] && name[1] <= '9') - { - port = (name[1] - '0') * 16 * 16; - if ('0' <= name[2] && name[2] <= '9' && '0' <= name[3] && name[3] <= '9') - { - pin = (name[2] - '0') * 10 + (name[3] - '0'); - pin_number = port + pin; - - return pin_number; - } - } - else if ('A' <= name[1] && name[1] <= 'Z') - { - port = (name[1] - '0' - 7) * 16 * 16; - if ('0' <= name[2] && name[2] <= '9' && '0' <= name[3] && name[3] <= '9') - { - pin = (name[2] - '0') * 10 + (name[3] - '0'); - pin_number = port + pin; - - return pin_number; - } - } + return (((int) name[1] - '0') * 10 + ((int) name[2] - '0')) * 0x100 + ((int) name[4] - '0'); + } + LOG_W("Invalid pin expression, use `PXX_X` format like `P01_1`"); +#else + /* RA series: use "PXXX" format, like "P101"*/ + if ((rt_strlen(name) == 4) && + (name[0] == 'P' || name[0] == 'p') && + (name[1] >= '0' && name[1] <= '9') && + (name[2] >= '0' && name[1] <= '9') && + (name[3] >= '0' && name[1] <= '9')) + { + return (name[1] - '0') * 0x100 + (name[2] - '0') * 10 + (name[3] - '0'); } - return -1; + LOG_W("Invalid pin expression, use `PXXX` format like `P101`"); +#endif + return -RT_ERROR; } const static struct rt_pin_ops _ra_pin_ops = diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_sci.c b/bsp/renesas/libraries/HAL_Drivers/drv_sci.c index 93d31dd2e3f..1fec7550d49 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drv_sci.c +++ b/bsp/renesas/libraries/HAL_Drivers/drv_sci.c @@ -358,7 +358,11 @@ static int ra_uart_putc(struct rt_serial_device *serial, char c) sci_uart_instance_ctrl_t *p_ctrl = (sci_uart_instance_ctrl_t *)param->sci_ctrl; p_ctrl->p_reg->TDR = c; +#ifdef SOC_SERIES_R9A07G0 + while ((p_ctrl->p_reg->CSR_b.TEND) == 0); +#else while ((p_ctrl->p_reg->SSR_b.TEND) == 0); +#endif return RT_EOK; } diff --git a/bsp/renesas/libraries/Kconfig b/bsp/renesas/libraries/Kconfig index 8aad8b4fc58..650384057a6 100644 --- a/bsp/renesas/libraries/Kconfig +++ b/bsp/renesas/libraries/Kconfig @@ -1,52 +1,50 @@ -config SOC_FAMILY_RENESAS +config SOC_FAMILY_RENESAS_RA + bool + default n + +config SOC_FAMILY_RENESAS_RZ bool default n config SOC_SERIES_R7FA6M3 bool select ARCH_ARM_CORTEX_M4 - select SOC_FAMILY_RENESAS + select SOC_FAMILY_RENESAS_RA default n config SOC_SERIES_R7FA6M4 bool select ARCH_ARM_CORTEX_M4 - select SOC_FAMILY_RENESAS + select SOC_FAMILY_RENESAS_RA default n config SOC_SERIES_R7FA2L1 bool select ARCH_ARM_CORTEX_M23 - select SOC_FAMILY_RENESAS + select SOC_FAMILY_RENESAS_RA default n config SOC_SERIES_R7FA6M5 bool select ARCH_ARM_CORTEX_M33 - select SOC_FAMILY_RENESAS + select SOC_FAMILY_RENESAS_RA default n config SOC_SERIES_R7FA4M2 bool select ARCH_ARM_CORTEX_M4 - select SOC_FAMILY_RENESAS + select SOC_FAMILY_RENESAS_RA default n config SOC_SERIES_R7FA8M85 bool select ARCH_ARM_CORTEX_M85 - select SOC_FAMILY_RENESAS + select SOC_FAMILY_RENESAS_RA default n config SOC_SERIES_R9A07G0 bool select ARCH_ARM_CORTEX_R52 - select SOC_FAMILY_RENESAS - default n - -config SOC_SERIES_R7FA6E2 - bool - select ARCH_ARM_CORTEX_M33 - select SOC_FAMILY_RENESAS + select SOC_FAMILY_RENESAS_RZ default n \ No newline at end of file From a595c969ab1ece760fe5c18e4d06b721330312e8 Mon Sep 17 00:00:00 2001 From: newflydd Date: Mon, 13 Jan 2025 14:02:59 +0800 Subject: [PATCH 10/10] fix gpio and sci drivers for RZ series --- bsp/renesas/libraries/HAL_Drivers/drv_gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c b/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c index 9bf5cef602e..374a0a6d4df 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c +++ b/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c @@ -327,7 +327,7 @@ static rt_base_t ra_pin_get(const char *name) { return (name[1] - '0') * 0x100 + (name[2] - '0') * 10 + (name[3] - '0'); } - LOG_W("Invalid pin expression, use `PXXX` format like `P101`"); + LOG_W("Invalid pin expression, use `PXXX` format like `P101`"); #endif return -RT_ERROR; }