[lldb][RISC-V] Extended if conditions to support alias names for registers (#124475)

Extending the conditionals in `AugmentRegisterInfo` to support
alternative names for lldb.

Fixes #124023

There is an exception with register `X8` which is not covered here but
more details can be found in the issue
llvm/llvm-project#127900.

Author: kper

lit/llvm/config.py

@@ -169,8 +169,12 @@ def __init__(self, lit_config, config):
                 features.add("target-aarch64")
             elif re.match(r"^arm.*", target_triple):
                 features.add("target-arm")
-            if re.match(r'^ppc64le.*-linux', target_triple):
-                features.add('target=powerpc64le-linux')
+            elif re.match(r"^ppc64le.*-linux", target_triple):
+                features.add("target=powerpc64le-linux")
+            elif re.match(r"^riscv64-.*-elf", target_triple):
+                features.add("target-riscv64")
+            elif re.match(r"^riscv32-.*-elf.", target_triple):
+                features.add("target-riscv32")
 
         if not user_is_root():
             features.add("non-root-user")