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agausmannagausmann
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Add avrxmega crate; add port implementations for xmega / attiny404
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‎Cargo.toml‎

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@@ -18,6 +18,7 @@ members = [
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# MCU HAL crates
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"mcu/atmega-hal",
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"mcu/attiny-hal",
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"mcu/avrxmega-hal",
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# Higher level crates
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"arduino-hal",

‎avr-hal-generic/src/port.rs‎

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@@ -663,6 +663,237 @@ macro_rules! impl_port_traditional {
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};
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}
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#[macro_export]
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macro_rules! impl_port_xmega {
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(
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enum Ports {
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$($PortName:ident: ($Port:ty),)+
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}
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$(#[$pins_attr:meta])*
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pub struct Pins {
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$($pin:ident: $Pin:ident = ($PinPort:ty, $PinPortName:ident, $pin_num:expr, $pin_pinctrl_reg:ident),)+
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}
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) => {
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/// Type-alias for a pin type which can represent any concrete pin.
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///
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/// Sometimes it is easier to handle pins if they are all of the same type. By default,
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/// each pin gets its own distinct type in `avr-hal`, but by
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/// [downgrading][avr_hal_generic::port::Pin#downgrading], you can cast them into this
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/// "dynamic" type. Do note, however, that using this dynamic type has a runtime cost.
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pub type Pin<MODE, PIN = Dynamic> = $crate::port::Pin<MODE, PIN>;
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$(#[$pins_attr])*
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pub struct Pins {
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$(pub $pin: Pin<
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mode::Input<mode::Floating>,
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$Pin,
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>,)+
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}
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impl Pins {
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pub fn new(
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$(_: $Port,)+
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) -> Self {
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Self {
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$($pin: $crate::port::Pin::new(
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$Pin { _private: (), }
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),)+
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}
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}
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}
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#[repr(u8)]
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pub enum DynamicPort {
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$($PortName,)+
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}
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pub struct Dynamic {
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port: DynamicPort,
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// We'll store the mask instead of the pin number because this allows much less code to
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// be generated for the trait method implementations.
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//
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// (TODO verify this statement quantitatively? This implementation detail was
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// copied from impl_port_traditional, but it makes some things more complicated,
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// like accessing PINxCTRL to configure pull-up.
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mask: u8,
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}
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impl Dynamic {
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fn new(port: DynamicPort, pin_num: u8) -> Self {
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Self {
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port,
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mask: 1 << pin_num,
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}
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}
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}
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impl $crate::port::PinOps for Dynamic {
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type Dynamic = Self;
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#[inline]
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fn into_dynamic(self) -> Self::Dynamic {
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self
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}
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#[inline]
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unsafe fn out_set(&mut self) {
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match self.port {
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$(DynamicPort::$PortName => (*<$Port>::ptr()).outset.write(|w| {
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w.bits(self.mask)
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}),)+
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}
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}
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#[inline]
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unsafe fn out_clear(&mut self) {
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match self.port {
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$(DynamicPort::$PortName => (*<$Port>::ptr()).outclr.write(|w| {
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w.bits(self.mask)
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}),)+
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}
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}
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#[inline]
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unsafe fn out_toggle(&mut self) {
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match self.port {
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$(DynamicPort::$PortName => (*<$Port>::ptr()).outtgl.write(|w| {
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w.bits(self.mask)
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}),)+
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}
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}
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#[inline]
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unsafe fn out_get(&self) -> bool {
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match self.port {
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$(DynamicPort::$PortName => (*<$Port>::ptr()).out.read().bits()
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& self.mask != 0,)+
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}
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}
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#[inline]
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unsafe fn in_get(&self) -> bool {
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match self.port {
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$(DynamicPort::$PortName => (*<$Port>::ptr()).in_.read().bits()
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& self.mask != 0,)+
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}
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}
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#[inline]
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unsafe fn make_output(&mut self) {
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match self.port {
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$(DynamicPort::$PortName => (*<$Port>::ptr()).dirset.write(|w| {
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w.bits(self.mask)
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}),)+
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}
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}
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#[inline]
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unsafe fn make_input(&mut self, pull_up: bool) {
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match self.port {
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$(DynamicPort::$PortName => {
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if pull_up {
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match self.mask {
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0x01 => (*<$Port>::ptr()).pin0ctrl.modify(|_, w| w.pullupen().set_bit()),
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0x02 => (*<$Port>::ptr()).pin1ctrl.modify(|_, w| w.pullupen().set_bit()),
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0x04 => (*<$Port>::ptr()).pin2ctrl.modify(|_, w| w.pullupen().set_bit()),
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0x08 => (*<$Port>::ptr()).pin3ctrl.modify(|_, w| w.pullupen().set_bit()),
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0x10 => (*<$Port>::ptr()).pin4ctrl.modify(|_, w| w.pullupen().set_bit()),
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0x20 => (*<$Port>::ptr()).pin5ctrl.modify(|_, w| w.pullupen().set_bit()),
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0x40 => (*<$Port>::ptr()).pin6ctrl.modify(|_, w| w.pullupen().set_bit()),
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0x80 => (*<$Port>::ptr()).pin7ctrl.modify(|_, w| w.pullupen().set_bit()),
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// TODO exhaustive match with an enum?
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//_ => unreachable!()
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_ => {}
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}
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} else {
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match self.mask {
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0x01 => (*<$Port>::ptr()).pin0ctrl.modify(|_, w| w.pullupen().clear_bit()),
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0x02 => (*<$Port>::ptr()).pin1ctrl.modify(|_, w| w.pullupen().clear_bit()),
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0x04 => (*<$Port>::ptr()).pin2ctrl.modify(|_, w| w.pullupen().clear_bit()),
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0x08 => (*<$Port>::ptr()).pin3ctrl.modify(|_, w| w.pullupen().clear_bit()),
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0x10 => (*<$Port>::ptr()).pin4ctrl.modify(|_, w| w.pullupen().clear_bit()),
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0x20 => (*<$Port>::ptr()).pin5ctrl.modify(|_, w| w.pullupen().clear_bit()),
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0x40 => (*<$Port>::ptr()).pin6ctrl.modify(|_, w| w.pullupen().clear_bit()),
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0x80 => (*<$Port>::ptr()).pin7ctrl.modify(|_, w| w.pullupen().clear_bit()),
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// TODO exhaustive match with an enum?
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//_ => unreachable!()
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_ => {}
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}
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}
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(*<$Port>::ptr()).dirclr.write(|w| {
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w.bits(self.mask)
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});
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})+
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}
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}
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}
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$(
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pub struct $Pin {
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_private: ()
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}
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impl $crate::port::PinOps for $Pin {
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type Dynamic = Dynamic;
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#[inline]
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fn into_dynamic(self) -> Self::Dynamic {
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Dynamic::new(DynamicPort::$PinPortName, $pin_num)
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}
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#[inline]
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unsafe fn out_set(&mut self) {
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(*<$PinPort>::ptr()).outset.write(|w| {
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w.bits(1 << $pin_num)
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});
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}
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#[inline]
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unsafe fn out_clear(&mut self) {
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(*<$PinPort>::ptr()).outclr.write(|w| {
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w.bits(1 << $pin_num)
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});
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}
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#[inline]
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unsafe fn out_toggle(&mut self) {
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(*<$PinPort>::ptr()).outtgl.write(|w| w.bits(1 << $pin_num));
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}
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#[inline]
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unsafe fn out_get(&self) -> bool {
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(*<$PinPort>::ptr()).out.read().bits() & (1 << $pin_num) != 0
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}
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#[inline]
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unsafe fn in_get(&self) -> bool {
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(*<$PinPort>::ptr()).in_.read().bits() & (1 << $pin_num) != 0
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}
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#[inline]
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unsafe fn make_output(&mut self) {
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(*<$PinPort>::ptr()).dirset.write(|w| {
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w.bits(1 << $pin_num)
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});
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}
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#[inline]
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unsafe fn make_input(&mut self, pull_up: bool) {
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if pull_up {
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(*<$PinPort>::ptr()).$pin_pinctrl_reg.modify(|_, w| w.pullupen().set_bit());
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} else {
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(*<$PinPort>::ptr()).$pin_pinctrl_reg.modify(|_, w| w.pullupen().clear_bit());
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}
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(*<$PinPort>::ptr()).dirclr.write(|w| {
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w.bits(1 << $pin_num)
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});
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}
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}
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)+
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};
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}
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#[macro_export]
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macro_rules! renamed_pins {
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(

‎mcu/avrxmega-hal/Cargo.toml‎

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[package]
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name = "avrxmega-hal"
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version = "0.1.0"
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edition = "2018"
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[features]
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rt = ["avr-device/rt"]
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device-selected = []
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attiny404 = ["avr-device/attiny404", "device-selected"]
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# Allow certain downstream crates to overwrite the device selection error by themselves.
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disable-device-selection-error = []
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[dependencies]
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avr-hal-generic = { path = "../../avr-hal-generic/" }
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[dependencies.avr-device]
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version = "0.4"
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# Because this crate has its own check that at least one device is selected, we
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# can safely "circumvent" the check in `avr-device`.
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#
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# Why would we want that? Otherwise, as `avr-device` is compiled first, its
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# error will be shown and ours won't which leads to a degraded user experience
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# as the displayed error message does not really tell what needs to be done...
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features = ["device-selected"]

‎mcu/avrxmega-hal/src/lib.rs‎

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#![no_std]
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//! `avrxmega-hal`
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//! =============
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//! Common HAL (hardware abstraction layer) for AVR XMEGA microcontrollers.
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//!
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//! **Note**: This version of the documentation was built for
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#![cfg_attr(feature = "attiny404", doc = "**ATtiny404**.")]
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//! This means that only items which are available for this MCU are visible. If you are using
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//! a different chip, try building the documentation locally with:
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//!
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//! ```text
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//! cargo doc --features <your-mcu> --open
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//! ```
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#[cfg(all(
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not(feature = "device-selected"),
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not(feature = "disable-device-selection-error")
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))]
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compile_error!(
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"This crate requires you to specify your target chip as a feature.
22+
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Please select one of the following
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25+
* attiny404
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"
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);
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/// Reexport of `attiny404` from `avr-device`
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#[cfg(feature = "attiny404")]
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pub use avr_device::attiny404 as pac;
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/// See [`avr_device::entry`](https://docs.rs/avr-device/latest/avr_device/attr.entry.html).
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#[cfg(feature = "rt")]
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pub use avr_device::entry;
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#[cfg(feature = "device-selected")]
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pub use pac::Peripherals;
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pub use avr_hal_generic::clock;
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pub use avr_hal_generic::delay;
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pub use avr_hal_generic::prelude;
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#[cfg(feature = "device-selected")]
45+
pub mod port;
46+
#[cfg(feature = "device-selected")]
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pub use port::Pins;
48+
49+
#[cfg(feature = "attiny404")]
50+
#[macro_export]
51+
macro_rules! pins {
52+
($p:expr) => {
53+
$crate::Pins::new($p.PORTA, $p.PORTB)
54+
};
55+
}

‎mcu/avrxmega-hal/src/port.rs‎

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pub use avr_hal_generic::port::{mode, PinOps, PinMode};
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#[cfg(feature = "attiny404")]
4+
avr_hal_generic::impl_port_xmega! {
5+
enum Ports {
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PORTA: (crate::pac::PORTA),
7+
PORTB: (crate::pac::PORTB),
8+
}
9+
10+
pub struct Pins {
11+
pa0: PA0 = (crate::pac::PORTA, PORTA, 0, pin0ctrl),
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pa1: PA1 = (crate::pac::PORTA, PORTA, 1, pin1ctrl),
13+
pa2: PA2 = (crate::pac::PORTA, PORTA, 2, pin2ctrl),
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pa3: PA3 = (crate::pac::PORTA, PORTA, 3, pin3ctrl),
15+
pa4: PA4 = (crate::pac::PORTA, PORTA, 4, pin4ctrl),
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pa5: PA5 = (crate::pac::PORTA, PORTA, 5, pin5ctrl),
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pa6: PA6 = (crate::pac::PORTA, PORTA, 6, pin6ctrl),
18+
pa7: PA7 = (crate::pac::PORTA, PORTA, 7, pin7ctrl),
19+
20+
pb0: PB0 = (crate::pac::PORTB, PORTB, 0, pin0ctrl),
21+
pb1: PB1 = (crate::pac::PORTB, PORTB, 1, pin1ctrl),
22+
pb2: PB2 = (crate::pac::PORTB, PORTB, 2, pin2ctrl),
23+
pb3: PB3 = (crate::pac::PORTB, PORTB, 3, pin3ctrl),
24+
}
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}

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