From c046a6645dfdfda92e318e88556d48bbe62dc9b7 Mon Sep 17 00:00:00 2001 From: Rahix Date: Sun, 5 May 2024 00:41:16 +0200 Subject: [PATCH 01/11] [NO MERGE][skip ci] Temporarily use local version of avr-device --- Cargo.toml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Cargo.toml b/Cargo.toml index ca159ee2b2..b1acd78b66 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -42,3 +42,6 @@ exclude = [ "ravedude", ] resolver = "2" + +[patch.crates-io] +avr-device = { git = "https://github.com/rahix/avr-device", rev = "79d4a0b5b20e88983015ccc0fa088cf17f035d21" } From cd7ed206a91bee99fdf66b398331ba009950e61c Mon Sep 17 00:00:00 2001 From: Rahix Date: Tue, 5 Nov 2024 00:28:54 +0100 Subject: [PATCH 02/11] [NO MERGE] ci: Temporarily disable fail-fast This allows us to see which targets are currently failing the build. --- .github/workflows/ci.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 4ed6498729..e8b60b7e7c 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -12,7 +12,7 @@ jobs: ci: name: "${{ matrix.m.type }}: ${{ matrix.m.name }}" strategy: - fail-fast: true + fail-fast: false matrix: m: - type: board From 579f9cdded42fb070b20597c18f84bb8aa54063d Mon Sep 17 00:00:00 2001 From: Rahix Date: Sun, 5 May 2024 01:05:34 +0200 Subject: [PATCH 03/11] treewide: Apply changes for new svd2rust API As avr-device is upgrading to use svd2rust version 0.33.1, there are some significant changes in the generated API. We have to adapt the HAL code to use the new API whereever relevant. This commit was mostly generated using the following command, which adds the parentheses behind each register access to change it from struct-field access to method call. cargo build --message-format json 2>/dev/null \ | jq '.message.children[].spans[] | {file: .file_name, line: .line_start, col: (.text[0].highlight_start - 1), insert: .suggested_replacement}' 2>/dev/null \ | jq -r '"sed -ri '"'"'" + (.line | tostring) + "s/^(.{" + (.col | tostring) + "})/\\1" + .insert + "/'"'"' $(cd ../..; realpath " + .file + ")"' \ | sort | uniq | bash Shell magic for the win :) Beyond this, .bits() had to be converted to .set() where safe accesses are performed. --- avr-hal-generic/src/adc.rs | 10 +- avr-hal-generic/src/eeprom.rs | 48 +-- avr-hal-generic/src/i2c.rs | 40 +-- avr-hal-generic/src/port.rs | 32 +- avr-hal-generic/src/simple_pwm.rs | 4 +- avr-hal-generic/src/spi.rs | 12 +- avr-hal-generic/src/usart.rs | 24 +- avr-hal-generic/src/wdt.rs | 8 +- .../arduino-uno/src/bin/uno-ext-interrupt.rs | 4 +- examples/arduino-uno/src/bin/uno-hc-sr04.rs | 12 +- examples/arduino-uno/src/bin/uno-infrared.rs | 12 +- .../arduino-uno/src/bin/uno-manual-servo.rs | 12 +- examples/arduino-uno/src/bin/uno-millis.rs | 8 +- .../src/bin/uno-pin-change-interrupt.rs | 4 +- examples/arduino-uno/src/bin/uno-timer.rs | 12 +- examples/arduino-uno/src/bin/uno-watchdog.rs | 2 +- examples/nano168/src/bin/nano168-millis.rs | 8 +- examples/nano168/src/bin/nano168-watchdog.rs | 2 +- mcu/atmega-hal/src/adc.rs | 24 +- mcu/atmega-hal/src/eeprom.rs | 14 +- mcu/atmega-hal/src/simple_pwm.rs | 316 +++++++++--------- mcu/atmega-hal/src/usart.rs | 76 ++--- mcu/attiny-hal/src/adc.rs | 16 +- mcu/attiny-hal/src/eeprom.rs | 6 +- mcu/attiny-hal/src/simple_pwm.rs | 60 ++-- 25 files changed, 383 insertions(+), 383 deletions(-) diff --git a/avr-hal-generic/src/adc.rs b/avr-hal-generic/src/adc.rs index 0d6904c2d4..acf5ec4c62 100644 --- a/avr-hal-generic/src/adc.rs +++ b/avr-hal-generic/src/adc.rs @@ -250,17 +250,17 @@ macro_rules! impl_adc { #[inline] fn raw_read_adc(&self) -> u16 { - self.adc.read().bits() + self.adc().read().bits() } #[inline] fn raw_is_converting(&self) -> bool { - self.adcsra.read().adsc().bit_is_set() + self.adcsra().read().adsc().bit_is_set() } #[inline] fn raw_start_conversion(&mut self) { - self.adcsra.modify(|_, w| w.adsc().set_bit()); + self.adcsra().modify(|_, w| w.adsc().set_bit()); } #[inline] @@ -276,7 +276,7 @@ macro_rules! impl_adc { match channel { $( x if x == $pin_channel => { - $(self.$didr.modify(|_, w| w.$didr_method().set_bit());)? + $(self.$didr().modify(|_, w| w.$didr_method().set_bit());)? } )+ _ => unreachable!(), @@ -288,7 +288,7 @@ macro_rules! impl_adc { match channel { $( x if x == $pin_channel => { - $(self.$didr.modify(|_, w| w.$didr_method().clear_bit());)? + $(self.$didr().modify(|_, w| w.$didr_method().clear_bit());)? } )+ _ => unreachable!(), diff --git a/avr-hal-generic/src/eeprom.rs b/avr-hal-generic/src/eeprom.rs index ce9094519b..3893da0604 100644 --- a/avr-hal-generic/src/eeprom.rs +++ b/avr-hal-generic/src/eeprom.rs @@ -159,8 +159,8 @@ macro_rules! impl_eeprom_common { $set_address } - self.eecr.write(|w| w.eere().set_bit()); - self.eedr.read().bits() + self.eecr().write(|w| w.eere().set_bit()); + self.eedr().read().bits() } } @@ -173,8 +173,8 @@ macro_rules! impl_eeprom_common { } //Start EEPROM read operation - self.eecr.write(|w| w.eere().set_bit()); - let old_value = self.eedr.read().bits(); + self.eecr().write(|w| w.eere().set_bit()); + let old_value = self.eedr().read().bits(); let diff_mask = old_value ^ data; // Check if any bits are changed to '1' in the new value. @@ -184,20 +184,20 @@ macro_rules! impl_eeprom_common { // Check if any bits in the new value are '0'. if data != 0xff { // Now we know that some bits need to be programmed to '0' also. - self.eedr.write(|w| w.bits(data)); // Set EEPROM data register. + self.eedr().write(|w| w.bits(data)); // Set EEPROM data register. { let $periph_ewmode_var = &self; $set_erasewrite_mode } - self.eecr.modify(|_, w| w.eepe().set_bit()); // Start Erase+Write operation. + self.eecr().modify(|_, w| w.eepe().set_bit()); // Start Erase+Write operation. } else { // Now we know that all bits should be erased. { let $periph_emode_var = &self; $set_erase_mode } - self.eecr.modify(|_, w| w.eepe().set_bit()); // Start Erase-only operation. + self.eecr().modify(|_, w| w.eepe().set_bit()); // Start Erase-only operation. } } //Now we know that _no_ bits need to be erased to '1'. @@ -205,12 +205,12 @@ macro_rules! impl_eeprom_common { // Check if any bits are changed from '1' in the old value. if diff_mask != 0 { // Now we know that _some_ bits need to the programmed to '0'. - self.eedr.write(|w| w.bits(data)); // Set EEPROM data register. + self.eedr().write(|w| w.bits(data)); // Set EEPROM data register. { let $periph_wmode_var = &self; $set_write_mode } - self.eecr.modify(|_, w| w.eepe().set_bit()); // Start Write-only operation. + self.eecr().modify(|_, w| w.eepe().set_bit()); // Start Write-only operation. } } } @@ -229,7 +229,7 @@ macro_rules! impl_eeprom_common { $set_erase_mode } // Start Erase-only operation. - self.eecr.modify(|_, w| w.eepe().set_bit()); + self.eecr().modify(|_, w| w.eepe().set_bit()); } } } @@ -249,7 +249,7 @@ macro_rules! impl_eeprom_atmega_old { #[inline] pub unsafe fn wait_read(regs: &$EEPROM) { //Wait for completion of previous write. - while regs.eecr.read().eewe().bit_is_set() {} + while regs.eecr().read().eewe().bit_is_set() {} } #[inline] @@ -268,8 +268,8 @@ macro_rules! impl_eeprom_atmega_old { unsafe { atmega_helper::set_address(&self, address); } - self.eecr.write(|w| w.eere().set_bit()); - self.eedr.read().bits() + self.eecr().write(|w| w.eere().set_bit()); + self.eedr().read().bits() } fn raw_write_byte(&mut self, address: u16, data: u8) { @@ -278,11 +278,11 @@ macro_rules! impl_eeprom_atmega_old { } //Start EEPROM read operation - self.eedr.write(|w| unsafe { w.bits(data) }); + self.eedr().write(|w| unsafe { w.bits(data) }); - self.eecr.write(|w| w.eemwe().set_bit().eewe().clear_bit()); + self.eecr().write(|w| w.eemwe().set_bit().eewe().clear_bit()); - self.eecr.write(|w| w.eewe().set_bit()); + self.eecr().write(|w| w.eewe().set_bit()); } fn raw_erase_byte(&mut self, address: u16) { @@ -305,7 +305,7 @@ macro_rules! impl_eeprom_atmega { #[inline] pub unsafe fn wait_read(regs: &$EEPROM) { //Wait for completion of previous write. - while regs.eecr.read().eepe().bit_is_set() {} + while regs.eecr().read().eepe().bit_is_set() {} } #[inline] pub unsafe fn set_address(regs: &$EEPROM, address: $addrwidth) { @@ -316,21 +316,21 @@ macro_rules! impl_eeprom_atmega { } #[inline] pub unsafe fn set_erasewrite_mode(regs: &$EEPROM) { - regs.eecr.write(|w| { + regs.eecr().write(|w| { // Set Master Write Enable bit, and and Erase+Write mode mode.. w.eempe().set_bit().eepm().val_0x00() }) } #[inline] pub unsafe fn set_erase_mode(regs: &$EEPROM) { - regs.eecr.write(|w| { + regs.eecr().write(|w| { // Set Master Write Enable bit, and Erase-only mode.. w.eempe().set_bit().eepm().val_0x01() }); } #[inline] pub unsafe fn set_write_mode(regs: &$EEPROM) { - regs.eecr.write(|w| { + regs.eecr().write(|w| { // Set Master Write Enable bit, and Write-only mode.. w.eempe().set_bit().eepm().val_0x02() }); @@ -362,7 +362,7 @@ macro_rules! impl_eeprom_attiny { mod attiny_helper { #[inline] pub unsafe fn wait_read(regs: &$EEPROM) { - while regs.eecr.read().eepe().bit_is_set() {} + while regs.eecr().read().eepe().bit_is_set() {} } #[inline] pub unsafe fn set_address(regs: &$EEPROM, address: $addrwidth) { @@ -373,21 +373,21 @@ macro_rules! impl_eeprom_attiny { } #[inline] pub unsafe fn set_erasewrite_mode(regs: &$EEPROM) { - regs.eecr.write(|w| { + regs.eecr().write(|w| { // Set Master Write Enable bit...and and Erase+Write mode mode.. w.eempe().set_bit().eepm().atomic() }); } #[inline] pub unsafe fn set_erase_mode(regs: &$EEPROM) { - regs.eecr.write(|w| { + regs.eecr().write(|w| { // Set Master Write Enable bit, and Erase-only mode.. w.eempe().set_bit().eepm().erase() }); } #[inline] pub unsafe fn set_write_mode(regs: &$EEPROM) { - regs.eecr.write(|w| { + regs.eecr().write(|w| { // Set Master Write Enable bit, and Write-only mode.. w.eempe().set_bit().eepm().write() }); diff --git a/avr-hal-generic/src/i2c.rs b/avr-hal-generic/src/i2c.rs index 1159ce2cf6..839e0a4a6a 100644 --- a/avr-hal-generic/src/i2c.rs +++ b/avr-hal-generic/src/i2c.rs @@ -466,22 +466,22 @@ macro_rules! impl_i2c_twi { fn raw_setup(&mut self, speed: u32) { // Calculate TWBR register value let twbr = ((CLOCK::FREQ / speed) - 16) / 2; - self.twbr.write(|w| unsafe { w.bits(twbr as u8) }); + self.twbr().write(|w| unsafe { w.bits(twbr as u8) }); // Disable prescaler - self.twsr.write(|w| w.twps().prescaler_1()); + self.twsr().write(|w| w.twps().prescaler_1()); } #[inline] fn raw_start(&mut self, address: u8, direction: Direction) -> Result<(), Error> { // Write start condition - self.twcr + self.twcr() .write(|w| w.twen().set_bit().twint().set_bit().twsta().set_bit()); // wait() - while self.twcr.read().twint().bit_is_clear() {} + while self.twcr().read().twint().bit_is_clear() {} // Validate status - match self.twsr.read().tws().bits() { + match self.twsr().read().tws().bits() { $crate::i2c::twi_status::TW_START | $crate::i2c::twi_status::TW_REP_START => (), $crate::i2c::twi_status::TW_MT_ARB_LOST | $crate::i2c::twi_status::TW_MR_ARB_LOST => { @@ -502,13 +502,13 @@ macro_rules! impl_i2c_twi { 0 }; let rawaddr = (address << 1) | dirbit; - self.twdr.write(|w| unsafe { w.bits(rawaddr) }); + self.twdr().write(|w| unsafe { w.bits(rawaddr) }); // transact() - self.twcr.write(|w| w.twen().set_bit().twint().set_bit()); - while self.twcr.read().twint().bit_is_clear() {} + self.twcr().write(|w| w.twen().set_bit().twint().set_bit()); + while self.twcr().read().twint().bit_is_clear() {} // Check if the slave responded - match self.twsr.read().tws().bits() { + match self.twsr().read().tws().bits() { $crate::i2c::twi_status::TW_MT_SLA_ACK | $crate::i2c::twi_status::TW_MR_SLA_ACK => (), $crate::i2c::twi_status::TW_MT_SLA_NACK @@ -535,12 +535,12 @@ macro_rules! impl_i2c_twi { #[inline] fn raw_write(&mut self, bytes: &[u8]) -> Result<(), Error> { for byte in bytes { - self.twdr.write(|w| unsafe { w.bits(*byte) }); + self.twdr().write(|w| unsafe { w.bits(*byte) }); // transact() - self.twcr.write(|w| w.twen().set_bit().twint().set_bit()); - while self.twcr.read().twint().bit_is_clear() {} + self.twcr().write(|w| w.twen().set_bit().twint().set_bit()); + while self.twcr().read().twint().bit_is_clear() {} - match self.twsr.read().tws().bits() { + match self.twsr().read().tws().bits() { $crate::i2c::twi_status::TW_MT_DATA_ACK => (), $crate::i2c::twi_status::TW_MT_DATA_NACK => { self.raw_stop()?; @@ -565,17 +565,17 @@ macro_rules! impl_i2c_twi { let last = buffer.len() - 1; for (i, byte) in buffer.iter_mut().enumerate() { if i != last { - self.twcr + self.twcr() .write(|w| w.twint().set_bit().twen().set_bit().twea().set_bit()); // wait() - while self.twcr.read().twint().bit_is_clear() {} + while self.twcr().read().twint().bit_is_clear() {} } else { - self.twcr.write(|w| w.twint().set_bit().twen().set_bit()); + self.twcr().write(|w| w.twint().set_bit().twen().set_bit()); // wait() - while self.twcr.read().twint().bit_is_clear() {} + while self.twcr().read().twint().bit_is_clear() {} } - match self.twsr.read().tws().bits() { + match self.twsr().read().tws().bits() { $crate::i2c::twi_status::TW_MR_DATA_ACK | $crate::i2c::twi_status::TW_MR_DATA_NACK => (), $crate::i2c::twi_status::TW_MR_ARB_LOST => { @@ -589,14 +589,14 @@ macro_rules! impl_i2c_twi { } } - *byte = self.twdr.read().bits(); + *byte = self.twdr().read().bits(); } Ok(()) } #[inline] fn raw_stop(&mut self) -> Result<(), Error> { - self.twcr + self.twcr() .write(|w| w.twen().set_bit().twint().set_bit().twsto().set_bit()); Ok(()) } diff --git a/avr-hal-generic/src/port.rs b/avr-hal-generic/src/port.rs index 2e44ffc950..9e1259f07f 100644 --- a/avr-hal-generic/src/port.rs +++ b/avr-hal-generic/src/port.rs @@ -633,7 +633,7 @@ macro_rules! impl_port_traditional_base { #[inline] unsafe fn out_set(&mut self) { match self.port { - $(DynamicPort::[] => (*<$port>::ptr()).[].modify(|r, w| { + $(DynamicPort::[] => (*<$port>::ptr()).[]().modify(|r, w| { w.bits(r.bits() | self.mask) }),)+ } @@ -642,7 +642,7 @@ macro_rules! impl_port_traditional_base { #[inline] unsafe fn out_clear(&mut self) { match self.port { - $(DynamicPort::[] => (*<$port>::ptr()).[].modify(|r, w| { + $(DynamicPort::[] => (*<$port>::ptr()).[]().modify(|r, w| { w.bits(r.bits() & !self.mask) }),)+ } @@ -653,14 +653,14 @@ macro_rules! impl_port_traditional_base { match self.port { $(DynamicPort::[] => { if $chip_supports_atomic_toggle { - (*<$port>::ptr()).[].write(|w| { + (*<$port>::ptr()).[]().write(|w| { w.bits(self.mask) }) } else { // This read-modify-write sequence cannot be optimized into a single sbi/cbi instruction, // so it is wrapped in a critical section which ensures we will never hit a race-condition here. $crate::avr_device::interrupt::free(|_| { - (*<$port>::ptr()).[].modify(|r, w| { + (*<$port>::ptr()).[]().modify(|r, w| { w.bits(r.bits() ^ self.mask) }) }) @@ -673,7 +673,7 @@ macro_rules! impl_port_traditional_base { unsafe fn out_get(&self) -> bool { match self.port { $(DynamicPort::[] => { - (*<$port>::ptr()).[].read().bits() & self.mask != 0 + (*<$port>::ptr()).[]().read().bits() & self.mask != 0 })+ } } @@ -682,7 +682,7 @@ macro_rules! impl_port_traditional_base { unsafe fn in_get(&self) -> bool { match self.port { $(DynamicPort::[] => { - (*<$port>::ptr()).[].read().bits() & self.mask != 0 + (*<$port>::ptr()).[]().read().bits() & self.mask != 0 })+ } } @@ -690,7 +690,7 @@ macro_rules! impl_port_traditional_base { #[inline] unsafe fn make_output(&mut self) { match self.port { - $(DynamicPort::[] => (*<$port>::ptr()).[].modify(|r, w| { + $(DynamicPort::[] => (*<$port>::ptr()).[]().modify(|r, w| { w.bits(r.bits() | self.mask) }),)+ } @@ -699,7 +699,7 @@ macro_rules! impl_port_traditional_base { #[inline] unsafe fn make_input(&mut self, pull_up: bool) { match self.port { - $(DynamicPort::[] => (*<$port>::ptr()).[].modify(|r, w| { + $(DynamicPort::[] => (*<$port>::ptr()).[]().modify(|r, w| { w.bits(r.bits() & !self.mask) }),)+ } @@ -728,14 +728,14 @@ macro_rules! impl_port_traditional_base { #[inline] unsafe fn out_set(&mut self) { - (*<$port>::ptr()).[].modify(|_, w| { + (*<$port>::ptr()).[]().modify(|_, w| { w.[

]().set_bit() }) } #[inline] unsafe fn out_clear(&mut self) { - (*<$port>::ptr()).[].modify(|_, w| { + (*<$port>::ptr()).[]().modify(|_, w| { w.[

]().clear_bit() }) } @@ -743,14 +743,14 @@ macro_rules! impl_port_traditional_base { #[inline] unsafe fn out_toggle(&mut self) { if $chip_supports_atomic_toggle { - (*<$port>::ptr()).[].write(|w| { + (*<$port>::ptr()).[]().write(|w| { w.[

]().set_bit() }) } else { // This read-modify-write sequence cannot be optimized into a single sbi/cbi instruction, // so it is wrapped in a critical section which ensures we will never hit a race-condition here. $crate::avr_device::interrupt::free(|_| { - (*<$port>::ptr()).[].modify(|r, w| { + (*<$port>::ptr()).[]().modify(|r, w| { w.[

]().bit(!r.[

]().bit()) }) }) @@ -759,24 +759,24 @@ macro_rules! impl_port_traditional_base { #[inline] unsafe fn out_get(&self) -> bool { - (*<$port>::ptr()).[].read().[

]().bit() + (*<$port>::ptr()).[]().read().[

]().bit() } #[inline] unsafe fn in_get(&self) -> bool { - (*<$port>::ptr()).[].read().[

]().bit() + (*<$port>::ptr()).[]().read().[

]().bit() } #[inline] unsafe fn make_output(&mut self) { - (*<$port>::ptr()).[].modify(|_, w| { + (*<$port>::ptr()).[]().modify(|_, w| { w.[

]().set_bit() }) } #[inline] unsafe fn make_input(&mut self, pull_up: bool) { - (*<$port>::ptr()).[].modify(|_, w| { + (*<$port>::ptr()).[]().modify(|_, w| { w.[

]().clear_bit() }); if pull_up { diff --git a/avr-hal-generic/src/simple_pwm.rs b/avr-hal-generic/src/simple_pwm.rs index 93b4081bf5..b0330927c6 100644 --- a/avr-hal-generic/src/simple_pwm.rs +++ b/avr-hal-generic/src/simple_pwm.rs @@ -175,7 +175,7 @@ macro_rules! impl_simple_pwm { } fn get_duty(&self) -> Self::Duty { - unsafe { (&*<$TIMER>::ptr()) }.$ocr.read().bits() as Self::Duty + unsafe { (&*<$TIMER>::ptr()) }.$ocr().read().bits() as Self::Duty } fn get_max_duty(&self) -> Self::Duty { @@ -185,7 +185,7 @@ macro_rules! impl_simple_pwm { fn set_duty(&mut self, duty: Self::Duty) { // SAFETY: This register is exclusively used here so there are no concurrency // issues. - unsafe { (&*<$TIMER>::ptr()).$ocr.write(|w| w.bits(duty.into())); }; + unsafe { (&*<$TIMER>::ptr()).$ocr().write(|w| w.bits(duty.into())); }; } } )+ diff --git a/avr-hal-generic/src/spi.rs b/avr-hal-generic/src/spi.rs index 6a1bdbf154..cf90fb9f64 100644 --- a/avr-hal-generic/src/spi.rs +++ b/avr-hal-generic/src/spi.rs @@ -460,7 +460,7 @@ macro_rules! impl_spi { use $crate::hal::spi; // set up control register - self.spcr.write(|w| { + self.spcr().write(|w| { // enable SPI w.spe().set_bit(); // Set to primary mode @@ -492,7 +492,7 @@ macro_rules! impl_spi { } }); // set up 2x clock rate status bit - self.spsr.write(|w| match settings.clock { + self.spsr().write(|w| match settings.clock { SerialClockRate::OscfOver2 => w.spi2x().set_bit(), SerialClockRate::OscfOver4 => w.spi2x().clear_bit(), SerialClockRate::OscfOver8 => w.spi2x().set_bit(), @@ -504,19 +504,19 @@ macro_rules! impl_spi { } fn raw_release(&mut self) { - self.spcr.write(|w| w.spe().clear_bit()); + self.spcr().write(|w| w.spe().clear_bit()); } fn raw_check_iflag(&self) -> bool { - self.spsr.read().spif().bit_is_set() + self.spsr().read().spif().bit_is_set() } fn raw_read(&self) -> u8 { - self.spdr.read().bits() + self.spdr().read().bits() } fn raw_write(&mut self, byte: u8) { - self.spdr.write(|w| unsafe { w.bits(byte) }); + self.spdr().write(|w| unsafe { w.bits(byte) }); } fn raw_transaction(&mut self, byte: u8) -> u8 { diff --git a/avr-hal-generic/src/usart.rs b/avr-hal-generic/src/usart.rs index d929cf553b..ed670014c5 100644 --- a/avr-hal-generic/src/usart.rs +++ b/avr-hal-generic/src/usart.rs @@ -484,18 +484,18 @@ macro_rules! impl_usart_traditional { $crate::port::Pin<$crate::port::mode::Output, $txpin>, > for $USART { fn raw_init(&mut self, baudrate: $crate::usart::Baudrate) { - self.[].write(|w| unsafe { w.bits(baudrate.ubrr) }); - self.[].write(|w| w.[]().bit(baudrate.u2x)); + self.[]().write(|w| unsafe { w.bits(baudrate.ubrr) }); + self.[]().write(|w| w.[]().bit(baudrate.u2x)); // Enable receiver and transmitter but leave interrupts disabled. - self.[].write(|w| w + self.[]().write(|w| w .[]().set_bit() .[]().set_bit() ); // Set frame format to 8n1 for now. At some point, this should be made // configurable, similar to what is done in other HALs. - self.[].write(|w| w + self.[]().write(|w| w .[]().usart_async() .[]().chr8() .[]().stop1() @@ -506,11 +506,11 @@ macro_rules! impl_usart_traditional { fn raw_deinit(&mut self) { // Wait for any ongoing transfer to finish. $crate::nb::block!(self.raw_flush()).ok(); - self.[].reset(); + self.[]().reset(); } fn raw_flush(&mut self) -> $crate::nb::Result<(), core::convert::Infallible> { - if self.[].read().[]().bit_is_clear() { + if self.[]().read().[]().bit_is_clear() { Err($crate::nb::Error::WouldBlock) } else { Ok(()) @@ -521,26 +521,26 @@ macro_rules! impl_usart_traditional { // Call flush to make sure the data-register is empty self.raw_flush()?; - self.[].write(|w| unsafe { w.bits(byte) }); + self.[]().write(|w| unsafe { w.bits(byte) }); Ok(()) } fn raw_read(&mut self) -> $crate::nb::Result { - if self.[].read().[]().bit_is_clear() { + if self.[]().read().[]().bit_is_clear() { return Err($crate::nb::Error::WouldBlock); } - Ok(self.[].read().bits()) + Ok(self.[]().read().bits()) } fn raw_interrupt(&mut self, event: $crate::usart::Event, state: bool) { match event { $crate::usart::Event::RxComplete => - self.[].modify(|_, w| w.[]().bit(state)), + self.[]().modify(|_, w| w.[]().bit(state)), $crate::usart::Event::TxComplete => - self.[].modify(|_, w| w.[]().bit(state)), + self.[]().modify(|_, w| w.[]().bit(state)), $crate::usart::Event::DataRegisterEmpty => - self.[].modify(|_, w| w.[]().bit(state)), + self.[]().modify(|_, w| w.[]().bit(state)), } } } diff --git a/avr-hal-generic/src/wdt.rs b/avr-hal-generic/src/wdt.rs index 94d0a2d7ed..bb0da54fda 100644 --- a/avr-hal-generic/src/wdt.rs +++ b/avr-hal-generic/src/wdt.rs @@ -112,10 +112,10 @@ macro_rules! impl_wdt { // Reset the watchdog timer. self.raw_feed(); // Enable watchdog configuration mode. - self.$wdtcsr + self.$wdtcsr() .modify(|_, w| w.wdce().set_bit().wde().set_bit()); // Enable watchdog and set interval. - self.$wdtcsr.write(|w| { + self.$wdtcsr().write(|w| { let $to = timeout; let $w = w; ($to_match).wde().set_bit().wdce().clear_bit() @@ -143,10 +143,10 @@ macro_rules! impl_wdt { // Reset the watchdog timer. self.raw_feed(); // Enable watchdog configuration mode. - self.$wdtcsr + self.$wdtcsr() .modify(|_, w| w.wdce().set_bit().wde().set_bit()); // Disable watchdog. - self.$wdtcsr.reset(); + self.$wdtcsr().reset(); }) } } diff --git a/examples/arduino-uno/src/bin/uno-ext-interrupt.rs b/examples/arduino-uno/src/bin/uno-ext-interrupt.rs index ee6ebc3d05..425c033556 100644 --- a/examples/arduino-uno/src/bin/uno-ext-interrupt.rs +++ b/examples/arduino-uno/src/bin/uno-ext-interrupt.rs @@ -47,9 +47,9 @@ fn main() -> ! { // thanks to tsemczyszyn and Rahix: https://github.com/Rahix/avr-hal/issues/240 // Configure INT0 for falling edge. 0x03 would be rising edge. - dp.EXINT.eicra.modify(|_, w| w.isc0().bits(0x02)); + dp.EXINT.eicra().modify(|_, w| w.isc0().set(0x02)); // Enable the INT0 interrupt source. - dp.EXINT.eimsk.modify(|_, w| w.int0().set_bit()); + dp.EXINT.eimsk().modify(|_, w| w.int0().set_bit()); let mut leds: [Pin; 4] = [ pins.d3.into_output().downgrade(), diff --git a/examples/arduino-uno/src/bin/uno-hc-sr04.rs b/examples/arduino-uno/src/bin/uno-hc-sr04.rs index 336aa78d66..6e08fdaa33 100644 --- a/examples/arduino-uno/src/bin/uno-hc-sr04.rs +++ b/examples/arduino-uno/src/bin/uno-hc-sr04.rs @@ -30,11 +30,11 @@ fn main() -> ! { // since the clock register size is 16 bits, the timer is full every // 1/(16e6/64)*2^16 ≈ 260 ms let timer1 = dp.TC1; - timer1.tccr1b.write(|w| w.cs1().prescale_64()); + timer1.tccr1b().write(|w| w.cs1().prescale_64()); 'outer: loop { // the timer is reinitialized with value 0. - timer1.tcnt1.write(|w| w.bits(0)); + timer1.tcnt1().write(|w| w.set(0)); // the trigger must be set to high under 10 µs as per the HC-SR04 datasheet trig.set_high(); @@ -44,7 +44,7 @@ fn main() -> ! { while echo.is_low() { // exiting the loop if the timer has reached 200 ms. // 0.2s/4µs = 50000 - if timer1.tcnt1.read().bits() >= 50000 { + if timer1.tcnt1().read().bits() >= 50000 { // jump to the beginning of the outer loop if no obstacle is detected ufmt::uwriteln!( &mut serial, @@ -55,7 +55,7 @@ fn main() -> ! { } } // Restarting the timer - timer1.tcnt1.write(|w| w.bits(0)); + timer1.tcnt1().write(|w| w.set(0)); // Wait for the echo to get low again while echo.is_high() {} @@ -66,7 +66,7 @@ fn main() -> ! { // some HC-SR04 labeled sensor holds the echo pin in high state for very long time, // thus overflowing the u16 value when multiplying the timer1 value with 4. // overflow during runtime causes panic! so it must be handled - let temp_timer = timer1.tcnt1.read().bits().saturating_mul(4); + let temp_timer = timer1.tcnt1().read().bits().saturating_mul(4); let value = match temp_timer { u16::MAX => { ufmt::uwriteln!( @@ -81,7 +81,7 @@ fn main() -> ! { // Await 100 ms before sending the next trig // 0.1s/4µs = 25000 - while timer1.tcnt1.read().bits() < 25000 {} + while timer1.tcnt1().read().bits() < 25000 {} ufmt::uwriteln!( &mut serial, diff --git a/examples/arduino-uno/src/bin/uno-infrared.rs b/examples/arduino-uno/src/bin/uno-infrared.rs index 6cc2a5a89c..0c1ba59318 100644 --- a/examples/arduino-uno/src/bin/uno-infrared.rs +++ b/examples/arduino-uno/src/bin/uno-infrared.rs @@ -62,10 +62,10 @@ fn main() -> ! { irdroino_led2.set_low(); // Enable group 2 (PORTD) - dp.EXINT.pcicr.write(|w| unsafe { w.bits(0b100) }); + dp.EXINT.pcicr().write(|w| unsafe { w.bits(0b100) }); // Enable pin change interrupts on PCINT18 which is pin PD2 (= d2) - dp.EXINT.pcmsk2.write(|w| w.bits(0b100)); + dp.EXINT.pcmsk2().write(|w| w.set(0b100)); let ir = Receiver::with_pin(Clock::FREQ, pins.d2); @@ -141,12 +141,12 @@ impl Clock { pub fn start(&self, tc0: arduino_hal::pac::TC0) { // Configure the timer for the above interval (in CTC mode) - tc0.tccr0a.write(|w| w.wgm0().ctc()); - tc0.ocr0a.write(|w| w.bits(Self::TOP)); - tc0.tccr0b.write(|w| w.cs0().variant(Self::PRESCALER)); + tc0.tccr0a().write(|w| w.wgm0().ctc()); + tc0.ocr0a().write(|w| w.set(Self::TOP)); + tc0.tccr0b().write(|w| w.cs0().variant(Self::PRESCALER)); // Enable interrupt - tc0.timsk0.write(|w| w.ocie0a().set_bit()); + tc0.timsk0().write(|w| w.ocie0a().set_bit()); } pub fn now(&self) -> u32 { diff --git a/examples/arduino-uno/src/bin/uno-manual-servo.rs b/examples/arduino-uno/src/bin/uno-manual-servo.rs index 9402446e7d..ee67fa8357 100644 --- a/examples/arduino-uno/src/bin/uno-manual-servo.rs +++ b/examples/arduino-uno/src/bin/uno-manual-servo.rs @@ -30,17 +30,17 @@ fn main() -> ! { // - Each count increases the duty-cycle by 4us. // - Use OC1A which is connected to D9 of the Arduino Uno. let tc1 = dp.TC1; - tc1.icr1.write(|w| w.bits(4999)); - tc1.tccr1a - .write(|w| w.wgm1().bits(0b10).com1a().match_clear()); - tc1.tccr1b - .write(|w| w.wgm1().bits(0b11).cs1().prescale_64()); + tc1.icr1().write(|w| w.set(4999)); + tc1.tccr1a() + .write(|w| w.wgm1().set(0b10).com1a().match_clear()); + tc1.tccr1b() + .write(|w| w.wgm1().set(0b11).cs1().prescale_64()); loop { // 100 counts => 0.4ms // 700 counts => 2.8ms for duty in 100..=700 { - tc1.ocr1a.write(|w| w.bits(duty)); + tc1.ocr1a().write(|w| w.set(duty)); arduino_hal::delay_ms(20); } } diff --git a/examples/arduino-uno/src/bin/uno-millis.rs b/examples/arduino-uno/src/bin/uno-millis.rs index 58042b5efb..e9c22eee62 100644 --- a/examples/arduino-uno/src/bin/uno-millis.rs +++ b/examples/arduino-uno/src/bin/uno-millis.rs @@ -38,16 +38,16 @@ static MILLIS_COUNTER: avr_device::interrupt::Mutex> = fn millis_init(tc0: arduino_hal::pac::TC0) { // Configure the timer for the above interval (in CTC mode) // and enable its interrupt. - tc0.tccr0a.write(|w| w.wgm0().ctc()); - tc0.ocr0a.write(|w| w.bits(TIMER_COUNTS as u8)); - tc0.tccr0b.write(|w| match PRESCALER { + tc0.tccr0a().write(|w| w.wgm0().ctc()); + tc0.ocr0a().write(|w| w.set(TIMER_COUNTS as u8)); + tc0.tccr0b().write(|w| match PRESCALER { 8 => w.cs0().prescale_8(), 64 => w.cs0().prescale_64(), 256 => w.cs0().prescale_256(), 1024 => w.cs0().prescale_1024(), _ => panic!(), }); - tc0.timsk0.write(|w| w.ocie0a().set_bit()); + tc0.timsk0().write(|w| w.ocie0a().set_bit()); // Reset the global millisecond counter avr_device::interrupt::free(|cs| { diff --git a/examples/arduino-uno/src/bin/uno-pin-change-interrupt.rs b/examples/arduino-uno/src/bin/uno-pin-change-interrupt.rs index b731b528a0..42a71d3750 100644 --- a/examples/arduino-uno/src/bin/uno-pin-change-interrupt.rs +++ b/examples/arduino-uno/src/bin/uno-pin-change-interrupt.rs @@ -49,10 +49,10 @@ fn main() -> ! { ]; // Enable the PCINT2 pin change interrupt - dp.EXINT.pcicr.write(|w| unsafe { w.bits(0b100) }); + dp.EXINT.pcicr().write(|w| unsafe { w.bits(0b100) }); // Enable pin change interrupts on PCINT18 which is pin PD2 (= d2) - dp.EXINT.pcmsk2.write(|w| w.bits(0b100)); + dp.EXINT.pcmsk2().write(|w| w.set(0b100)); //From this point on an interrupt can happen unsafe { avr_device::interrupt::enable() }; diff --git a/examples/arduino-uno/src/bin/uno-timer.rs b/examples/arduino-uno/src/bin/uno-timer.rs index bb315464a5..83b163d8f6 100644 --- a/examples/arduino-uno/src/bin/uno-timer.rs +++ b/examples/arduino-uno/src/bin/uno-timer.rs @@ -60,7 +60,7 @@ fn main() -> ! { ufmt::uwriteln!( &mut serial, "configured timer output compare register = {}", - tmr1.ocr1a.read().bits() + tmr1.ocr1a().read().bits() ) .unwrap_infallible(); @@ -107,16 +107,16 @@ pub fn rig_timer>(tmr1: &TC1, ser ) .unwrap_infallible(); - tmr1.tccr1a.write(|w| w.wgm1().bits(0b00)); - tmr1.tccr1b.write(|w| { + tmr1.tccr1a().write(|w| w.wgm1().set(0b00)); + tmr1.tccr1b().write(|w| { w.cs1() //.prescale_256() .variant(CLOCK_SOURCE) .wgm1() - .bits(0b01) + .set(0b01) }); - tmr1.ocr1a.write(|w| w.bits(ticks)); - tmr1.timsk1.write(|w| w.ocie1a().set_bit()); //enable this specific interrupt + tmr1.ocr1a().write(|w| w.set(ticks)); + tmr1.timsk1().write(|w| w.ocie1a().set_bit()); //enable this specific interrupt } #[avr_device::interrupt(atmega328p)] diff --git a/examples/arduino-uno/src/bin/uno-watchdog.rs b/examples/arduino-uno/src/bin/uno-watchdog.rs index 4871210e6a..1801b127ce 100644 --- a/examples/arduino-uno/src/bin/uno-watchdog.rs +++ b/examples/arduino-uno/src/bin/uno-watchdog.rs @@ -24,7 +24,7 @@ fn main() -> ! { arduino_hal::delay_ms(100); } - let mut watchdog = wdt::Wdt::new(dp.WDT, &dp.CPU.mcusr); + let mut watchdog = wdt::Wdt::new(dp.WDT, &dp.CPU.mcusr()); watchdog.start(wdt::Timeout::Ms2000).unwrap(); loop { diff --git a/examples/nano168/src/bin/nano168-millis.rs b/examples/nano168/src/bin/nano168-millis.rs index 0375607ee7..85e906c61e 100644 --- a/examples/nano168/src/bin/nano168-millis.rs +++ b/examples/nano168/src/bin/nano168-millis.rs @@ -36,16 +36,16 @@ static MILLIS_COUNTER: avr_device::interrupt::Mutex> = fn millis_init(tc0: arduino_hal::pac::TC0) { // Configure the timer for the above interval (in CTC mode) // and enable its interrupt. - tc0.tccr0a.write(|w| w.wgm0().ctc()); - tc0.ocr0a.write(|w| w.bits(TIMER_COUNTS as u8)); - tc0.tccr0b.write(|w| match PRESCALER { + tc0.tccr0a().write(|w| w.wgm0().ctc()); + tc0.ocr0a().write(|w| w.set(TIMER_COUNTS as u8)); + tc0.tccr0b().write(|w| match PRESCALER { 8 => w.cs0().prescale_8(), 64 => w.cs0().prescale_64(), 256 => w.cs0().prescale_256(), 1024 => w.cs0().prescale_1024(), _ => panic!(), }); - tc0.timsk0.write(|w| w.ocie0a().set_bit()); + tc0.timsk0().write(|w| w.ocie0a().set_bit()); // Reset the global millisecond counter avr_device::interrupt::free(|cs| { diff --git a/examples/nano168/src/bin/nano168-watchdog.rs b/examples/nano168/src/bin/nano168-watchdog.rs index aac0426ea3..f7d7d8a613 100644 --- a/examples/nano168/src/bin/nano168-watchdog.rs +++ b/examples/nano168/src/bin/nano168-watchdog.rs @@ -23,7 +23,7 @@ fn main() -> ! { } ufmt::uwriteln!(&mut serial, "\nEnabling watchdog...").unwrap_infallible(); - let mut watchdog = wdt::Wdt::new(dp.WDT, &dp.CPU.mcusr); + let mut watchdog = wdt::Wdt::new(dp.WDT, &dp.CPU.mcusr()); watchdog.start(wdt::Timeout::Ms4000).unwrap(); ufmt::uwriteln!(&mut serial, "\nWatchdog on watch...").unwrap_infallible(); diff --git a/mcu/atmega-hal/src/adc.rs b/mcu/atmega-hal/src/adc.rs index 2881ae62fa..6dd225a751 100644 --- a/mcu/atmega-hal/src/adc.rs +++ b/mcu/atmega-hal/src/adc.rs @@ -56,7 +56,7 @@ pub struct AdcSettings { } fn apply_settings(peripheral: &crate::pac::ADC, settings: AdcSettings) { - peripheral.adcsra.write(|w| { + peripheral.adcsra().write(|w| { w.aden().set_bit(); match settings.clock_divider { ClockDivider::Factor2 => w.adps().prescaler_2(), @@ -68,7 +68,7 @@ fn apply_settings(peripheral: &crate::pac::ADC, settings: AdcSettings) { ClockDivider::Factor128 => w.adps().prescaler_128(), } }); - peripheral.admux.write(|w| match settings.ref_voltage { + peripheral.admux().write(|w| match settings.ref_voltage { ReferenceVoltage::Aref => w.refs().aref(), ReferenceVoltage::AVcc => w.refs().avcc(), ReferenceVoltage::Internal => w.refs().internal(), @@ -183,7 +183,7 @@ avr_hal_generic::impl_adc! { apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, channel_id: crate::pac::adc::admux::MUX_A, set_channel: |peripheral, id| { - peripheral.admux.modify(|_, w| w.mux().variant(id)); + peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { port::PC0: (crate::pac::adc::admux::MUX_A::ADC0, didr0::adc0d), @@ -213,7 +213,7 @@ avr_hal_generic::impl_adc! { apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, channel_id: crate::pac::adc::admux::MUX_A, set_channel: |peripheral, id| { - peripheral.admux.modify(|_, w| w.mux().variant(id)); + peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { port::PA0: (crate::pac::adc::admux::MUX_A::ADC0), @@ -239,8 +239,8 @@ avr_hal_generic::impl_adc! { apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, channel_id: u8, set_channel: |peripheral, id| { - peripheral.admux.modify(|_, w| w.mux().bits(id & 0x1f)); - peripheral.adcsrb.modify(|_, w| w.mux5().bit(id & 0x20 != 0)); + peripheral.admux().modify(|_, w| w.mux().set(id & 0x1f)); + peripheral.adcsrb().modify(|_, w| w.mux5().bit(id & 0x20 != 0)); }, pins: { port::PF0: (0b000000, didr0::adc0d), @@ -271,7 +271,7 @@ avr_hal_generic::impl_adc! { apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, channel_id: crate::pac::adc::admux::MUX_A, set_channel: |peripheral, id| { - peripheral.admux.modify(|_, w| w.mux().variant(id)); + peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { port::PF0: (crate::pac::adc::admux::MUX_A::ADC0), @@ -297,8 +297,8 @@ avr_hal_generic::impl_adc! { apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, channel_id: u8, set_channel: |peripheral, id| { - peripheral.admux.modify(|_, w| w.mux().bits(id & 0x1f)); - peripheral.adcsrb.modify(|_, w| w.mux5().bit(id & 0x20 != 0)); + peripheral.admux().modify(|_, w| w.mux().set(id & 0x1f)); + peripheral.adcsrb().modify(|_, w| w.mux5().bit(id & 0x20 != 0)); }, pins: { port::PF0: (0b000000, didr0::adc0d), @@ -332,7 +332,7 @@ avr_hal_generic::impl_adc! { apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, channel_id: crate::pac::adc::admux::MUX_A, set_channel: |peripheral, id| { - peripheral.admux.modify(|_, w| w.mux().variant(id)); + peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { port::PA0: (crate::pac::adc::admux::MUX_A::ADC0, didr0::adc0d), @@ -360,7 +360,7 @@ avr_hal_generic::impl_adc! { apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, channel_id: crate::pac::adc::admux::MUX_A, set_channel: |peripheral, id| { - peripheral.admux.modify(|_, w| w.mux().variant(id)); + peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { port::PC0: (crate::pac::adc::admux::MUX_A::ADC0), @@ -388,7 +388,7 @@ avr_hal_generic::impl_adc! { apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, channel_id: crate::pac::adc::admux::MUX_A, set_channel: |peripheral, id| { - peripheral.admux.modify(|_, w| w.mux().variant(id)); + peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { port::PA0: (crate::pac::adc::admux::MUX_A::ADC0, didr0::adc0d), diff --git a/mcu/atmega-hal/src/eeprom.rs b/mcu/atmega-hal/src/eeprom.rs index 865929676f..ca3d199915 100644 --- a/mcu/atmega-hal/src/eeprom.rs +++ b/mcu/atmega-hal/src/eeprom.rs @@ -30,7 +30,7 @@ avr_hal_generic::impl_eeprom_atmega! { capacity: 256, addr_width: u8, set_address: |peripheral, address| { - peripheral.eearl.write(|w| w.bits(address)); + peripheral.eearl().write(|w| w.bits(address)); }, } @@ -52,7 +52,7 @@ avr_hal_generic::impl_eeprom_atmega! { capacity: 512, addr_width: u16, set_address: |peripheral, address| { - peripheral.eear.write(|w| w.bits(address)); + peripheral.eear().write(|w| w.bits(address)); }, } @@ -67,7 +67,7 @@ avr_hal_generic::impl_eeprom_atmega! { capacity: 1024, addr_width: u16, set_address: |peripheral, address| { - peripheral.eear.write(|w| w.bits(address)); + peripheral.eear().write(|w| w.bits(address)); }, } @@ -82,7 +82,7 @@ avr_hal_generic::impl_eeprom_atmega! { capacity: 4096, addr_width: u16, set_address: |peripheral, address| { - peripheral.eear.write(|w| w.bits(address)); + peripheral.eear().write(|w| w.bits(address)); }, } @@ -93,7 +93,7 @@ avr_hal_generic::impl_eeprom_atmega_old! { capacity: 512, addr_width: u16, set_address: |peripheral, address| { - peripheral.eear.write(|w| w.bits(address)); + peripheral.eear().write(|w| w.bits(address)); }, } @@ -104,7 +104,7 @@ avr_hal_generic::impl_eeprom_atmega_old! { capacity: 1024, addr_width: u16, set_address: |peripheral, address| { - peripheral.eear.write(|w| w.bits(address)); + peripheral.eear().write(|w| w.bits(address)); }, } @@ -115,6 +115,6 @@ avr_hal_generic::impl_eeprom_atmega_old! { capacity: 4096, addr_width: u16, set_address: |peripheral, address| { - peripheral.eear.write(|w| w.bits(address)); + peripheral.eear().write(|w| w.bits(address)); }, } diff --git a/mcu/atmega-hal/src/simple_pwm.rs b/mcu/atmega-hal/src/simple_pwm.rs index 296280f3c9..bdf13e25f1 100644 --- a/mcu/atmega-hal/src/simple_pwm.rs +++ b/mcu/atmega-hal/src/simple_pwm.rs @@ -26,8 +26,8 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer0Pwm { timer: crate::pac::TC0, init: |tim, prescaler| { - tim.tccr0a.modify(|_r, w| w.wgm0().pwm_fast()); - tim.tccr0b.modify(|_r, w| match prescaler { + tim.tccr0a().modify(|_r, w| w.wgm0().pwm_fast()); + tim.tccr0b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs0().direct(), Prescaler::Prescale8 => w.cs0().prescale_8(), Prescaler::Prescale64 => w.cs0().prescale_64(), @@ -39,18 +39,18 @@ avr_hal_generic::impl_simple_pwm! { PD6: { ocr: ocr0a, into_pwm: |tim| if enable { - tim.tccr0a.modify(|_r, w| w.com0a().match_clear()); + tim.tccr0a().modify(|_r, w| w.com0a().match_clear()); } else { - tim.tccr0a.modify(|_r, w| w.com0a().disconnected()); + tim.tccr0a().modify(|_r, w| w.com0a().disconnected()); }, }, PD5: { ocr: ocr0b, into_pwm: |tim| if enable { - tim.tccr0a.modify(|_r, w| w.com0b().match_clear()); + tim.tccr0a().modify(|_r, w| w.com0b().match_clear()); } else { - tim.tccr0a.modify(|_r, w| w.com0b().disconnected()); + tim.tccr0a().modify(|_r, w| w.com0b().disconnected()); }, }, }, @@ -80,9 +80,9 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer1Pwm { timer: crate::pac::TC1, init: |tim, prescaler| { - tim.tccr1a.modify(|_r, w| w.wgm1().bits(0b01)); - tim.tccr1b.modify(|_r, w| { - w.wgm1().bits(0b01); + tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); + tim.tccr1b().modify(|_r, w| { + w.wgm1().set(0b01); match prescaler { Prescaler::Direct => w.cs1().direct(), @@ -97,18 +97,18 @@ avr_hal_generic::impl_simple_pwm! { PB1: { ocr: ocr1a, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_r, w| w.com1a().match_clear()); + tim.tccr1a().modify(|_r, w| w.com1a().match_clear()); } else { - tim.tccr1a.modify(|_r, w| w.com1a().disconnected()); + tim.tccr1a().modify(|_r, w| w.com1a().disconnected()); }, }, PB2: { ocr: ocr1b, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_r, w| w.com1b().match_clear()); + tim.tccr1a().modify(|_r, w| w.com1b().match_clear()); } else { - tim.tccr1a.modify(|_r, w| w.com1b().disconnected()); + tim.tccr1a().modify(|_r, w| w.com1b().disconnected()); }, }, }, @@ -138,8 +138,8 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer2Pwm { timer: crate::pac::TC2, init: |tim, prescaler| { - tim.tccr2a.modify(|_r, w| w.wgm2().pwm_fast()); - tim.tccr2b.modify(|_r, w| match prescaler { + tim.tccr2a().modify(|_r, w| w.wgm2().pwm_fast()); + tim.tccr2b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs2().direct(), Prescaler::Prescale8 => w.cs2().prescale_8(), Prescaler::Prescale64 => w.cs2().prescale_64(), @@ -151,18 +151,18 @@ avr_hal_generic::impl_simple_pwm! { PB3: { ocr: ocr2a, into_pwm: |tim| if enable { - tim.tccr2a.modify(|_r, w| w.com2a().match_clear()); + tim.tccr2a().modify(|_r, w| w.com2a().match_clear()); } else { - tim.tccr2a.modify(|_r, w| w.com2a().disconnected()); + tim.tccr2a().modify(|_r, w| w.com2a().disconnected()); }, }, PD3: { ocr: ocr2b, into_pwm: |tim| if enable { - tim.tccr2a.modify(|_r, w| w.com2b().match_clear()); + tim.tccr2a().modify(|_r, w| w.com2b().match_clear()); } else { - tim.tccr2a.modify(|_r, w| w.com2b().disconnected()); + tim.tccr2a().modify(|_r, w| w.com2b().disconnected()); }, }, }, @@ -175,8 +175,8 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer3Pwm { timer: crate::pac::TC3, init: |tim, prescaler| { - tim.tccr3a.modify(|_r, w| w.wgm3().bits(0b01)); - tim.tccr3b.modify(|_r, w| { + tim.tccr3a().modify(|_r, w| w.wgm3().set(0b01)); + tim.tccr3b().modify(|_r, w| { unsafe { w.wgm3().bits(0b01) }; match prescaler { @@ -192,18 +192,18 @@ avr_hal_generic::impl_simple_pwm! { PD0: { ocr: ocr3a, into_pwm: |tim| if enable { - tim.tccr3a.modify(|_r, w| w.com3a().match_clear()); + tim.tccr3a().modify(|_r, w| w.com3a().match_clear()); } else { - tim.tccr3a.modify(|_r, w| w.com3a().disconnected()); + tim.tccr3a().modify(|_r, w| w.com3a().disconnected()); }, }, PD2: { ocr: ocr3b, into_pwm: |tim| if enable { - tim.tccr3a.modify(|_r, w| w.com3b().match_clear()); + tim.tccr3a().modify(|_r, w| w.com3b().match_clear()); } else { - tim.tccr3a.modify(|_r, w| w.com3b().disconnected()); + tim.tccr3a().modify(|_r, w| w.com3b().disconnected()); }, }, }, @@ -216,8 +216,8 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer4Pwm { timer: crate::pac::TC4, init: |tim, prescaler| { - tim.tccr4a.modify(|_r, w| w.wgm4().bits(0b01)); - tim.tccr4b.modify(|_r, w| { + tim.tccr4a().modify(|_r, w| w.wgm4().set(0b01)); + tim.tccr4b().modify(|_r, w| { unsafe { w.wgm4().bits(0b01) }; match prescaler { @@ -233,18 +233,18 @@ avr_hal_generic::impl_simple_pwm! { PD1: { ocr: ocr4a, into_pwm: |tim| if enable { - tim.tccr4a.modify(|_r, w| w.com4a().match_clear()); + tim.tccr4a().modify(|_r, w| w.com4a().match_clear()); } else { - tim.tccr4a.modify(|_r, w| w.com4a().disconnected()); + tim.tccr4a().modify(|_r, w| w.com4a().disconnected()); }, }, PD2: { ocr: ocr4b, into_pwm: |tim| if enable { - tim.tccr4a.modify(|_r, w| w.com4b().match_clear()); + tim.tccr4a().modify(|_r, w| w.com4b().match_clear()); } else { - tim.tccr4a.modify(|_r, w| w.com4b().disconnected()); + tim.tccr4a().modify(|_r, w| w.com4b().disconnected()); }, }, }, @@ -268,8 +268,8 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer0Pwm { timer: crate::pac::TC0, init: |tim, prescaler| { - tim.tccr0a.modify(|_r, w| w.wgm0().pwm_fast()); - tim.tccr0b.modify(|_r, w| match prescaler { + tim.tccr0a().modify(|_r, w| w.wgm0().pwm_fast()); + tim.tccr0b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs0().direct(), Prescaler::Prescale8 => w.cs0().prescale_8(), Prescaler::Prescale64 => w.cs0().prescale_64(), @@ -281,18 +281,18 @@ avr_hal_generic::impl_simple_pwm! { PB7: { ocr: ocr0a, into_pwm: |tim| if enable { - tim.tccr0a.modify(|_r, w| w.com0a().match_clear()); + tim.tccr0a().modify(|_r, w| w.com0a().match_clear()); } else { - tim.tccr0a.modify(|_r, w| w.com0a().disconnected()); + tim.tccr0a().modify(|_r, w| w.com0a().disconnected()); }, }, PG5: { ocr: ocr0b, into_pwm: |tim| if enable { - tim.tccr0a.modify(|_r, w| w.com0b().match_clear()); + tim.tccr0a().modify(|_r, w| w.com0b().match_clear()); } else { - tim.tccr0a.modify(|_r, w| w.com0b().disconnected()); + tim.tccr0a().modify(|_r, w| w.com0b().disconnected()); }, }, }, @@ -317,8 +317,8 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer1Pwm { timer: crate::pac::TC1, init: |tim, prescaler| { - tim.tccr1a.modify(|_r, w| w.wgm1().bits(0b01)); - tim.tccr1b.modify(|_r, w| match prescaler { + tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); + tim.tccr1b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs1().direct(), Prescaler::Prescale8 => w.cs1().prescale_8(), Prescaler::Prescale64 => w.cs1().prescale_64(), @@ -330,27 +330,27 @@ avr_hal_generic::impl_simple_pwm! { PB5: { ocr: ocr1a, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_r, w| w.com1a().match_clear()); + tim.tccr1a().modify(|_r, w| w.com1a().match_clear()); } else { - tim.tccr1a.modify(|_r, w| w.com1a().disconnected()); + tim.tccr1a().modify(|_r, w| w.com1a().disconnected()); }, }, PB6: { ocr: ocr1b, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_r, w| w.com1b().match_clear()); + tim.tccr1a().modify(|_r, w| w.com1b().match_clear()); } else { - tim.tccr1a.modify(|_r, w| w.com1b().disconnected()); + tim.tccr1a().modify(|_r, w| w.com1b().disconnected()); }, }, PB7: { ocr: ocr1c, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_r, w| w.com1c().match_clear()); + tim.tccr1a().modify(|_r, w| w.com1c().match_clear()); } else { - tim.tccr1a.modify(|_r, w| w.com1c().disconnected()); + tim.tccr1a().modify(|_r, w| w.com1c().disconnected()); }, }, }, @@ -375,8 +375,8 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer2Pwm { timer: crate::pac::TC2, init: |tim, prescaler| { - tim.tccr2a.modify(|_r, w| w.wgm2().bits(0b01)); - tim.tccr2b.modify(|_r, w| { + tim.tccr2a().modify(|_r, w| w.wgm2().set(0b01)); + tim.tccr2b().modify(|_r, w| { w.wgm22().clear_bit(); match prescaler { @@ -392,18 +392,18 @@ avr_hal_generic::impl_simple_pwm! { PB4: { ocr: ocr2a, into_pwm: |tim| if enable { - tim.tccr2a.modify(|_r, w| w.com2a().match_clear()); + tim.tccr2a().modify(|_r, w| w.com2a().match_clear()); } else { - tim.tccr2a.modify(|_r, w| w.com2a().disconnected()); + tim.tccr2a().modify(|_r, w| w.com2a().disconnected()); }, }, PH6: { ocr: ocr2b, into_pwm: |tim| if enable { - tim.tccr2a.modify(|_r, w| w.com2b().match_clear()); + tim.tccr2a().modify(|_r, w| w.com2b().match_clear()); } else { - tim.tccr2a.modify(|_r, w| w.com2b().disconnected()); + tim.tccr2a().modify(|_r, w| w.com2b().disconnected()); }, }, }, @@ -428,9 +428,9 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer3Pwm { timer: crate::pac::TC3, init: |tim, prescaler| { - tim.tccr3a.modify(|_r, w| w.wgm3().bits(0b01)); - tim.tccr3b.modify(|_r, w| { - w.wgm3().bits(0b01); + tim.tccr3a().modify(|_r, w| w.wgm3().set(0b01)); + tim.tccr3b().modify(|_r, w| { + w.wgm3().set(0b01); match prescaler { Prescaler::Direct => w.cs3().direct(), @@ -445,27 +445,27 @@ avr_hal_generic::impl_simple_pwm! { PE3: { ocr: ocr3a, into_pwm: |tim| if enable { - tim.tccr3a.modify(|_r, w| w.com3a().match_clear()); + tim.tccr3a().modify(|_r, w| w.com3a().match_clear()); } else { - tim.tccr3a.modify(|_r, w| w.com3a().disconnected()); + tim.tccr3a().modify(|_r, w| w.com3a().disconnected()); }, }, PE4: { ocr: ocr3b, into_pwm: |tim| if enable { - tim.tccr3a.modify(|_r, w| w.com3b().match_clear()); + tim.tccr3a().modify(|_r, w| w.com3b().match_clear()); } else { - tim.tccr3a.modify(|_r, w| w.com3b().disconnected()); + tim.tccr3a().modify(|_r, w| w.com3b().disconnected()); }, }, PE5: { ocr: ocr3c, into_pwm: |tim| if enable { - tim.tccr3a.modify(|_r, w| w.com3c().match_clear()); + tim.tccr3a().modify(|_r, w| w.com3c().match_clear()); } else { - tim.tccr3a.modify(|_r, w| w.com3c().disconnected()); + tim.tccr3a().modify(|_r, w| w.com3c().disconnected()); }, }, @@ -491,9 +491,9 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer4Pwm { timer: crate::pac::TC4, init: |tim, prescaler| { - tim.tccr4a.modify(|_r, w| w.wgm4().bits(0b01)); - tim.tccr4b.modify(|_r, w| { - w.wgm4().bits(0b01); + tim.tccr4a().modify(|_r, w| w.wgm4().set(0b01)); + tim.tccr4b().modify(|_r, w| { + w.wgm4().set(0b01); match prescaler { Prescaler::Direct => w.cs4().direct(), @@ -508,27 +508,27 @@ avr_hal_generic::impl_simple_pwm! { PH3: { ocr: ocr4a, into_pwm: |tim| if enable { - tim.tccr4a.modify(|_r, w| w.com4a().match_clear()); + tim.tccr4a().modify(|_r, w| w.com4a().match_clear()); } else { - tim.tccr4a.modify(|_r, w| w.com4a().disconnected()); + tim.tccr4a().modify(|_r, w| w.com4a().disconnected()); }, }, PH4: { ocr: ocr4b, into_pwm: |tim| if enable { - tim.tccr4a.modify(|_r, w| w.com4b().match_clear()); + tim.tccr4a().modify(|_r, w| w.com4b().match_clear()); } else { - tim.tccr4a.modify(|_r, w| w.com4b().disconnected()); + tim.tccr4a().modify(|_r, w| w.com4b().disconnected()); }, }, PH5: { ocr: ocr4c, into_pwm: |tim| if enable { - tim.tccr4a.modify(|_r, w| w.com4c().match_clear()); + tim.tccr4a().modify(|_r, w| w.com4c().match_clear()); } else { - tim.tccr4a.modify(|_r, w| w.com4c().disconnected()); + tim.tccr4a().modify(|_r, w| w.com4c().disconnected()); }, }, @@ -554,9 +554,9 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer5Pwm { timer: crate::pac::TC5, init: |tim, prescaler| { - tim.tccr5a.modify(|_r, w| w.wgm5().bits(0b01)); - tim.tccr5b.modify(|_r, w| { - w.wgm5().bits(0b01); + tim.tccr5a().modify(|_r, w| w.wgm5().set(0b01)); + tim.tccr5b().modify(|_r, w| { + w.wgm5().set(0b01); match prescaler { Prescaler::Direct => w.cs5().direct(), @@ -571,27 +571,27 @@ avr_hal_generic::impl_simple_pwm! { PL3: { ocr: ocr5a, into_pwm: |tim| if enable { - tim.tccr5a.modify(|_r, w| w.com5a().match_clear()); + tim.tccr5a().modify(|_r, w| w.com5a().match_clear()); } else { - tim.tccr5a.modify(|_r, w| w.com5a().disconnected()); + tim.tccr5a().modify(|_r, w| w.com5a().disconnected()); }, }, PL4: { ocr: ocr5b, into_pwm: |tim| if enable { - tim.tccr5a.modify(|_r, w| w.com5b().match_clear()); + tim.tccr5a().modify(|_r, w| w.com5b().match_clear()); } else { - tim.tccr5a.modify(|_r, w| w.com5b().disconnected()); + tim.tccr5a().modify(|_r, w| w.com5b().disconnected()); }, }, PL5: { ocr: ocr5c, into_pwm: |tim| if enable { - tim.tccr5a.modify(|_r, w| w.com5c().match_clear()); + tim.tccr5a().modify(|_r, w| w.com5c().match_clear()); } else { - tim.tccr5a.modify(|_r, w| w.com5c().disconnected()); + tim.tccr5a().modify(|_r, w| w.com5c().disconnected()); }, }, @@ -616,8 +616,8 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer0Pwm { timer: crate::pac::TC0, init: |tim, prescaler| { - tim.tccr0a.modify(|_r, w| w.wgm0().pwm_fast()); - tim.tccr0b.modify(|_r, w| match prescaler { + tim.tccr0a().modify(|_r, w| w.wgm0().pwm_fast()); + tim.tccr0b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs0().direct(), Prescaler::Prescale8 => w.cs0().prescale_8(), Prescaler::Prescale64 => w.cs0().prescale_64(), @@ -629,18 +629,18 @@ avr_hal_generic::impl_simple_pwm! { PB7: { ocr: ocr0a, into_pwm: |tim| if enable { - tim.tccr0a.modify(|_r, w| w.com0a().match_clear()); + tim.tccr0a().modify(|_r, w| w.com0a().match_clear()); } else { - tim.tccr0a.modify(|_r, w| w.com0a().disconnected()); + tim.tccr0a().modify(|_r, w| w.com0a().disconnected()); }, }, PD0: { ocr: ocr0b, into_pwm: |tim| if enable { - tim.tccr0a.modify(|_r, w| w.com0b().match_clear()); + tim.tccr0a().modify(|_r, w| w.com0b().match_clear()); } else { - tim.tccr0a.modify(|_r, w| w.com0b().disconnected()); + tim.tccr0a().modify(|_r, w| w.com0b().disconnected()); }, }, }, @@ -665,10 +665,10 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer1Pwm { timer: crate::pac::TC1, init: |tim, prescaler| { - tim.tccr1a.modify(|_r, w| w.wgm1().bits(0b01)); - tim.tccr1b.modify(|_r, w| w.wgm1().bits(0b01)); + tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); + tim.tccr1b().modify(|_r, w| w.wgm1().set(0b01)); - tim.tccr1b.modify(|_r, w| match prescaler { + tim.tccr1b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs1().direct(), Prescaler::Prescale8 => w.cs1().prescale_8(), Prescaler::Prescale64 => w.cs1().prescale_64(), @@ -680,27 +680,27 @@ avr_hal_generic::impl_simple_pwm! { PB5: { ocr: ocr1a, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_r, w| w.com1a().match_clear()); + tim.tccr1a().modify(|_r, w| w.com1a().match_clear()); } else { - tim.tccr1a.modify(|_r, w| w.com1a().disconnected()); + tim.tccr1a().modify(|_r, w| w.com1a().disconnected()); }, }, PB6: { ocr: ocr1b, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_r, w| w.com1b().match_clear()); + tim.tccr1a().modify(|_r, w| w.com1b().match_clear()); } else { - tim.tccr1a.modify(|_r, w| w.com1b().disconnected()); + tim.tccr1a().modify(|_r, w| w.com1b().disconnected()); }, }, PB7: { ocr: ocr1c, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_r, w| w.com1c().match_clear()); + tim.tccr1a().modify(|_r, w| w.com1c().match_clear()); } else { - tim.tccr1a.modify(|_r, w| w.com1c().disconnected()); + tim.tccr1a().modify(|_r, w| w.com1c().disconnected()); }, }, }, @@ -723,10 +723,10 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer3Pwm { timer: crate::pac::TC3, init: |tim, prescaler| { - tim.tccr3a.modify(|_r, w| w.wgm3().bits(0b01)); - tim.tccr3b.modify(|_r, w| w.wgm3().bits(0b01)); + tim.tccr3a().modify(|_r, w| w.wgm3().set(0b01)); + tim.tccr3b().modify(|_r, w| w.wgm3().set(0b01)); - tim.tccr3b.modify(|_r, w| match prescaler { + tim.tccr3b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs3().direct(), Prescaler::Prescale8 => w.cs3().prescale_8(), Prescaler::Prescale64 => w.cs3().prescale_64(), @@ -738,9 +738,9 @@ avr_hal_generic::impl_simple_pwm! { PC6: { ocr: ocr3a, into_pwm: |tim| if enable { - tim.tccr3a.modify(|_r, w| w.com3a().match_clear()); + tim.tccr3a().modify(|_r, w| w.com3a().match_clear()); } else { - tim.tccr3a.modify(|_r, w| w.com3a().disconnected()); + tim.tccr3a().modify(|_r, w| w.com3a().disconnected()); }, }, }, @@ -765,11 +765,11 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer4Pwm { timer: crate::pac::TC4, init: |tim, prescaler| { - tim.tccr4a.modify(|_r, w| w.pwm4a().set_bit()); - tim.tccr4a.modify(|_r, w| w.pwm4b().set_bit()); - tim.tccr4c.modify(|_r, w| w.pwm4d().set_bit()); + tim.tccr4a().modify(|_r, w| w.pwm4a().set_bit()); + tim.tccr4a().modify(|_r, w| w.pwm4b().set_bit()); + tim.tccr4c().modify(|_r, w| w.pwm4d().set_bit()); - tim.tccr4b.modify(|_r, w| match prescaler { + tim.tccr4b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs4().direct(), Prescaler::Prescale8 => w.cs4().prescale_8(), Prescaler::Prescale64 => w.cs4().prescale_64(), @@ -781,27 +781,27 @@ avr_hal_generic::impl_simple_pwm! { PB6: { ocr: ocr4b, into_pwm: |tim| if enable { - tim.tccr4a.modify(|_r, w| w.com4b().match_clear()); + tim.tccr4a().modify(|_r, w| w.com4b().match_clear()); } else { - tim.tccr4a.modify(|_r, w| w.com4b().disconnected()); + tim.tccr4a().modify(|_r, w| w.com4b().disconnected()); }, }, PC7: { ocr: ocr4a, into_pwm: |tim| if enable { - tim.tccr4a.modify(|_r, w| w.com4a().match_clear()); + tim.tccr4a().modify(|_r, w| w.com4a().match_clear()); } else { - tim.tccr4a.modify(|_r, w| w.com4a().disconnected()); + tim.tccr4a().modify(|_r, w| w.com4a().disconnected()); }, }, PD7: { ocr: ocr4d, into_pwm: |tim| if enable { - tim.tccr4c.modify(|_r, w| w.com4d().match_clear()); + tim.tccr4c().modify(|_r, w| w.com4d().match_clear()); } else { - tim.tccr4c.modify(|_r, w| w.com4d().disconnected()); + tim.tccr4c().modify(|_r, w| w.com4d().disconnected()); }, }, }, @@ -825,8 +825,8 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer0Pwm { timer: crate::pac::TC0, init: |tim, prescaler| { - tim.tccr0a.modify(|_r, w| w.wgm0().pwm_fast()); - tim.tccr0b.modify(|_r, w| match prescaler { + tim.tccr0a().modify(|_r, w| w.wgm0().pwm_fast()); + tim.tccr0b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs0().direct(), Prescaler::Prescale8 => w.cs0().prescale_8(), Prescaler::Prescale64 => w.cs0().prescale_64(), @@ -838,18 +838,18 @@ avr_hal_generic::impl_simple_pwm! { PB3: { ocr: ocr0a, into_pwm: |tim| if enable { - tim.tccr0a.modify(|_r, w| w.com0a().match_clear()); + tim.tccr0a().modify(|_r, w| w.com0a().match_clear()); } else { - tim.tccr0a.modify(|_r, w| w.com0a().disconnected()); + tim.tccr0a().modify(|_r, w| w.com0a().disconnected()); }, }, PB4: { ocr: ocr0b, into_pwm: |tim| if enable { - tim.tccr0a.modify(|_r, w| w.com0b().match_clear()); + tim.tccr0a().modify(|_r, w| w.com0b().match_clear()); } else { - tim.tccr0a.modify(|_r, w| w.com0b().disconnected()); + tim.tccr0a().modify(|_r, w| w.com0b().disconnected()); }, }, }, @@ -873,9 +873,9 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer1Pwm { timer: crate::pac::TC1, init: |tim, prescaler| { - tim.tccr1a.modify(|_r, w| w.wgm1().bits(0b01)); - tim.tccr1b.modify(|_r, w| { - w.wgm1().bits(0b01); + tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); + tim.tccr1b().modify(|_r, w| { + w.wgm1().set(0b01); match prescaler { Prescaler::Direct => w.cs1().direct(), @@ -890,18 +890,18 @@ avr_hal_generic::impl_simple_pwm! { PD5: { ocr: ocr1a, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_r, w| w.com1a().match_clear()); + tim.tccr1a().modify(|_r, w| w.com1a().match_clear()); } else { - tim.tccr1a.modify(|_r, w| w.com1a().disconnected()); + tim.tccr1a().modify(|_r, w| w.com1a().disconnected()); }, }, PD4: { ocr: ocr1b, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_r, w| w.com1b().match_clear()); + tim.tccr1a().modify(|_r, w| w.com1b().match_clear()); } else { - tim.tccr1a.modify(|_r, w| w.com1b().disconnected()); + tim.tccr1a().modify(|_r, w| w.com1b().disconnected()); }, }, }, @@ -925,8 +925,8 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer2Pwm { timer: crate::pac::TC2, init: |tim, prescaler| { - tim.tccr2a.modify(|_r, w| w.wgm2().pwm_fast()); - tim.tccr2b.modify(|_r, w| match prescaler { + tim.tccr2a().modify(|_r, w| w.wgm2().pwm_fast()); + tim.tccr2b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs2().direct(), Prescaler::Prescale8 => w.cs2().prescale_8(), Prescaler::Prescale64 => w.cs2().prescale_64(), @@ -938,18 +938,18 @@ avr_hal_generic::impl_simple_pwm! { PD7: { ocr: ocr2a, into_pwm: |tim| if enable { - tim.tccr2a.modify(|_r, w| w.com2a().match_clear()); + tim.tccr2a().modify(|_r, w| w.com2a().match_clear()); } else { - tim.tccr2a.modify(|_r, w| w.com2a().disconnected()); + tim.tccr2a().modify(|_r, w| w.com2a().disconnected()); }, }, PD6: { ocr: ocr2b, into_pwm: |tim| if enable { - tim.tccr2a.modify(|_r, w| w.com2b().match_clear()); + tim.tccr2a().modify(|_r, w| w.com2b().match_clear()); } else { - tim.tccr2a.modify(|_r, w| w.com2b().disconnected()); + tim.tccr2a().modify(|_r, w| w.com2b().disconnected()); }, }, }, @@ -962,9 +962,9 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer3Pwm { timer: crate::pac::TC3, init: |tim, prescaler| { - tim.tccr3a.modify(|_r, w| w.wgm3().bits(0b01)); - tim.tccr3b.modify(|_r, w| { - w.wgm3().bits(0b01); + tim.tccr3a().modify(|_r, w| w.wgm3().set(0b01)); + tim.tccr3b().modify(|_r, w| { + w.wgm3().set(0b01); match prescaler { Prescaler::Direct => w.cs3().direct(), @@ -979,18 +979,18 @@ avr_hal_generic::impl_simple_pwm! { PB6: { ocr: ocr3a, into_pwm: |tim| if enable { - tim.tccr3a.modify(|_r, w| w.com3a().match_clear()); + tim.tccr3a().modify(|_r, w| w.com3a().match_clear()); } else { - tim.tccr3a.modify(|_r, w| w.com3a().disconnected()); + tim.tccr3a().modify(|_r, w| w.com3a().disconnected()); }, }, PB7: { ocr: ocr3b, into_pwm: |tim| if enable { - tim.tccr3a.modify(|_r, w| w.com3b().match_clear()); + tim.tccr3a().modify(|_r, w| w.com3b().match_clear()); } else { - tim.tccr3a.modify(|_r, w| w.com3b().disconnected()); + tim.tccr3a().modify(|_r, w| w.com3b().disconnected()); }, }, }, @@ -1014,9 +1014,9 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer1Pwm { timer: crate::pac::TC1, init: |tim, prescaler| { - tim.tccr1a.modify(|_r, w| w.wgm1().bits(0b01)); - tim.tccr1b.modify(|_r, w| { - w.wgm1().bits(0b01); + tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); + tim.tccr1b().modify(|_r, w| { + w.wgm1().set(0b01); match prescaler { Prescaler::Direct => w.cs1().direct(), @@ -1031,18 +1031,18 @@ avr_hal_generic::impl_simple_pwm! { PB1: { ocr: ocr1a, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_r, w| w.com1a().match_clear()); + tim.tccr1a().modify(|_r, w| w.com1a().match_clear()); } else { - tim.tccr1a.modify(|_r, w| w.com1a().disconnected()); + tim.tccr1a().modify(|_r, w| w.com1a().disconnected()); }, }, PB2: { ocr: ocr1b, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_r, w| w.com1b().match_clear()); + tim.tccr1a().modify(|_r, w| w.com1b().match_clear()); } else { - tim.tccr1a.modify(|_r, w| w.com1b().disconnected()); + tim.tccr1a().modify(|_r, w| w.com1b().disconnected()); }, }, }, @@ -1066,8 +1066,8 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer2Pwm { timer: crate::pac::TC2, init: |tim, prescaler| { - tim.tccr2.modify(|_r, w| w.wgm20().set_bit().wgm21().set_bit()); - tim.tccr2.modify(|_r, w| match prescaler { + tim.tccr2().modify(|_r, w| w.wgm20().set_bit().wgm21().set_bit()); + tim.tccr2().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs2().direct(), Prescaler::Prescale8 => w.cs2().prescale_8(), Prescaler::Prescale64 => w.cs2().prescale_64(), @@ -1079,9 +1079,9 @@ avr_hal_generic::impl_simple_pwm! { PB3: { ocr: ocr2, into_pwm: |tim| if enable { - tim.tccr2.modify(|_r, w| w.com2().match_clear()); + tim.tccr2().modify(|_r, w| w.com2().match_clear()); } else { - tim.tccr2.modify(|_r, w| w.com2().disconnected()); + tim.tccr2().modify(|_r, w| w.com2().disconnected()); }, }, }, @@ -1104,10 +1104,10 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer0Pwm { timer: crate::pac::TC0, init: |tim, prescaler| { - tim.tccr0a.modify(|_r, w| w.wgm0().bits(0b11)); - tim.tccr0a.modify(|_r, w| w.com0a().bits(0b00)); + tim.tccr0a().modify(|_r, w| w.wgm0().set(0b11)); + tim.tccr0a().modify(|_r, w| w.com0a().set(0b00)); - tim.tccr0b.modify(|_r, w| match prescaler { + tim.tccr0b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs0().running_no_prescaling(), Prescaler::Prescale8 => w.cs0().running_clk_8(), Prescaler::Prescale64 => w.cs0().running_clk_64(), @@ -1119,9 +1119,9 @@ avr_hal_generic::impl_simple_pwm! { PB3: { ocr: ocr0a, into_pwm: |tim| if enable { - tim.tccr0a.modify(|_r, w| w.com0a().bits(0b11)); + tim.tccr0a().modify(|_r, w| w.com0a().set(0b11)); } else { - tim.tccr0a.modify(|_r, w| w.com0a().bits(0b00)); + tim.tccr0a().modify(|_r, w| w.com0a().set(0b00)); }, }, }, @@ -1147,11 +1147,11 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer1Pwm { timer: crate::pac::TC1, init: |tim, prescaler| { - tim.tccr1a.modify(|_r, w| w.wgm1().bits(0b01)); - tim.tccr1a.modify(|_r, w| w.com1a().bits(0b00)); - tim.tccr1a.modify(|_r, w| w.com1b().bits(0b00)); + tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); + tim.tccr1a().modify(|_r, w| w.com1a().set(0b00)); + tim.tccr1a().modify(|_r, w| w.com1b().set(0b00)); #[cfg(any(feature = "atmega164pa"))] - tim.tccr1b.modify(|_r, w| match prescaler { + tim.tccr1b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs1().running_no_prescaling(), Prescaler::Prescale8 => w.cs1().running_clk_8(), Prescaler::Prescale64 => w.cs1().running_clk_64(), @@ -1171,17 +1171,17 @@ avr_hal_generic::impl_simple_pwm! { PD4: { ocr: ocr1a, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_r, w| w.com1a().bits(0b11)); + tim.tccr1a().modify(|_r, w| w.com1a().set(0b11)); } else { - tim.tccr1a.modify(|_r, w| w.com1a().bits(0b00)); + tim.tccr1a().modify(|_r, w| w.com1a().set(0b00)); }, }, PD5: { ocr: ocr1b, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_r, w| w.com1b().bits(0b11)); + tim.tccr1a().modify(|_r, w| w.com1b().set(0b11)); } else { - tim.tccr1a.modify(|_r, w| w.com1b().bits(0b00)); + tim.tccr1a().modify(|_r, w| w.com1b().set(0b00)); }, }, }, diff --git a/mcu/atmega-hal/src/usart.rs b/mcu/atmega-hal/src/usart.rs index 6f630fcfd3..c4525f427c 100644 --- a/mcu/atmega-hal/src/usart.rs +++ b/mcu/atmega-hal/src/usart.rs @@ -197,13 +197,13 @@ impl // msb of ubrrh has to be 0 to set ubrrh register. (see atmega8 datasheet) let ubrrh: u8 = ((baudrate.ubrr >> 8) & 0x0F) as u8; let ubrrl: u8 = (baudrate.ubrr & 0xFF) as u8; - self.ubrrh().write(|w| w.bits(ubrrh)); - self.ubrrl.write(|w| w.bits(ubrrl)); - self.ucsra.write(|w| w.u2x().bit(baudrate.u2x)); + self.ubrrh().write(|w| w.set(ubrrh)); + self.ubrrl().write(|w| w.set(ubrrl)); + self.ucsra().write(|w| w.u2x().bit(baudrate.u2x)); // Enable receiver and transmitter but leave interrupts disabled. #[rustfmt::skip] - self.ucsrb.write(|w| w + self.ucsrb().write(|w| w .txen().set_bit() .rxen().set_bit() ); @@ -223,11 +223,11 @@ impl fn raw_deinit(&mut self) { // Wait for any ongoing transfer to finish. avr_hal_generic::nb::block!(self.raw_flush()).ok(); - self.ucsrb.reset(); + self.ucsrb().reset(); } fn raw_flush(&mut self) -> avr_hal_generic::nb::Result<(), core::convert::Infallible> { - if self.ucsra.read().udre().bit_is_clear() { + if self.ucsra().read().udre().bit_is_clear() { Err(avr_hal_generic::nb::Error::WouldBlock) } else { Ok(()) @@ -241,24 +241,24 @@ impl // Call flush to make sure the data-register is empty self.raw_flush()?; - self.udr.write(|w| w.bits(byte)); + self.udr().write(|w| w.set(byte)); Ok(()) } fn raw_read(&mut self) -> avr_hal_generic::nb::Result { - if self.ucsra.read().rxc().bit_is_clear() { + if self.ucsra().read().rxc().bit_is_clear() { return Err(avr_hal_generic::nb::Error::WouldBlock); } - Ok(self.udr.read().bits()) + Ok(self.udr().read().bits()) } fn raw_interrupt(&mut self, event: crate::usart::Event, state: bool) { match event { - crate::usart::Event::RxComplete => self.ucsrb.modify(|_, w| w.rxcie().bit(state)), - crate::usart::Event::TxComplete => self.ucsrb.modify(|_, w| w.txcie().bit(state)), + crate::usart::Event::RxComplete => self.ucsrb().modify(|_, w| w.rxcie().bit(state)), + crate::usart::Event::TxComplete => self.ucsrb().modify(|_, w| w.txcie().bit(state)), crate::usart::Event::DataRegisterEmpty => { - self.ucsrb.modify(|_, w| w.udrie().bit(state)) + self.ucsrb().modify(|_, w| w.udrie().bit(state)) } } } @@ -277,13 +277,13 @@ impl fn raw_init(&mut self, baudrate: crate::usart::Baudrate) { let ubrr1h: u8 = (baudrate.ubrr >> 8) as u8; let ubrr1l: u8 = baudrate.ubrr as u8; - self.ubrr1h.write(|w| w.bits(ubrr1h)); - self.ubrr1l.write(|w| w.bits(ubrr1l)); - self.ucsr1a.write(|w| w.u2x1().bit(baudrate.u2x)); + self.ubrr1h().write(|w| w.set(ubrr1h)); + self.ubrr1l().write(|w| w.set(ubrr1l)); + self.ucsr1a().write(|w| w.u2x1().bit(baudrate.u2x)); // Enable receiver and transmitter but leave interrupts disabled. #[rustfmt::skip] - self.ucsr1b.write(|w| w + self.ucsr1b().write(|w| w .txen1().set_bit() .rxen1().set_bit() ); @@ -291,7 +291,7 @@ impl // Set frame format to 8n1 for now. At some point, this should be made // configurable, similar to what is done in other HALs. #[rustfmt::skip] - self.ucsr1c.write(|w| w + self.ucsr1c().write(|w| w .umsel1().usart_async() .ucsz1().chr8() .usbs1().stop1() @@ -302,11 +302,11 @@ impl fn raw_deinit(&mut self) { // Wait for any ongoing transfer to finish. avr_hal_generic::nb::block!(self.raw_flush()).ok(); - self.ucsr1b.reset(); + self.ucsr1b().reset(); } fn raw_flush(&mut self) -> avr_hal_generic::nb::Result<(), core::convert::Infallible> { - if self.ucsr1a.read().udre1().bit_is_clear() { + if self.ucsr1a().read().udre1().bit_is_clear() { Err(avr_hal_generic::nb::Error::WouldBlock) } else { Ok(()) @@ -320,24 +320,24 @@ impl // Call flush to make sure the data-register is empty self.raw_flush()?; - self.udr1.write(|w| w.bits(byte)); + self.udr1().write(|w| w.set(byte)); Ok(()) } fn raw_read(&mut self) -> avr_hal_generic::nb::Result { - if self.ucsr1a.read().rxc1().bit_is_clear() { + if self.ucsr1a().read().rxc1().bit_is_clear() { return Err(avr_hal_generic::nb::Error::WouldBlock); } - Ok(self.udr1.read().bits()) + Ok(self.udr1().read().bits()) } fn raw_interrupt(&mut self, event: crate::usart::Event, state: bool) { match event { - crate::usart::Event::RxComplete => self.ucsr1b.modify(|_, w| w.rxcie1().bit(state)), - crate::usart::Event::TxComplete => self.ucsr1b.modify(|_, w| w.txcie1().bit(state)), + crate::usart::Event::RxComplete => self.ucsr1b().modify(|_, w| w.rxcie1().bit(state)), + crate::usart::Event::TxComplete => self.ucsr1b().modify(|_, w| w.txcie1().bit(state)), crate::usart::Event::DataRegisterEmpty => { - self.ucsr1b.modify(|_, w| w.udrie1().bit(state)) + self.ucsr1b().modify(|_, w| w.udrie1().bit(state)) } } } @@ -357,17 +357,17 @@ impl fn raw_init(&mut self, baudrate: crate::usart::Baudrate) { let ubrr0h: u8 = (baudrate.ubrr >> 8) as u8; let ubrr0l: u8 = baudrate.ubrr as u8; - self.ubrr0h.write(|w| w.bits(ubrr0h)); - self.ubrr0l.write(|w| w.bits(ubrr0l)); - self.ucsr0a.write(|w| w.u2x0().bit(baudrate.u2x)); + self.ubrr0h().write(|w| w.set(ubrr0h)); + self.ubrr0l().write(|w| w.set(ubrr0l)); + self.ucsr0a().write(|w| w.u2x0().bit(baudrate.u2x)); // Enable receiver and transmitter but leave interrupts disabled. - self.ucsr0b.write(|w| w.txen0().set_bit().rxen0().set_bit()); + self.ucsr0b().write(|w| w.txen0().set_bit().rxen0().set_bit()); // Set frame format to 8n1 for now. At some point, this should be made // configurable, similar to what is done in other HALs. #[rustfmt::skip] - self.ucsr0c.write(|w| w + self.ucsr0c().write(|w| w .umsel0().usart_async() .ucsz0().chr8() .usbs0().stop1() @@ -378,11 +378,11 @@ impl fn raw_deinit(&mut self) { // Wait for any ongoing transfer to finish. avr_hal_generic::nb::block!(self.raw_flush()).ok(); - self.ucsr0b.reset(); + self.ucsr0b().reset(); } fn raw_flush(&mut self) -> avr_hal_generic::nb::Result<(), core::convert::Infallible> { - if self.ucsr0a.read().udre0().bit_is_clear() { + if self.ucsr0a().read().udre0().bit_is_clear() { Err(avr_hal_generic::nb::Error::WouldBlock) } else { Ok(()) @@ -396,24 +396,24 @@ impl // Call flush to make sure the data-register is empty self.raw_flush()?; - self.udr0.write(|w| w.bits(byte)); + self.udr0().write(|w| w.set(byte)); Ok(()) } fn raw_read(&mut self) -> avr_hal_generic::nb::Result { - if self.ucsr0a.read().rxc0().bit_is_clear() { + if self.ucsr0a().read().rxc0().bit_is_clear() { return Err(avr_hal_generic::nb::Error::WouldBlock); } - Ok(self.udr0.read().bits()) + Ok(self.udr0().read().bits()) } fn raw_interrupt(&mut self, event: crate::usart::Event, state: bool) { match event { - crate::usart::Event::RxComplete => self.ucsr0b.modify(|_, w| w.rxcie0().bit(state)), - crate::usart::Event::TxComplete => self.ucsr0b.modify(|_, w| w.txcie0().bit(state)), + crate::usart::Event::RxComplete => self.ucsr0b().modify(|_, w| w.rxcie0().bit(state)), + crate::usart::Event::TxComplete => self.ucsr0b().modify(|_, w| w.txcie0().bit(state)), crate::usart::Event::DataRegisterEmpty => { - self.ucsr0b.modify(|_, w| w.udrie0().bit(state)) + self.ucsr0b().modify(|_, w| w.udrie0().bit(state)) } } } diff --git a/mcu/attiny-hal/src/adc.rs b/mcu/attiny-hal/src/adc.rs index 0856312086..8b422b59f3 100644 --- a/mcu/attiny-hal/src/adc.rs +++ b/mcu/attiny-hal/src/adc.rs @@ -87,7 +87,7 @@ pub mod channel { } fn apply_clock(peripheral: &crate::pac::ADC, settings: AdcSettings) { - peripheral.adcsra.write(|w| { + peripheral.adcsra().write(|w| { w.aden().set_bit(); match settings.clock_divider { ClockDivider::Factor2 => w.adps().prescaler_2(), @@ -108,7 +108,7 @@ avr_hal_generic::impl_adc! { settings: AdcSettings, apply_settings: |peripheral, settings| { apply_clock(peripheral, settings); - peripheral.admux.write(|w| match settings.ref_voltage { + peripheral.admux().write(|w| match settings.ref_voltage { ReferenceVoltage::Aref => w.refs().aref(), ReferenceVoltage::AVcc => w.refs().vcc(), ReferenceVoltage::Internal1_1 => w.refs().internal().refs2().clear_bit(), @@ -117,7 +117,7 @@ avr_hal_generic::impl_adc! { }, channel_id: crate::pac::adc::admux::MUX_A, set_channel: |peripheral, id| { - peripheral.admux.modify(|_, w| w.mux().variant(id)); + peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { port::PB5: (crate::pac::adc::admux::MUX_A::ADC0, didr0::adc0d), @@ -139,14 +139,14 @@ avr_hal_generic::impl_adc! { settings: AdcSettings, apply_settings: |peripheral, settings| { apply_clock(peripheral, settings); - peripheral.admux.write(|w| match settings.ref_voltage { + peripheral.admux().write(|w| match settings.ref_voltage { ReferenceVoltage::AVcc => w.refs0().avcc(), ReferenceVoltage::Internal1_1 => w.refs0().internal(), }); }, channel_id: crate::pac::adc::admux::MUX_A, set_channel: |peripheral, id| { - peripheral.admux.modify(|_, w| w.mux().variant(id)); + peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { port::PC0: (crate::pac::adc::admux::MUX_A::ADC0, didr0::adc0d), @@ -172,11 +172,11 @@ avr_hal_generic::impl_adc! { settings: AdcSettings, apply_settings: |peripheral, settings| { apply_clock(peripheral, settings); - peripheral.amiscr.write(|w| match settings.ref_voltage { + peripheral.amiscr().write(|w| match settings.ref_voltage { ReferenceVoltage::Aref => w.arefen().set_bit(), _ => w.arefen().clear_bit(), }); - peripheral.admux.write(|w| match settings.ref_voltage { + peripheral.admux().write(|w| match settings.ref_voltage { ReferenceVoltage::Aref => w.refs().avcc(), ReferenceVoltage::AVcc => w.refs().avcc(), ReferenceVoltage::Internal1_1 => w.refs().internal_11(), @@ -185,7 +185,7 @@ avr_hal_generic::impl_adc! { }, channel_id: crate::pac::adc::admux::MUX_A, set_channel: |peripheral, id| { - peripheral.admux.modify(|_, w| w.mux().variant(id)); + peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { port::PA0: (crate::pac::adc::admux::MUX_A::ADC0, didr0::adc0d), diff --git a/mcu/attiny-hal/src/eeprom.rs b/mcu/attiny-hal/src/eeprom.rs index f325215dfb..85da367d45 100644 --- a/mcu/attiny-hal/src/eeprom.rs +++ b/mcu/attiny-hal/src/eeprom.rs @@ -29,7 +29,7 @@ avr_hal_generic::impl_eeprom_attiny! { capacity: 128, addr_width: u8, set_address: |peripheral, address| { - peripheral.eear.write(|w| w.bits(address)); + peripheral.eear().write(|w| w.bits(address)); }, } @@ -40,7 +40,7 @@ avr_hal_generic::impl_eeprom_attiny! { capacity: 512, addr_width: u16, set_address: |peripheral, address| { - peripheral.eear.write(|w| w.bits(address)); + peripheral.eear().write(|w| w.bits(address)); }, } @@ -51,6 +51,6 @@ avr_hal_generic::impl_eeprom_attiny! { capacity: 64, addr_width: u8, set_address: |peripheral, address| { - peripheral.eearl.write(|w| w.bits(address)); + peripheral.eearl().write(|w| w.bits(address)); }, } diff --git a/mcu/attiny-hal/src/simple_pwm.rs b/mcu/attiny-hal/src/simple_pwm.rs index f16a89c9c0..960032c0ad 100644 --- a/mcu/attiny-hal/src/simple_pwm.rs +++ b/mcu/attiny-hal/src/simple_pwm.rs @@ -9,8 +9,8 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer0Pwm { timer: crate::pac::TC0, init: |tim, prescaler| { - tim.tccr0a.modify(|_r, w| w.wgm0().pwm_fast()); - tim.tccr0b.modify(|_r, w| match prescaler { + tim.tccr0a().modify(|_r, w| w.wgm0().pwm_fast()); + tim.tccr0b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs0().direct(), Prescaler::Prescale8 => w.cs0().prescale_8(), Prescaler::Prescale64 => w.cs0().prescale_64(), @@ -22,18 +22,18 @@ avr_hal_generic::impl_simple_pwm! { PB2: { ocr: ocr0a, into_pwm: |tim| if enable { - tim.tccr0a.modify(|_r, w| w.com0a().match_clear()); + tim.tccr0a().modify(|_r, w| w.com0a().match_clear()); } else { - tim.tccr0a.modify(|_r, w| w.com0a().disconnected()); + tim.tccr0a().modify(|_r, w| w.com0a().disconnected()); }, }, PA7: { ocr: ocr0b, into_pwm: |tim| if enable { - tim.tccr0a.modify(|_r, w| w.com0b().match_clear()); + tim.tccr0a().modify(|_r, w| w.com0b().match_clear()); } else { - tim.tccr0a.modify(|_r, w| w.com0b().disconnected()); + tim.tccr0a().modify(|_r, w| w.com0b().disconnected()); }, }, }, @@ -46,10 +46,10 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer1Pwm { timer: crate::pac::TC1, init: |tim, prescaler| { - tim.tccr1a.modify(|_, w| w.wgm1().bits(0b01)); - tim.tccr1b.modify(|_, w| w.wgm1().bits(0b01)); + tim.tccr1a().modify(|_, w| w.wgm1().set(0b01)); + tim.tccr1b().modify(|_, w| w.wgm1().set(0b01)); - tim.tccr1b.modify(|_r, w| match prescaler { + tim.tccr1b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs1().direct(), Prescaler::Prescale8 => w.cs1().prescale_8(), Prescaler::Prescale64 => w.cs1().prescale_64(), @@ -61,18 +61,18 @@ avr_hal_generic::impl_simple_pwm! { PA6: { ocr: ocr1a, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_, w| w.com1a().bits(0b10)); + tim.tccr1a().modify(|_, w| w.com1a().set(0b10)); } else { - tim.tccr1a.modify(|_, w| w.com1a().disconnected()); + tim.tccr1a().modify(|_, w| w.com1a().disconnected()); }, }, PA5: { ocr: ocr1b, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_, w| w.com1b().bits(0b10)); + tim.tccr1a().modify(|_, w| w.com1b().set(0b10)); } else { - tim.tccr1a.modify(|_, w| w.com1b().disconnected()); + tim.tccr1a().modify(|_, w| w.com1b().disconnected()); }, }, }, @@ -96,8 +96,8 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer0Pwm { timer: crate::pac::TC0, init: |tim, prescaler| { - tim.tccr0a.modify(|_r, w| w.wgm0().pwm_fast()); - tim.tccr0b.modify(|_r, w| match prescaler { + tim.tccr0a().modify(|_r, w| w.wgm0().pwm_fast()); + tim.tccr0b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs0().direct(), Prescaler::Prescale8 => w.cs0().prescale_8(), Prescaler::Prescale64 => w.cs0().prescale_64(), @@ -109,18 +109,18 @@ avr_hal_generic::impl_simple_pwm! { PB0: { ocr: ocr0a, into_pwm: |tim| if enable { - tim.tccr0a.modify(|_r, w| w.com0a().match_clear()); + tim.tccr0a().modify(|_r, w| w.com0a().match_clear()); } else { - tim.tccr0a.modify(|_r, w| w.com0a().disconnected()); + tim.tccr0a().modify(|_r, w| w.com0a().disconnected()); }, }, PB1: { ocr: ocr0b, into_pwm: |tim| if enable { - tim.tccr0a.modify(|_r, w| w.com0b().match_clear()); + tim.tccr0a().modify(|_r, w| w.com0b().match_clear()); } else { - tim.tccr0a.modify(|_r, w| w.com0b().disconnected()); + tim.tccr0a().modify(|_r, w| w.com0b().disconnected()); }, }, }, @@ -143,9 +143,9 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer1Pwm { timer: crate::pac::TC1, init: |tim, prescaler| { - tim.gtccr.modify(|_, w| w.pwm1b().bit(true)); + tim.gtccr().modify(|_, w| w.pwm1b().bit(true)); - tim.tccr1.modify(|_r, w| match prescaler { + tim.tccr1().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs1().direct(), Prescaler::Prescale8 => w.cs1().prescale_8(), Prescaler::Prescale64 => w.cs1().prescale_64(), @@ -157,9 +157,9 @@ avr_hal_generic::impl_simple_pwm! { PB4: { ocr: ocr1b, into_pwm: |tim| if enable { - tim.gtccr.modify(|_, w| w.com1b().bits(0b10)); + tim.gtccr().modify(|_, w| w.com1b().set(0b10)); } else { - tim.gtccr.modify(|_, w| w.com1b().disconnected()); + tim.gtccr().modify(|_, w| w.com1b().disconnected()); }, }, }, @@ -183,10 +183,10 @@ avr_hal_generic::impl_simple_pwm! { pub struct Timer1Pwm { timer: crate::pac::TC1, init: |tim, prescaler| { - tim.tccr1a.modify(|_, w| w.wgm1().bits(0b01)); - tim.tccr1b.modify(|_, w| w.wgm1().bits(0b01)); + tim.tccr1a().modify(|_, w| w.wgm1().set(0b01)); + tim.tccr1b().modify(|_, w| w.wgm1().set(0b01)); - tim.tccr1b.modify(|_r, w| match prescaler { + tim.tccr1b().modify(|_r, w| match prescaler { Prescaler::Direct => w.cs1().direct(), Prescaler::Prescale8 => w.cs1().prescale_8(), Prescaler::Prescale64 => w.cs1().prescale_64(), @@ -198,18 +198,18 @@ avr_hal_generic::impl_simple_pwm! { PB1: { ocr: ocr1a, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_, w| w.com1a().bits(0b10)); + tim.tccr1a().modify(|_, w| w.com1a().set(0b10)); } else { - tim.tccr1a.modify(|_, w| w.com1a().disconnected()); + tim.tccr1a().modify(|_, w| w.com1a().disconnected()); }, }, PB2: { ocr: ocr1b, into_pwm: |tim| if enable { - tim.tccr1a.modify(|_, w| w.com1b().bits(0b10)); + tim.tccr1a().modify(|_, w| w.com1b().set(0b10)); } else { - tim.tccr1a.modify(|_, w| w.com1b().disconnected()); + tim.tccr1a().modify(|_, w| w.com1b().disconnected()); }, }, }, From 27b381e76beca49180f7de1472f1766d8915d539 Mon Sep 17 00:00:00 2001 From: Rahix Date: Wed, 30 Apr 2025 02:03:19 +0200 Subject: [PATCH 04/11] treewide: Remove critical-section-impl crate features avr-device no longer has a `critical-section-impl` feature. Instead it now has a `critical-section` feature that is enabled by default [1]. As such, we can drop the re-exposed feature here. [1]: https://github.com/Rahix/avr-device/pull/195 --- arduino-hal/Cargo.toml | 2 -- mcu/atmega-hal/Cargo.toml | 2 -- mcu/attiny-hal/Cargo.toml | 2 -- 3 files changed, 6 deletions(-) diff --git a/arduino-hal/Cargo.toml b/arduino-hal/Cargo.toml index aa70ba2558..a44fd1711e 100644 --- a/arduino-hal/Cargo.toml +++ b/arduino-hal/Cargo.toml @@ -14,8 +14,6 @@ categories = ["no-std", "embedded", "hardware-support"] default = ["rt"] rt = ["avr-device/rt"] -critical-section-impl = ["avr-device/critical-section-impl"] - board-selected = [] mcu-atmega = [] mcu-attiny = [] diff --git a/mcu/atmega-hal/Cargo.toml b/mcu/atmega-hal/Cargo.toml index bff9738b51..f76e83cf19 100644 --- a/mcu/atmega-hal/Cargo.toml +++ b/mcu/atmega-hal/Cargo.toml @@ -29,8 +29,6 @@ atmega1284p = ["avr-device/atmega1284p", "device-selected"] atmega8 = ["avr-device/atmega8", "device-selected"] atmega88p = ["avr-device/atmega88p", "device-selected"] -critical-section-impl = ["avr-device/critical-section-impl"] - # Allow certain downstream crates to overwrite the device selection error by themselves. disable-device-selection-error = [] diff --git a/mcu/attiny-hal/Cargo.toml b/mcu/attiny-hal/Cargo.toml index 737224607d..8c8f66b0b2 100644 --- a/mcu/attiny-hal/Cargo.toml +++ b/mcu/attiny-hal/Cargo.toml @@ -19,8 +19,6 @@ attiny88 = ["avr-device/attiny88", "device-selected"] attiny167 = ["avr-device/attiny167", "device-selected"] attiny2313 = ["avr-device/attiny2313", "device-selected"] -critical-section-impl = ["avr-device/critical-section-impl"] - # Allow certain downstream crates to overwrite the device selection error by themselves. disable-device-selection-error = [] From b0ef7fe0821c91eb94af242d824a8306250e43ea Mon Sep 17 00:00:00 2001 From: Rahix Date: Wed, 30 Apr 2025 01:31:11 +0200 Subject: [PATCH 05/11] [WIP] generic: Accommodate for new return value of write() and modify() --- avr-hal-generic/src/eeprom.rs | 2 +- avr-hal-generic/src/port.rs | 46 ++++++++++++++++++++--------------- avr-hal-generic/src/usart.rs | 15 +++++++----- 3 files changed, 37 insertions(+), 26 deletions(-) diff --git a/avr-hal-generic/src/eeprom.rs b/avr-hal-generic/src/eeprom.rs index 3893da0604..ea9e5bb0b1 100644 --- a/avr-hal-generic/src/eeprom.rs +++ b/avr-hal-generic/src/eeprom.rs @@ -319,7 +319,7 @@ macro_rules! impl_eeprom_atmega { regs.eecr().write(|w| { // Set Master Write Enable bit, and and Erase+Write mode mode.. w.eempe().set_bit().eepm().val_0x00() - }) + }); } #[inline] pub unsafe fn set_erase_mode(regs: &$EEPROM) { diff --git a/avr-hal-generic/src/port.rs b/avr-hal-generic/src/port.rs index 9e1259f07f..570b0b8262 100644 --- a/avr-hal-generic/src/port.rs +++ b/avr-hal-generic/src/port.rs @@ -633,18 +633,22 @@ macro_rules! impl_port_traditional_base { #[inline] unsafe fn out_set(&mut self) { match self.port { - $(DynamicPort::[] => (*<$port>::ptr()).[]().modify(|r, w| { - w.bits(r.bits() | self.mask) - }),)+ + $(DynamicPort::[] => { + (*<$port>::ptr()).[]().modify(|r, w| { + w.bits(r.bits() | self.mask) + }); + })+ } } #[inline] unsafe fn out_clear(&mut self) { match self.port { - $(DynamicPort::[] => (*<$port>::ptr()).[]().modify(|r, w| { - w.bits(r.bits() & !self.mask) - }),)+ + $(DynamicPort::[] => { + (*<$port>::ptr()).[]().modify(|r, w| { + w.bits(r.bits() & !self.mask) + }); + })+ } } @@ -655,7 +659,7 @@ macro_rules! impl_port_traditional_base { if $chip_supports_atomic_toggle { (*<$port>::ptr()).[]().write(|w| { w.bits(self.mask) - }) + }); } else { // This read-modify-write sequence cannot be optimized into a single sbi/cbi instruction, // so it is wrapped in a critical section which ensures we will never hit a race-condition here. @@ -663,7 +667,7 @@ macro_rules! impl_port_traditional_base { (*<$port>::ptr()).[]().modify(|r, w| { w.bits(r.bits() ^ self.mask) }) - }) + }); } },)+ } @@ -690,18 +694,22 @@ macro_rules! impl_port_traditional_base { #[inline] unsafe fn make_output(&mut self) { match self.port { - $(DynamicPort::[] => (*<$port>::ptr()).[]().modify(|r, w| { - w.bits(r.bits() | self.mask) - }),)+ + $(DynamicPort::[] => { + (*<$port>::ptr()).[]().modify(|r, w| { + w.bits(r.bits() | self.mask) + }); + })+ } } #[inline] unsafe fn make_input(&mut self, pull_up: bool) { match self.port { - $(DynamicPort::[] => (*<$port>::ptr()).[]().modify(|r, w| { - w.bits(r.bits() & !self.mask) - }),)+ + $(DynamicPort::[] => { + (*<$port>::ptr()).[]().modify(|r, w| { + w.bits(r.bits() & !self.mask) + }); + })+ } if pull_up { self.out_set() @@ -730,14 +738,14 @@ macro_rules! impl_port_traditional_base { unsafe fn out_set(&mut self) { (*<$port>::ptr()).[]().modify(|_, w| { w.[

]().set_bit() - }) + }); } #[inline] unsafe fn out_clear(&mut self) { (*<$port>::ptr()).[]().modify(|_, w| { w.[

]().clear_bit() - }) + }); } #[inline] @@ -745,14 +753,14 @@ macro_rules! impl_port_traditional_base { if $chip_supports_atomic_toggle { (*<$port>::ptr()).[]().write(|w| { w.[

]().set_bit() - }) + }); } else { // This read-modify-write sequence cannot be optimized into a single sbi/cbi instruction, // so it is wrapped in a critical section which ensures we will never hit a race-condition here. $crate::avr_device::interrupt::free(|_| { (*<$port>::ptr()).[]().modify(|r, w| { w.[

]().bit(!r.[

]().bit()) - }) + }); }) } } @@ -771,7 +779,7 @@ macro_rules! impl_port_traditional_base { unsafe fn make_output(&mut self) { (*<$port>::ptr()).[]().modify(|_, w| { w.[

]().set_bit() - }) + }); } #[inline] diff --git a/avr-hal-generic/src/usart.rs b/avr-hal-generic/src/usart.rs index ed670014c5..9964e362ad 100644 --- a/avr-hal-generic/src/usart.rs +++ b/avr-hal-generic/src/usart.rs @@ -535,12 +535,15 @@ macro_rules! impl_usart_traditional { fn raw_interrupt(&mut self, event: $crate::usart::Event, state: bool) { match event { - $crate::usart::Event::RxComplete => - self.[]().modify(|_, w| w.[]().bit(state)), - $crate::usart::Event::TxComplete => - self.[]().modify(|_, w| w.[]().bit(state)), - $crate::usart::Event::DataRegisterEmpty => - self.[]().modify(|_, w| w.[]().bit(state)), + $crate::usart::Event::RxComplete => { + self.[]().modify(|_, w| w.[]().bit(state)); + } + $crate::usart::Event::TxComplete => { + self.[]().modify(|_, w| w.[]().bit(state)); + } + $crate::usart::Event::DataRegisterEmpty => { + self.[]().modify(|_, w| w.[]().bit(state)); + } } } } From acaba7ed151e435fce4c4f33662766f462ffda95 Mon Sep 17 00:00:00 2001 From: Rahix Date: Wed, 30 Apr 2025 01:30:30 +0200 Subject: [PATCH 06/11] [WIP] treewide: Use CamelCase peripheral names everywhere --- arduino-hal/src/lib.rs | 10 +- .../src/bin/uno-16chan-servo-driver.rs | 2 +- examples/arduino-uno/src/bin/uno-adc.rs | 2 +- examples/arduino-uno/src/bin/uno-eeprom.rs | 2 +- .../arduino-uno/src/bin/uno-ext-interrupt.rs | 4 +- examples/arduino-uno/src/bin/uno-hc-sr04.rs | 2 +- examples/arduino-uno/src/bin/uno-i2cdetect.rs | 2 +- examples/arduino-uno/src/bin/uno-infrared.rs | 12 +- .../arduino-uno/src/bin/uno-manual-servo.rs | 2 +- examples/arduino-uno/src/bin/uno-millis.rs | 4 +- .../src/bin/uno-pin-change-interrupt.rs | 4 +- .../src/bin/uno-simple-pwm-embedded-hal.rs | 2 +- .../arduino-uno/src/bin/uno-simple-pwm.rs | 2 +- .../arduino-uno/src/bin/uno-spi-feedback.rs | 2 +- examples/arduino-uno/src/bin/uno-timer.rs | 22 +-- examples/arduino-uno/src/bin/uno-watchdog.rs | 2 +- mcu/atmega-hal/src/adc.rs | 156 +++++++++--------- mcu/atmega-hal/src/eeprom.rs | 18 +- mcu/atmega-hal/src/i2c.rs | 24 +-- mcu/atmega-hal/src/lib.rs | 18 +- mcu/atmega-hal/src/port.rs | 82 ++++----- mcu/atmega-hal/src/simple_pwm.rs | 46 +++--- mcu/atmega-hal/src/spi.rs | 20 +-- mcu/atmega-hal/src/usart.rs | 34 ++-- mcu/atmega-hal/src/wdt.rs | 8 +- 25 files changed, 241 insertions(+), 241 deletions(-) diff --git a/arduino-hal/src/lib.rs b/arduino-hal/src/lib.rs index eb513bb354..b576df1fcb 100644 --- a/arduino-hal/src/lib.rs +++ b/arduino-hal/src/lib.rs @@ -243,7 +243,7 @@ macro_rules! pins { macro_rules! default_serial { ($p:expr, $pins:expr, $baud:expr) => { $crate::Usart::new( - $p.USART1, + $p.usart1, $pins.d0, $pins.d1.into_output(), $crate::hal::usart::BaudrateExt::into_baudrate($baud), @@ -264,7 +264,7 @@ macro_rules! default_serial { macro_rules! default_serial { ($p:expr, $pins:expr, $baud:expr) => { $crate::Usart::new( - $p.USART1, + $p.usart1, $pins.rx, $pins.tx.into_output(), $crate::hal::usart::BaudrateExt::into_baudrate($baud), @@ -287,7 +287,7 @@ macro_rules! default_serial { /// let dp = arduino_hal::Peripherals::take().unwrap(); /// let pins = arduino_hal::pins!(dp); /// let serial = arduino_hal::Usart::new( -/// dp.USART1, +/// dp.usart1, /// pins.d0, /// pins.d1.into_output(), /// // See src/usart.rs for why some boards use the BaudrateArduinoExt trait @@ -305,7 +305,7 @@ macro_rules! default_serial { macro_rules! default_serial { ($p:expr, $pins:expr, $baud:expr) => { $crate::Usart::new( - $p.USART0, + $p.usart0, $pins.d0, $pins.d1.into_output(), // See comment in avr-hal-generic/src/usart.rs for why these boards use the @@ -333,7 +333,7 @@ macro_rules! default_serial { macro_rules! default_serial { ($p:expr, $pins:expr, $baud:expr) => { $crate::Usart::new( - $p.USART0, + $p.usart0, $pins.d0, $pins.d1.into_output(), $crate::hal::usart::BaudrateExt::into_baudrate($baud), diff --git a/examples/arduino-uno/src/bin/uno-16chan-servo-driver.rs b/examples/arduino-uno/src/bin/uno-16chan-servo-driver.rs index b30ebc7c73..36bf0bafdd 100644 --- a/examples/arduino-uno/src/bin/uno-16chan-servo-driver.rs +++ b/examples/arduino-uno/src/bin/uno-16chan-servo-driver.rs @@ -28,7 +28,7 @@ fn main() -> ! { let mut led = pins.d13.into_output(); let i2c = arduino_hal::I2c::new( - dp.TWI, + dp.twi, pins.a4.into_pull_up_input(), pins.a5.into_pull_up_input(), 100_000, diff --git a/examples/arduino-uno/src/bin/uno-adc.rs b/examples/arduino-uno/src/bin/uno-adc.rs index 57ad302314..0e1ca7d902 100644 --- a/examples/arduino-uno/src/bin/uno-adc.rs +++ b/examples/arduino-uno/src/bin/uno-adc.rs @@ -23,7 +23,7 @@ fn main() -> ! { let pins = arduino_hal::pins!(dp); let mut serial = arduino_hal::default_serial!(dp, pins, 57600); - let mut adc = arduino_hal::Adc::new(dp.ADC, Default::default()); + let mut adc = arduino_hal::Adc::new(dp.adc, Default::default()); let (vbg, gnd, tmp) = ( adc.read_blocking(&adc::channel::Vbg), diff --git a/examples/arduino-uno/src/bin/uno-eeprom.rs b/examples/arduino-uno/src/bin/uno-eeprom.rs index 5f0e04960f..635574696c 100644 --- a/examples/arduino-uno/src/bin/uno-eeprom.rs +++ b/examples/arduino-uno/src/bin/uno-eeprom.rs @@ -13,7 +13,7 @@ fn main() -> ! { let pins = arduino_hal::pins!(dp); let mut serial = arduino_hal::default_serial!(dp, pins, 57600); - let mut ep = arduino_hal::Eeprom::new(dp.EEPROM); + let mut ep = arduino_hal::Eeprom::new(dp.eeprom); let ep_capacity = ep.capacity(); ufmt::uwriteln!(&mut serial, "eeprom capacity is:{}\r", ep_capacity).unwrap_infallible(); diff --git a/examples/arduino-uno/src/bin/uno-ext-interrupt.rs b/examples/arduino-uno/src/bin/uno-ext-interrupt.rs index 425c033556..6c45593a47 100644 --- a/examples/arduino-uno/src/bin/uno-ext-interrupt.rs +++ b/examples/arduino-uno/src/bin/uno-ext-interrupt.rs @@ -47,9 +47,9 @@ fn main() -> ! { // thanks to tsemczyszyn and Rahix: https://github.com/Rahix/avr-hal/issues/240 // Configure INT0 for falling edge. 0x03 would be rising edge. - dp.EXINT.eicra().modify(|_, w| w.isc0().set(0x02)); + dp.exint.eicra().modify(|_, w| w.isc0().set(0x02)); // Enable the INT0 interrupt source. - dp.EXINT.eimsk().modify(|_, w| w.int0().set_bit()); + dp.exint.eimsk().modify(|_, w| w.int0().set_bit()); let mut leds: [Pin; 4] = [ pins.d3.into_output().downgrade(), diff --git a/examples/arduino-uno/src/bin/uno-hc-sr04.rs b/examples/arduino-uno/src/bin/uno-hc-sr04.rs index 6e08fdaa33..f88fed2d22 100644 --- a/examples/arduino-uno/src/bin/uno-hc-sr04.rs +++ b/examples/arduino-uno/src/bin/uno-hc-sr04.rs @@ -29,7 +29,7 @@ fn main() -> ! { // it gives one clock count every 4 µs. // since the clock register size is 16 bits, the timer is full every // 1/(16e6/64)*2^16 ≈ 260 ms - let timer1 = dp.TC1; + let timer1 = dp.tc1; timer1.tccr1b().write(|w| w.cs1().prescale_64()); 'outer: loop { diff --git a/examples/arduino-uno/src/bin/uno-i2cdetect.rs b/examples/arduino-uno/src/bin/uno-i2cdetect.rs index 54d7f37301..ab40e942e8 100644 --- a/examples/arduino-uno/src/bin/uno-i2cdetect.rs +++ b/examples/arduino-uno/src/bin/uno-i2cdetect.rs @@ -27,7 +27,7 @@ fn main() -> ! { let mut serial = arduino_hal::default_serial!(dp, pins, 57600); let mut i2c = arduino_hal::I2c::new( - dp.TWI, + dp.twi, pins.a4.into_pull_up_input(), pins.a5.into_pull_up_input(), 50000, diff --git a/examples/arduino-uno/src/bin/uno-infrared.rs b/examples/arduino-uno/src/bin/uno-infrared.rs index 0c1ba59318..9aad51f45b 100644 --- a/examples/arduino-uno/src/bin/uno-infrared.rs +++ b/examples/arduino-uno/src/bin/uno-infrared.rs @@ -24,7 +24,7 @@ use panic_halt as _; use arduino_hal::{ hal::port::{PD2, PD6, PD7}, - pac::tc0::tccr0b::CS0_A, + pac::tc0::tccr0b::Cs0, port::mode::{Floating, Input, Output}, port::Pin, prelude::*, @@ -51,7 +51,7 @@ fn main() -> ! { let mut serial = arduino_hal::default_serial!(dp, pins, 57600); // Monotonic clock to keep track of the time - CLOCK.start(dp.TC0); + CLOCK.start(dp.tc0); let mut uno_led = pins.d13.into_output(); let mut irdroino_led1 = pins.d7.into_output(); @@ -62,10 +62,10 @@ fn main() -> ! { irdroino_led2.set_low(); // Enable group 2 (PORTD) - dp.EXINT.pcicr().write(|w| unsafe { w.bits(0b100) }); + dp.exint.pcicr().write(|w| unsafe { w.bits(0b100) }); // Enable pin change interrupts on PCINT18 which is pin PD2 (= d2) - dp.EXINT.pcmsk2().write(|w| w.set(0b100)); + dp.exint.pcmsk2().write(|w| w.set(0b100)); let ir = Receiver::with_pin(Clock::FREQ, pins.d2); @@ -130,7 +130,7 @@ struct Clock { impl Clock { const FREQ: u32 = 20_000; - const PRESCALER: CS0_A = CS0_A::PRESCALE_8; + const PRESCALER: Cs0 = Cs0::Prescale8; const TOP: u8 = 99; pub const fn new() -> Clock { @@ -139,7 +139,7 @@ impl Clock { } } - pub fn start(&self, tc0: arduino_hal::pac::TC0) { + pub fn start(&self, tc0: arduino_hal::pac::Tc0) { // Configure the timer for the above interval (in CTC mode) tc0.tccr0a().write(|w| w.wgm0().ctc()); tc0.ocr0a().write(|w| w.set(Self::TOP)); diff --git a/examples/arduino-uno/src/bin/uno-manual-servo.rs b/examples/arduino-uno/src/bin/uno-manual-servo.rs index ee67fa8357..c9678dca82 100644 --- a/examples/arduino-uno/src/bin/uno-manual-servo.rs +++ b/examples/arduino-uno/src/bin/uno-manual-servo.rs @@ -29,7 +29,7 @@ fn main() -> ! { // - TC1 runs off a 250kHz clock, with 5000 counts per overflow => 50 Hz signal. // - Each count increases the duty-cycle by 4us. // - Use OC1A which is connected to D9 of the Arduino Uno. - let tc1 = dp.TC1; + let tc1 = dp.tc1; tc1.icr1().write(|w| w.set(4999)); tc1.tccr1a() .write(|w| w.wgm1().set(0b10).com1a().match_clear()); diff --git a/examples/arduino-uno/src/bin/uno-millis.rs b/examples/arduino-uno/src/bin/uno-millis.rs index e9c22eee62..cf5de13050 100644 --- a/examples/arduino-uno/src/bin/uno-millis.rs +++ b/examples/arduino-uno/src/bin/uno-millis.rs @@ -35,7 +35,7 @@ const MILLIS_INCREMENT: u32 = PRESCALER * TIMER_COUNTS / 16000; static MILLIS_COUNTER: avr_device::interrupt::Mutex> = avr_device::interrupt::Mutex::new(cell::Cell::new(0)); -fn millis_init(tc0: arduino_hal::pac::TC0) { +fn millis_init(tc0: arduino_hal::pac::Tc0) { // Configure the timer for the above interval (in CTC mode) // and enable its interrupt. tc0.tccr0a().write(|w| w.wgm0().ctc()); @@ -76,7 +76,7 @@ fn main() -> ! { let pins = arduino_hal::pins!(dp); let mut serial = arduino_hal::default_serial!(dp, pins, 57600); - millis_init(dp.TC0); + millis_init(dp.tc0); // Enable interrupts globally unsafe { avr_device::interrupt::enable() }; diff --git a/examples/arduino-uno/src/bin/uno-pin-change-interrupt.rs b/examples/arduino-uno/src/bin/uno-pin-change-interrupt.rs index 42a71d3750..8dedebd9d3 100644 --- a/examples/arduino-uno/src/bin/uno-pin-change-interrupt.rs +++ b/examples/arduino-uno/src/bin/uno-pin-change-interrupt.rs @@ -49,10 +49,10 @@ fn main() -> ! { ]; // Enable the PCINT2 pin change interrupt - dp.EXINT.pcicr().write(|w| unsafe { w.bits(0b100) }); + dp.exint.pcicr().write(|w| unsafe { w.bits(0b100) }); // Enable pin change interrupts on PCINT18 which is pin PD2 (= d2) - dp.EXINT.pcmsk2().write(|w| w.set(0b100)); + dp.exint.pcmsk2().write(|w| w.set(0b100)); //From this point on an interrupt can happen unsafe { avr_device::interrupt::enable() }; diff --git a/examples/arduino-uno/src/bin/uno-simple-pwm-embedded-hal.rs b/examples/arduino-uno/src/bin/uno-simple-pwm-embedded-hal.rs index e0e0e2a786..040b6bab2f 100644 --- a/examples/arduino-uno/src/bin/uno-simple-pwm-embedded-hal.rs +++ b/examples/arduino-uno/src/bin/uno-simple-pwm-embedded-hal.rs @@ -24,7 +24,7 @@ fn main() -> ! { let dp = arduino_hal::Peripherals::take().unwrap(); let pins = arduino_hal::pins!(dp); - let timer0 = Timer0Pwm::new(dp.TC0, Prescaler::Prescale64); + let timer0 = Timer0Pwm::new(dp.tc0, Prescaler::Prescale64); // Digital pin 5 is connected to a LED and a resistor in series let mut pwm_led = pins.d5.into_output().into_pwm(&timer0); diff --git a/examples/arduino-uno/src/bin/uno-simple-pwm.rs b/examples/arduino-uno/src/bin/uno-simple-pwm.rs index c7f39f7e59..4b9bd4b11b 100644 --- a/examples/arduino-uno/src/bin/uno-simple-pwm.rs +++ b/examples/arduino-uno/src/bin/uno-simple-pwm.rs @@ -12,7 +12,7 @@ fn main() -> ! { let dp = arduino_hal::Peripherals::take().unwrap(); let pins = arduino_hal::pins!(dp); - let timer0 = Timer0Pwm::new(dp.TC0, Prescaler::Prescale64); + let timer0 = Timer0Pwm::new(dp.tc0, Prescaler::Prescale64); // Digital pin 5 is connected to a LED and a resistor in series let mut pwm_led = pins.d5.into_output().into_pwm(&timer0); diff --git a/examples/arduino-uno/src/bin/uno-spi-feedback.rs b/examples/arduino-uno/src/bin/uno-spi-feedback.rs index 7ca86d907a..5de9885ed9 100644 --- a/examples/arduino-uno/src/bin/uno-spi-feedback.rs +++ b/examples/arduino-uno/src/bin/uno-spi-feedback.rs @@ -28,7 +28,7 @@ fn main() -> ! { // Create SPI interface. let (mut spi, _) = arduino_hal::Spi::new( - dp.SPI, + dp.spi, pins.d13.into_output(), pins.d11.into_output(), pins.d12.into_pull_up_input(), diff --git a/examples/arduino-uno/src/bin/uno-timer.rs b/examples/arduino-uno/src/bin/uno-timer.rs index 83b163d8f6..a78c7c05d9 100644 --- a/examples/arduino-uno/src/bin/uno-timer.rs +++ b/examples/arduino-uno/src/bin/uno-timer.rs @@ -12,8 +12,8 @@ and then modernized to account for API drift since 2020 use arduino_hal::port::mode::Output; use arduino_hal::port::Pin; use arduino_hal::prelude::*; -use avr_device::atmega328p::tc1::tccr1b::CS1_A; -use avr_device::atmega328p::TC1; +use avr_device::atmega328p::tc1::tccr1b::Cs1; +use avr_device::atmega328p::Tc1; use core::mem; use panic_halt as _; use ufmt::{uWrite, uwriteln}; @@ -46,7 +46,7 @@ fn main() -> ! { // - let tmr1: TC1 = dp.TC1; + let tmr1: Tc1 = dp.tc1; rig_timer(&tmr1, &mut serial); @@ -77,7 +77,7 @@ pub const fn calc_overflow(clock_hz: u32, target_hz: u32, prescale: u32) -> u32 clock_hz / target_hz / prescale - 1 } -pub fn rig_timer>(tmr1: &TC1, serial: &mut W) { +pub fn rig_timer>(tmr1: &Tc1, serial: &mut W) { /* https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-7810-Automotive-Microcontrollers-ATmega328P_Datasheet.pdf section 15.11 @@ -85,14 +85,14 @@ pub fn rig_timer>(tmr1: &TC1, ser use arduino_hal::clock::Clock; const ARDUINO_UNO_CLOCK_FREQUENCY_HZ: u32 = arduino_hal::DefaultClock::FREQ; - const CLOCK_SOURCE: CS1_A = CS1_A::PRESCALE_256; + const CLOCK_SOURCE: Cs1 = Cs1::Prescale256; let clock_divisor: u32 = match CLOCK_SOURCE { - CS1_A::DIRECT => 1, - CS1_A::PRESCALE_8 => 8, - CS1_A::PRESCALE_64 => 64, - CS1_A::PRESCALE_256 => 256, - CS1_A::PRESCALE_1024 => 1024, - CS1_A::NO_CLOCK | CS1_A::EXT_FALLING | CS1_A::EXT_RISING => { + Cs1::Direct => 1, + Cs1::Prescale8 => 8, + Cs1::Prescale64 => 64, + Cs1::Prescale256 => 256, + Cs1::Prescale1024 => 1024, + Cs1::NoClock | Cs1::ExtFalling | Cs1::ExtRising => { uwriteln!(serial, "uhoh, code tried to set the clock source to something other than a static prescaler {}", CLOCK_SOURCE as usize) .unwrap_infallible(); 1 diff --git a/examples/arduino-uno/src/bin/uno-watchdog.rs b/examples/arduino-uno/src/bin/uno-watchdog.rs index 1801b127ce..40eadd4439 100644 --- a/examples/arduino-uno/src/bin/uno-watchdog.rs +++ b/examples/arduino-uno/src/bin/uno-watchdog.rs @@ -24,7 +24,7 @@ fn main() -> ! { arduino_hal::delay_ms(100); } - let mut watchdog = wdt::Wdt::new(dp.WDT, &dp.CPU.mcusr()); + let mut watchdog = wdt::Wdt::new(dp.wdt, &dp.cpu.mcusr()); watchdog.start(wdt::Timeout::Ms2000).unwrap(); loop { diff --git a/mcu/atmega-hal/src/adc.rs b/mcu/atmega-hal/src/adc.rs index 6dd225a751..91584b5acc 100644 --- a/mcu/atmega-hal/src/adc.rs +++ b/mcu/atmega-hal/src/adc.rs @@ -55,7 +55,7 @@ pub struct AdcSettings { pub ref_voltage: ReferenceVoltage, } -fn apply_settings(peripheral: &crate::pac::ADC, settings: AdcSettings) { +fn apply_settings(peripheral: &crate::pac::Adc, settings: AdcSettings) { peripheral.adcsra().write(|w| { w.aden().set_bit(); match settings.clock_divider { @@ -76,10 +76,10 @@ fn apply_settings(peripheral: &crate::pac::ADC, settings: AdcSettings) { } /// Check the [`avr_hal_generic::adc::Adc`] documentation. -pub type Adc = avr_hal_generic::adc::Adc; +pub type Adc = avr_hal_generic::adc::Adc; /// Check the [`avr_hal_generic::adc::Channel`] documentation. -pub type Channel = avr_hal_generic::adc::Channel; +pub type Channel = avr_hal_generic::adc::Channel; /// Additional channels /// @@ -178,63 +178,63 @@ pub mod channel { ))] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::ADC, + peripheral: crate::pac::Adc, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, - channel_id: crate::pac::adc::admux::MUX_A, + channel_id: crate::pac::adc::admux::Mux, set_channel: |peripheral, id| { peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { - port::PC0: (crate::pac::adc::admux::MUX_A::ADC0, didr0::adc0d), - port::PC1: (crate::pac::adc::admux::MUX_A::ADC1, didr0::adc1d), - port::PC2: (crate::pac::adc::admux::MUX_A::ADC2, didr0::adc2d), - port::PC3: (crate::pac::adc::admux::MUX_A::ADC3, didr0::adc3d), - port::PC4: (crate::pac::adc::admux::MUX_A::ADC4, didr0::adc4d), - port::PC5: (crate::pac::adc::admux::MUX_A::ADC5, didr0::adc5d), + port::PC0: (crate::pac::adc::admux::Mux::Adc0, didr0::adc0d), + port::PC1: (crate::pac::adc::admux::Mux::Adc1, didr0::adc1d), + port::PC2: (crate::pac::adc::admux::Mux::Adc2, didr0::adc2d), + port::PC3: (crate::pac::adc::admux::Mux::Adc3, didr0::adc3d), + port::PC4: (crate::pac::adc::admux::Mux::Adc4, didr0::adc4d), + port::PC5: (crate::pac::adc::admux::Mux::Adc5, didr0::adc5d), }, channels: { #[cfg(feature = "enable-extra-adc")] - channel::ADC6: crate::pac::adc::admux::MUX_A::ADC6, + channel::ADC6: crate::pac::adc::admux::Mux::Adc6, #[cfg(feature = "enable-extra-adc")] - channel::ADC7: crate::pac::adc::admux::MUX_A::ADC7, - channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG, - channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND, + channel::ADC7: crate::pac::adc::admux::Mux::Adc7, + channel::Vbg: crate::pac::adc::admux::Mux::AdcVbg, + channel::Gnd: crate::pac::adc::admux::Mux::AdcGnd, #[cfg(any(feature = "atmega328p", feature = "atmega328pb", feature = "atmega48p"))] - channel::Temperature: crate::pac::adc::admux::MUX_A::TEMPSENS, + channel::Temperature: crate::pac::adc::admux::Mux::Tempsens, }, } #[cfg(any(feature = "atmega16", feature = "atmega32a"))] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::ADC, + peripheral: crate::pac::Adc, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, - channel_id: crate::pac::adc::admux::MUX_A, + channel_id: crate::pac::adc::admux::Mux, set_channel: |peripheral, id| { peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { - port::PA0: (crate::pac::adc::admux::MUX_A::ADC0), - port::PA1: (crate::pac::adc::admux::MUX_A::ADC1), - port::PA2: (crate::pac::adc::admux::MUX_A::ADC2), - port::PA3: (crate::pac::adc::admux::MUX_A::ADC3), - port::PA4: (crate::pac::adc::admux::MUX_A::ADC4), - port::PA5: (crate::pac::adc::admux::MUX_A::ADC5), - port::PA6: (crate::pac::adc::admux::MUX_A::ADC6), - port::PA7: (crate::pac::adc::admux::MUX_A::ADC7), + port::PA0: (crate::pac::adc::admux::Mux::Adc0), + port::PA1: (crate::pac::adc::admux::Mux::Adc1), + port::PA2: (crate::pac::adc::admux::Mux::Adc2), + port::PA3: (crate::pac::adc::admux::Mux::Adc3), + port::PA4: (crate::pac::adc::admux::Mux::Adc4), + port::PA5: (crate::pac::adc::admux::Mux::Adc5), + port::PA6: (crate::pac::adc::admux::Mux::Adc6), + port::PA7: (crate::pac::adc::admux::Mux::Adc7), }, channels: { - channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG, - channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND, + channel::Vbg: crate::pac::adc::admux::Mux::AdcVbg, + channel::Gnd: crate::pac::adc::admux::Mux::AdcGnd, }, } #[cfg(feature = "atmega32u4")] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::ADC, + peripheral: crate::pac::Adc, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, channel_id: u8, @@ -266,33 +266,33 @@ avr_hal_generic::impl_adc! { #[cfg(feature = "atmega128a")] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::ADC, + peripheral: crate::pac::Adc, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, - channel_id: crate::pac::adc::admux::MUX_A, + channel_id: crate::pac::adc::admux::Mux, set_channel: |peripheral, id| { peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { - port::PF0: (crate::pac::adc::admux::MUX_A::ADC0), - port::PF1: (crate::pac::adc::admux::MUX_A::ADC1), - port::PF2: (crate::pac::adc::admux::MUX_A::ADC2), - port::PF3: (crate::pac::adc::admux::MUX_A::ADC3), - port::PF4: (crate::pac::adc::admux::MUX_A::ADC4), - port::PF5: (crate::pac::adc::admux::MUX_A::ADC5), - port::PF6: (crate::pac::adc::admux::MUX_A::ADC6), - port::PF7: (crate::pac::adc::admux::MUX_A::ADC7), + port::PF0: (crate::pac::adc::admux::Mux::Adc0), + port::PF1: (crate::pac::adc::admux::Mux::Adc1), + port::PF2: (crate::pac::adc::admux::Mux::Adc2), + port::PF3: (crate::pac::adc::admux::Mux::Adc3), + port::PF4: (crate::pac::adc::admux::Mux::Adc4), + port::PF5: (crate::pac::adc::admux::Mux::Adc5), + port::PF6: (crate::pac::adc::admux::Mux::Adc6), + port::PF7: (crate::pac::adc::admux::Mux::Adc7), }, channels: { - channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG, - channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND, + channel::Vbg: crate::pac::adc::admux::Mux::AdcVbg, + channel::Gnd: crate::pac::adc::admux::Mux::AdcGnd, }, } #[cfg(any(feature = "atmega2560", feature = "atmega1280"))] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::ADC, + peripheral: crate::pac::Adc, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, channel_id: u8, @@ -327,81 +327,81 @@ avr_hal_generic::impl_adc! { #[cfg(any(feature = "atmega1284p"))] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::ADC, + peripheral: crate::pac::Adc, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, - channel_id: crate::pac::adc::admux::MUX_A, + channel_id: crate::pac::adc::admux::Mux, set_channel: |peripheral, id| { peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { - port::PA0: (crate::pac::adc::admux::MUX_A::ADC0, didr0::adc0d), - port::PA1: (crate::pac::adc::admux::MUX_A::ADC1, didr0::adc1d), - port::PA2: (crate::pac::adc::admux::MUX_A::ADC2, didr0::adc2d), - port::PA3: (crate::pac::adc::admux::MUX_A::ADC3, didr0::adc3d), - port::PA4: (crate::pac::adc::admux::MUX_A::ADC4, didr0::adc4d), - port::PA5: (crate::pac::adc::admux::MUX_A::ADC5, didr0::adc5d), + port::PA0: (crate::pac::adc::admux::Mux::Adc0, didr0::adc0d), + port::PA1: (crate::pac::adc::admux::Mux::Adc1, didr0::adc1d), + port::PA2: (crate::pac::adc::admux::Mux::Adc2, didr0::adc2d), + port::PA3: (crate::pac::adc::admux::Mux::Adc3, didr0::adc3d), + port::PA4: (crate::pac::adc::admux::Mux::Adc4, didr0::adc4d), + port::PA5: (crate::pac::adc::admux::Mux::Adc5, didr0::adc5d), }, channels: { #[cfg(feature = "enable-extra-adc")] - channel::ADC6: crate::pac::adc::admux::MUX_A::ADC6, + channel::ADC6: crate::pac::adc::admux::Mux::Adc6, #[cfg(feature = "enable-extra-adc")] - channel::ADC7: crate::pac::adc::admux::MUX_A::ADC7, - channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG, - channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND, + channel::ADC7: crate::pac::adc::admux::Mux::Adc7, + channel::Vbg: crate::pac::adc::admux::Mux::AdcVbg, + channel::Gnd: crate::pac::adc::admux::Mux::AdcGnd, }, } #[cfg(any(feature = "atmega8"))] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::ADC, + peripheral: crate::pac::Adc, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, - channel_id: crate::pac::adc::admux::MUX_A, + channel_id: crate::pac::adc::admux::Mux, set_channel: |peripheral, id| { peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { - port::PC0: (crate::pac::adc::admux::MUX_A::ADC0), - port::PC1: (crate::pac::adc::admux::MUX_A::ADC1), - port::PC2: (crate::pac::adc::admux::MUX_A::ADC2), - port::PC3: (crate::pac::adc::admux::MUX_A::ADC3), - port::PC4: (crate::pac::adc::admux::MUX_A::ADC4), - port::PC5: (crate::pac::adc::admux::MUX_A::ADC5), + port::PC0: (crate::pac::adc::admux::Mux::Adc0), + port::PC1: (crate::pac::adc::admux::Mux::Adc1), + port::PC2: (crate::pac::adc::admux::Mux::Adc2), + port::PC3: (crate::pac::adc::admux::Mux::Adc3), + port::PC4: (crate::pac::adc::admux::Mux::Adc4), + port::PC5: (crate::pac::adc::admux::Mux::Adc5), }, channels: { #[cfg(feature = "enable-extra-adc")] - channel::ADC6: crate::pac::adc::admux::MUX_A::ADC6, + channel::ADC6: crate::pac::adc::admux::Mux::Adc6, #[cfg(feature = "enable-extra-adc")] - channel::ADC7: crate::pac::adc::admux::MUX_A::ADC7, - channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG, - channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND, + channel::ADC7: crate::pac::adc::admux::Mux::Adc7, + channel::Vbg: crate::pac::adc::admux::Mux::AdcVbg, + channel::Gnd: crate::pac::adc::admux::Mux::AdcGnd, }, } #[cfg(any(feature = "atmega164pa"))] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::ADC, + peripheral: crate::pac::Adc, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, - channel_id: crate::pac::adc::admux::MUX_A, + channel_id: crate::pac::adc::admux::Mux, set_channel: |peripheral, id| { peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { - port::PA0: (crate::pac::adc::admux::MUX_A::ADC0, didr0::adc0d), - port::PA1: (crate::pac::adc::admux::MUX_A::ADC1, didr0::adc1d), - port::PA2: (crate::pac::adc::admux::MUX_A::ADC2, didr0::adc2d), - port::PA3: (crate::pac::adc::admux::MUX_A::ADC3, didr0::adc3d), - port::PA4: (crate::pac::adc::admux::MUX_A::ADC4, didr0::adc4d), - port::PA5: (crate::pac::adc::admux::MUX_A::ADC5, didr0::adc5d), - port::PA6: (crate::pac::adc::admux::MUX_A::ADC6, didr0::adc6d), - port::PA7: (crate::pac::adc::admux::MUX_A::ADC7, didr0::adc7d), + port::PA0: (crate::pac::adc::admux::Mux::Adc0, didr0::adc0d), + port::PA1: (crate::pac::adc::admux::Mux::Adc1, didr0::adc1d), + port::PA2: (crate::pac::adc::admux::Mux::Adc2, didr0::adc2d), + port::PA3: (crate::pac::adc::admux::Mux::Adc3, didr0::adc3d), + port::PA4: (crate::pac::adc::admux::Mux::Adc4, didr0::adc4d), + port::PA5: (crate::pac::adc::admux::Mux::Adc5, didr0::adc5d), + port::PA6: (crate::pac::adc::admux::Mux::Adc6, didr0::adc6d), + port::PA7: (crate::pac::adc::admux::Mux::Adc7, didr0::adc7d), }, channels: { - channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG, - channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND, + channel::Vbg: crate::pac::adc::admux::Mux::AdcVbg, + channel::Gnd: crate::pac::adc::admux::Mux::AdcGnd, }, } diff --git a/mcu/atmega-hal/src/eeprom.rs b/mcu/atmega-hal/src/eeprom.rs index ca3d199915..1409122ffa 100644 --- a/mcu/atmega-hal/src/eeprom.rs +++ b/mcu/atmega-hal/src/eeprom.rs @@ -20,13 +20,13 @@ pub use avr_hal_generic::eeprom::{EepromOps, OutOfBoundsError}; -pub type Eeprom = avr_hal_generic::eeprom::Eeprom; +pub type Eeprom = avr_hal_generic::eeprom::Eeprom; /////////////////////////////////////////////////////////// #[cfg(feature = "atmega48p")] avr_hal_generic::impl_eeprom_atmega! { hal: crate::Atmega, - peripheral: crate::pac::EEPROM, + peripheral: crate::pac::Eeprom, capacity: 256, addr_width: u8, set_address: |peripheral, address| { @@ -37,7 +37,7 @@ avr_hal_generic::impl_eeprom_atmega! { #[cfg(feature = "atmega88p")] avr_hal_generic::impl_eeprom_atmega! { hal: crate::Atmega, - peripheral: crate::pac::EEPROM, + peripheral: crate::pac::Eeprom, capacity: 512, addr_width: u16, set_address: |peripheral, address| { @@ -48,7 +48,7 @@ avr_hal_generic::impl_eeprom_atmega! { #[cfg(any(feature = "atmega168", feature = "atmega164pa"))] avr_hal_generic::impl_eeprom_atmega! { hal: crate::Atmega, - peripheral: crate::pac::EEPROM, + peripheral: crate::pac::Eeprom, capacity: 512, addr_width: u16, set_address: |peripheral, address| { @@ -63,7 +63,7 @@ avr_hal_generic::impl_eeprom_atmega! { ))] avr_hal_generic::impl_eeprom_atmega! { hal: crate::Atmega, - peripheral: crate::pac::EEPROM, + peripheral: crate::pac::Eeprom, capacity: 1024, addr_width: u16, set_address: |peripheral, address| { @@ -78,7 +78,7 @@ avr_hal_generic::impl_eeprom_atmega! { ))] avr_hal_generic::impl_eeprom_atmega! { hal: crate::Atmega, - peripheral: crate::pac::EEPROM, + peripheral: crate::pac::Eeprom, capacity: 4096, addr_width: u16, set_address: |peripheral, address| { @@ -89,7 +89,7 @@ avr_hal_generic::impl_eeprom_atmega! { #[cfg(any(feature = "atmega8", feature = "atmega16"))] avr_hal_generic::impl_eeprom_atmega_old! { hal: crate::Atmega, - peripheral: crate::pac::EEPROM, + peripheral: crate::pac::Eeprom, capacity: 512, addr_width: u16, set_address: |peripheral, address| { @@ -100,7 +100,7 @@ avr_hal_generic::impl_eeprom_atmega_old! { #[cfg(any(feature = "atmega32a"))] avr_hal_generic::impl_eeprom_atmega_old! { hal: crate::Atmega, - peripheral: crate::pac::EEPROM, + peripheral: crate::pac::Eeprom, capacity: 1024, addr_width: u16, set_address: |peripheral, address| { @@ -111,7 +111,7 @@ avr_hal_generic::impl_eeprom_atmega_old! { #[cfg(any(feature = "atmega128a",))] avr_hal_generic::impl_eeprom_atmega_old! { hal: crate::Atmega, - peripheral: crate::pac::EEPROM, + peripheral: crate::pac::Eeprom, capacity: 4096, addr_width: u16, set_address: |peripheral, address| { diff --git a/mcu/atmega-hal/src/i2c.rs b/mcu/atmega-hal/src/i2c.rs index 1d068366db..c2efaff9a9 100644 --- a/mcu/atmega-hal/src/i2c.rs +++ b/mcu/atmega-hal/src/i2c.rs @@ -31,7 +31,7 @@ pub use avr_hal_generic::i2c::*; ))] pub type I2c = avr_hal_generic::i2c::I2c< crate::Atmega, - crate::pac::TWI, + crate::pac::Twi, port::Pin, port::Pin, CLOCK, @@ -44,7 +44,7 @@ pub type I2c = avr_hal_generic::i2c::I2c< ))] avr_hal_generic::impl_i2c_twi! { hal: crate::Atmega, - peripheral: crate::pac::TWI, + peripheral: crate::pac::Twi, sda: port::PD1, scl: port::PD0, } @@ -52,7 +52,7 @@ avr_hal_generic::impl_i2c_twi! { #[cfg(any(feature = "atmega16", feature = "atmega164pa"))] pub type I2c = avr_hal_generic::i2c::I2c< crate::Atmega, - crate::pac::TWI, + crate::pac::Twi, port::Pin, port::Pin, CLOCK, @@ -60,7 +60,7 @@ pub type I2c = avr_hal_generic::i2c::I2c< #[cfg(any(feature = "atmega16", feature = "atmega164pa"))] avr_hal_generic::impl_i2c_twi! { hal: crate::Atmega, - peripheral: crate::pac::TWI, + peripheral: crate::pac::Twi, sda: port::PC1, scl: port::PC0, } @@ -74,7 +74,7 @@ avr_hal_generic::impl_i2c_twi! { ))] pub type I2c = avr_hal_generic::i2c::I2c< crate::Atmega, - crate::pac::TWI, + crate::pac::Twi, port::Pin, port::Pin, CLOCK, @@ -88,7 +88,7 @@ pub type I2c = avr_hal_generic::i2c::I2c< ))] avr_hal_generic::impl_i2c_twi! { hal: crate::Atmega, - peripheral: crate::pac::TWI, + peripheral: crate::pac::Twi, sda: port::PC4, scl: port::PC5, } @@ -96,7 +96,7 @@ avr_hal_generic::impl_i2c_twi! { #[cfg(any(feature = "atmega328pb"))] pub type I2c0 = avr_hal_generic::i2c::I2c< crate::Atmega, - crate::pac::TWI0, + crate::pac::Twi0, port::Pin, port::Pin, CLOCK, @@ -104,14 +104,14 @@ pub type I2c0 = avr_hal_generic::i2c::I2c< #[cfg(any(feature = "atmega328pb"))] avr_hal_generic::impl_i2c_twi! { hal: crate::Atmega, - peripheral: crate::pac::TWI0, + peripheral: crate::pac::Twi0, sda: port::PC4, scl: port::PC5, } #[cfg(any(feature = "atmega328pb"))] pub type I2c1 = avr_hal_generic::i2c::I2c< crate::Atmega, - crate::pac::TWI1, + crate::pac::Twi1, port::Pin, port::Pin, CLOCK, @@ -119,7 +119,7 @@ pub type I2c1 = avr_hal_generic::i2c::I2c< #[cfg(any(feature = "atmega328pb"))] avr_hal_generic::impl_i2c_twi! { hal: crate::Atmega, - peripheral: crate::pac::TWI1, + peripheral: crate::pac::Twi1, sda: port::PE0, scl: port::PE1, } @@ -127,7 +127,7 @@ avr_hal_generic::impl_i2c_twi! { #[cfg(any(feature = "atmega1284p", feature = "atmega32a"))] pub type I2c = avr_hal_generic::i2c::I2c< crate::Atmega, - crate::pac::TWI, + crate::pac::Twi, port::Pin, port::Pin, CLOCK, @@ -135,7 +135,7 @@ pub type I2c = avr_hal_generic::i2c::I2c< #[cfg(any(feature = "atmega1284p", feature = "atmega32a"))] avr_hal_generic::impl_i2c_twi! { hal: crate::Atmega, - peripheral: crate::pac::TWI, + peripheral: crate::pac::Twi, sda: port::PC1, scl: port::PC0, } diff --git a/mcu/atmega-hal/src/lib.rs b/mcu/atmega-hal/src/lib.rs index d076052345..98bb5fbbe4 100644 --- a/mcu/atmega-hal/src/lib.rs +++ b/mcu/atmega-hal/src/lib.rs @@ -168,28 +168,28 @@ pub struct Atmega; #[macro_export] macro_rules! pins { ($p:expr) => { - $crate::Pins::new($p.PORTB, $p.PORTC, $p.PORTD) + $crate::Pins::new($p.port_b, $p.port_c, $p.port_d) }; } #[cfg(any(feature = "atmega16", feature = "atmega164pa"))] #[macro_export] macro_rules! pins { ($p:expr) => { - $crate::Pins::new($p.PORTA, $p.PORTB, $p.PORTC, $p.PORTD) + $crate::Pins::new($p.port_a, $p.port_b, $p.port_c, $p.port_d) }; } #[cfg(feature = "atmega328pb")] #[macro_export] macro_rules! pins { ($p:expr) => { - $crate::Pins::new($p.PORTB, $p.PORTC, $p.PORTD, $p.PORTE) + $crate::Pins::new($p.port_b, $p.port_c, $p.port_d, $p.port_e) }; } #[cfg(feature = "atmega32u4")] #[macro_export] macro_rules! pins { ($p:expr) => { - $crate::Pins::new($p.PORTB, $p.PORTC, $p.PORTD, $p.PORTE, $p.PORTF) + $crate::Pins::new($p.port_b, $p.port_c, $p.port_d, $p.port_e, $p.port_f) }; } @@ -198,7 +198,7 @@ macro_rules! pins { macro_rules! pins { ($p:expr) => { $crate::Pins::new( - $p.PORTA, $p.PORTB, $p.PORTC, $p.PORTD, $p.PORTE, $p.PORTF, $p.PORTG, + $p.port_a, $p.port_b, $p.port_c, $p.port_d, $p.port_e, $p.port_f, $p.port_g, ) }; } @@ -208,8 +208,8 @@ macro_rules! pins { macro_rules! pins { ($p:expr) => { $crate::Pins::new( - $p.PORTA, $p.PORTB, $p.PORTC, $p.PORTD, $p.PORTE, $p.PORTF, $p.PORTG, $p.PORTH, - $p.PORTJ, $p.PORTK, $p.PORTL, + $p.port_a, $p.port_b, $p.port_c, $p.port_d, $p.port_e, $p.port_f, $p.port_g, $p.port_h, + $p.port_j, $p.port_k, $p.port_l, ) }; } @@ -218,7 +218,7 @@ macro_rules! pins { #[macro_export] macro_rules! pins { ($p:expr) => { - $crate::Pins::new($p.PORTA, $p.PORTB, $p.PORTC, $p.PORTD) + $crate::Pins::new($p.port_a, $p.port_b, $p.port_c, $p.port_d) }; } @@ -226,6 +226,6 @@ macro_rules! pins { #[macro_export] macro_rules! pins { ($p:expr) => { - $crate::Pins::new($p.PORTB, $p.PORTC, $p.PORTD) + $crate::Pins::new($p.port_b, $p.port_c, $p.port_d) }; } diff --git a/mcu/atmega-hal/src/port.rs b/mcu/atmega-hal/src/port.rs index f33d2368a2..53dc287b09 100644 --- a/mcu/atmega-hal/src/port.rs +++ b/mcu/atmega-hal/src/port.rs @@ -27,88 +27,88 @@ pub use avr_hal_generic::port::{mode, PinMode, PinOps}; ))] avr_hal_generic::impl_port_traditional! { enum Ports { - B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7], - C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6], - D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7], + B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6, 7], + C: crate::pac::PortC = [0, 1, 2, 3, 4, 5, 6], + D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6, 7], } } #[cfg(any(feature = "atmega16", feature = "atmega32a"))] avr_hal_generic::impl_port_traditional_old! { enum Ports { - A: crate::pac::PORTA = [0, 1, 2, 3, 4, 5, 6 ,7], - B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6 ,7], - C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6 ,7], - D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6 ,7], + A: crate::pac::PortA = [0, 1, 2, 3, 4, 5, 6 ,7], + B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6 ,7], + C: crate::pac::PortC = [0, 1, 2, 3, 4, 5, 6 ,7], + D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6 ,7], } } #[cfg(feature = "atmega328pb")] avr_hal_generic::impl_port_traditional! { enum Ports { - B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7], - C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6], - D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7], - E: crate::pac::PORTE = [0, 1, 2, 3], + B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6, 7], + C: crate::pac::PortC = [0, 1, 2, 3, 4, 5, 6], + D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6, 7], + E: crate::pac::PortE = [0, 1, 2, 3], } } #[cfg(feature = "atmega32u4")] avr_hal_generic::impl_port_traditional! { enum Ports { - B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7], - C: crate::pac::PORTC = [6, 7], - D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7], - E: crate::pac::PORTE = [2, 6], - F: crate::pac::PORTF = [0, 1, 4, 5, 6, 7], + B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6, 7], + C: crate::pac::PortC = [6, 7], + D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6, 7], + E: crate::pac::PortE = [2, 6], + F: crate::pac::PortF = [0, 1, 4, 5, 6, 7], } } #[cfg(any(feature = "atmega128a"))] avr_hal_generic::impl_port_traditional_old! { enum Ports { - A: crate::pac::PORTA = [0, 1, 2, 3, 4, 5, 6, 7], - B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7], - C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6, 7], - D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7], - E: crate::pac::PORTE = [0, 1, 2, 3, 4, 5, 6, 7], - F: crate::pac::PORTF = [0, 1, 2, 3, 4, 5, 6, 7], - G: crate::pac::PORTG = [0, 1, 2, 3, 4], + A: crate::pac::PortA = [0, 1, 2, 3, 4, 5, 6, 7], + B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6, 7], + C: crate::pac::PortC = [0, 1, 2, 3, 4, 5, 6, 7], + D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6, 7], + E: crate::pac::PortE = [0, 1, 2, 3, 4, 5, 6, 7], + F: crate::pac::PortF = [0, 1, 2, 3, 4, 5, 6, 7], + G: crate::pac::PortG = [0, 1, 2, 3, 4], } } #[cfg(any(feature = "atmega1280", feature = "atmega2560"))] avr_hal_generic::impl_port_traditional! { enum Ports { - A: crate::pac::PORTA = [0, 1, 2, 3, 4, 5, 6, 7], - B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7], - C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6, 7], - D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7], - E: crate::pac::PORTE = [0, 1, 2, 3, 4, 5, 6, 7], - F: crate::pac::PORTF = [0, 1, 2, 3, 4, 5, 6, 7], - G: crate::pac::PORTG = [0, 1, 2, 3, 4, 5], - H: crate::pac::PORTH = [0, 1, 2, 3, 4, 5, 6, 7], - J: crate::pac::PORTJ = [0, 1, 2, 3, 4, 5, 6, 7], - K: crate::pac::PORTK = [0, 1, 2, 3, 4, 5, 6, 7], - L: crate::pac::PORTL = [0, 1, 2, 3, 4, 5, 6, 7], + A: crate::pac::PortA = [0, 1, 2, 3, 4, 5, 6, 7], + B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6, 7], + C: crate::pac::PortC = [0, 1, 2, 3, 4, 5, 6, 7], + D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6, 7], + E: crate::pac::PortE = [0, 1, 2, 3, 4, 5, 6, 7], + F: crate::pac::PortF = [0, 1, 2, 3, 4, 5, 6, 7], + G: crate::pac::PortG = [0, 1, 2, 3, 4, 5], + H: crate::pac::PortH = [0, 1, 2, 3, 4, 5, 6, 7], + J: crate::pac::PortJ = [0, 1, 2, 3, 4, 5, 6, 7], + K: crate::pac::PortK = [0, 1, 2, 3, 4, 5, 6, 7], + L: crate::pac::PortL = [0, 1, 2, 3, 4, 5, 6, 7], } } #[cfg(any(feature = "atmega1284p", feature = "atmega164pa"))] avr_hal_generic::impl_port_traditional! { enum Ports { - A: crate::pac::PORTA = [0, 1, 2, 3, 4, 5, 6, 7], - B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7], - C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6, 7], - D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7], + A: crate::pac::PortA = [0, 1, 2, 3, 4, 5, 6, 7], + B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6, 7], + C: crate::pac::PortC = [0, 1, 2, 3, 4, 5, 6, 7], + D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6, 7], } } #[cfg(any(feature = "atmega8"))] avr_hal_generic::impl_port_traditional_old! { enum Ports { - B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7], - C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6], - D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7], + B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6, 7], + C: crate::pac::PortC = [0, 1, 2, 3, 4, 5, 6], + D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6, 7], } } diff --git a/mcu/atmega-hal/src/simple_pwm.rs b/mcu/atmega-hal/src/simple_pwm.rs index bdf13e25f1..d7dc862141 100644 --- a/mcu/atmega-hal/src/simple_pwm.rs +++ b/mcu/atmega-hal/src/simple_pwm.rs @@ -24,7 +24,7 @@ avr_hal_generic::impl_simple_pwm! { /// d5.enable(); /// ``` pub struct Timer0Pwm { - timer: crate::pac::TC0, + timer: crate::pac::Tc0, init: |tim, prescaler| { tim.tccr0a().modify(|_r, w| w.wgm0().pwm_fast()); tim.tccr0b().modify(|_r, w| match prescaler { @@ -78,7 +78,7 @@ avr_hal_generic::impl_simple_pwm! { /// d9.enable(); /// ``` pub struct Timer1Pwm { - timer: crate::pac::TC1, + timer: crate::pac::Tc1, init: |tim, prescaler| { tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); tim.tccr1b().modify(|_r, w| { @@ -136,7 +136,7 @@ avr_hal_generic::impl_simple_pwm! { /// d11.enable(); /// ``` pub struct Timer2Pwm { - timer: crate::pac::TC2, + timer: crate::pac::Tc2, init: |tim, prescaler| { tim.tccr2a().modify(|_r, w| w.wgm2().pwm_fast()); tim.tccr2b().modify(|_r, w| match prescaler { @@ -173,7 +173,7 @@ avr_hal_generic::impl_simple_pwm! { avr_hal_generic::impl_simple_pwm! { /// Use `TC3` for PWM (pins `PD0`, `PD2`) pub struct Timer3Pwm { - timer: crate::pac::TC3, + timer: crate::pac::Tc3, init: |tim, prescaler| { tim.tccr3a().modify(|_r, w| w.wgm3().set(0b01)); tim.tccr3b().modify(|_r, w| { @@ -214,7 +214,7 @@ avr_hal_generic::impl_simple_pwm! { avr_hal_generic::impl_simple_pwm! { /// Use `TC4` for PWM (pins `PD1`, `PD2`) pub struct Timer4Pwm { - timer: crate::pac::TC4, + timer: crate::pac::Tc4, init: |tim, prescaler| { tim.tccr4a().modify(|_r, w| w.wgm4().set(0b01)); tim.tccr4b().modify(|_r, w| { @@ -266,7 +266,7 @@ avr_hal_generic::impl_simple_pwm! { /// d13.enable(); /// ``` pub struct Timer0Pwm { - timer: crate::pac::TC0, + timer: crate::pac::Tc0, init: |tim, prescaler| { tim.tccr0a().modify(|_r, w| w.wgm0().pwm_fast()); tim.tccr0b().modify(|_r, w| match prescaler { @@ -315,7 +315,7 @@ avr_hal_generic::impl_simple_pwm! { /// d11.enable(); /// ``` pub struct Timer1Pwm { - timer: crate::pac::TC1, + timer: crate::pac::Tc1, init: |tim, prescaler| { tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); tim.tccr1b().modify(|_r, w| match prescaler { @@ -373,7 +373,7 @@ avr_hal_generic::impl_simple_pwm! { /// ``` pub struct Timer2Pwm { - timer: crate::pac::TC2, + timer: crate::pac::Tc2, init: |tim, prescaler| { tim.tccr2a().modify(|_r, w| w.wgm2().set(0b01)); tim.tccr2b().modify(|_r, w| { @@ -426,7 +426,7 @@ avr_hal_generic::impl_simple_pwm! { /// d5.enable(); /// ``` pub struct Timer3Pwm { - timer: crate::pac::TC3, + timer: crate::pac::Tc3, init: |tim, prescaler| { tim.tccr3a().modify(|_r, w| w.wgm3().set(0b01)); tim.tccr3b().modify(|_r, w| { @@ -489,7 +489,7 @@ avr_hal_generic::impl_simple_pwm! { /// d6.enable(); /// ``` pub struct Timer4Pwm { - timer: crate::pac::TC4, + timer: crate::pac::Tc4, init: |tim, prescaler| { tim.tccr4a().modify(|_r, w| w.wgm4().set(0b01)); tim.tccr4b().modify(|_r, w| { @@ -552,7 +552,7 @@ avr_hal_generic::impl_simple_pwm! { /// d46.enable(); /// ``` pub struct Timer5Pwm { - timer: crate::pac::TC5, + timer: crate::pac::Tc5, init: |tim, prescaler| { tim.tccr5a().modify(|_r, w| w.wgm5().set(0b01)); tim.tccr5b().modify(|_r, w| { @@ -614,7 +614,7 @@ avr_hal_generic::impl_simple_pwm! { /// d11.enable(); /// ``` pub struct Timer0Pwm { - timer: crate::pac::TC0, + timer: crate::pac::Tc0, init: |tim, prescaler| { tim.tccr0a().modify(|_r, w| w.wgm0().pwm_fast()); tim.tccr0b().modify(|_r, w| match prescaler { @@ -663,7 +663,7 @@ avr_hal_generic::impl_simple_pwm! { /// d9.enable(); /// ``` pub struct Timer1Pwm { - timer: crate::pac::TC1, + timer: crate::pac::Tc1, init: |tim, prescaler| { tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); tim.tccr1b().modify(|_r, w| w.wgm1().set(0b01)); @@ -721,7 +721,7 @@ avr_hal_generic::impl_simple_pwm! { /// d5.enable(); /// ``` pub struct Timer3Pwm { - timer: crate::pac::TC3, + timer: crate::pac::Tc3, init: |tim, prescaler| { tim.tccr3a().modify(|_r, w| w.wgm3().set(0b01)); tim.tccr3b().modify(|_r, w| w.wgm3().set(0b01)); @@ -763,7 +763,7 @@ avr_hal_generic::impl_simple_pwm! { /// d6.enable(); /// ``` pub struct Timer4Pwm { - timer: crate::pac::TC4, + timer: crate::pac::Tc4, init: |tim, prescaler| { tim.tccr4a().modify(|_r, w| w.pwm4a().set_bit()); tim.tccr4a().modify(|_r, w| w.pwm4b().set_bit()); @@ -823,7 +823,7 @@ avr_hal_generic::impl_simple_pwm! { /// b4.enable(); /// ``` pub struct Timer0Pwm { - timer: crate::pac::TC0, + timer: crate::pac::Tc0, init: |tim, prescaler| { tim.tccr0a().modify(|_r, w| w.wgm0().pwm_fast()); tim.tccr0b().modify(|_r, w| match prescaler { @@ -871,7 +871,7 @@ avr_hal_generic::impl_simple_pwm! { /// d5.enable(); /// ``` pub struct Timer1Pwm { - timer: crate::pac::TC1, + timer: crate::pac::Tc1, init: |tim, prescaler| { tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); tim.tccr1b().modify(|_r, w| { @@ -923,7 +923,7 @@ avr_hal_generic::impl_simple_pwm! { /// d7.enable(); /// ``` pub struct Timer2Pwm { - timer: crate::pac::TC2, + timer: crate::pac::Tc2, init: |tim, prescaler| { tim.tccr2a().modify(|_r, w| w.wgm2().pwm_fast()); tim.tccr2b().modify(|_r, w| match prescaler { @@ -960,7 +960,7 @@ avr_hal_generic::impl_simple_pwm! { avr_hal_generic::impl_simple_pwm! { /// Use `TC3` for PWM (pins `PB6`, `PB7`) pub struct Timer3Pwm { - timer: crate::pac::TC3, + timer: crate::pac::Tc3, init: |tim, prescaler| { tim.tccr3a().modify(|_r, w| w.wgm3().set(0b01)); tim.tccr3b().modify(|_r, w| { @@ -1012,7 +1012,7 @@ avr_hal_generic::impl_simple_pwm! { /// d9.enable(); /// ``` pub struct Timer1Pwm { - timer: crate::pac::TC1, + timer: crate::pac::Tc1, init: |tim, prescaler| { tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); tim.tccr1b().modify(|_r, w| { @@ -1064,7 +1064,7 @@ avr_hal_generic::impl_simple_pwm! { /// d11.enable(); /// ``` pub struct Timer2Pwm { - timer: crate::pac::TC2, + timer: crate::pac::Tc2, init: |tim, prescaler| { tim.tccr2().modify(|_r, w| w.wgm20().set_bit().wgm21().set_bit()); tim.tccr2().modify(|_r, w| match prescaler { @@ -1102,7 +1102,7 @@ avr_hal_generic::impl_simple_pwm! { /// b3.enable(); /// ``` pub struct Timer0Pwm { - timer: crate::pac::TC0, + timer: crate::pac::Tc0, init: |tim, prescaler| { tim.tccr0a().modify(|_r, w| w.wgm0().set(0b11)); tim.tccr0a().modify(|_r, w| w.com0a().set(0b00)); @@ -1145,7 +1145,7 @@ avr_hal_generic::impl_simple_pwm! { /// d5.enable(); /// ``` pub struct Timer1Pwm { - timer: crate::pac::TC1, + timer: crate::pac::Tc1, init: |tim, prescaler| { tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); tim.tccr1a().modify(|_r, w| w.com1a().set(0b00)); diff --git a/mcu/atmega-hal/src/spi.rs b/mcu/atmega-hal/src/spi.rs index 5338e89fe5..0a72e1d30d 100644 --- a/mcu/atmega-hal/src/spi.rs +++ b/mcu/atmega-hal/src/spi.rs @@ -40,7 +40,7 @@ pub use avr_hal_generic::spi::*; ))] pub type Spi = avr_hal_generic::spi::Spi< crate::Atmega, - crate::pac::SPI, + crate::pac::Spi, port::PB1, port::PB2, port::PB3, @@ -54,7 +54,7 @@ pub type Spi = avr_hal_generic::spi::Spi< ))] avr_hal_generic::impl_spi! { hal: crate::Atmega, - peripheral: crate::pac::SPI, + peripheral: crate::pac::Spi, sclk: port::PB1, mosi: port::PB2, miso: port::PB3, @@ -70,7 +70,7 @@ avr_hal_generic::impl_spi! { ))] pub type Spi = avr_hal_generic::spi::Spi< crate::Atmega, - crate::pac::SPI, + crate::pac::Spi, port::PB5, port::PB3, port::PB4, @@ -85,7 +85,7 @@ pub type Spi = avr_hal_generic::spi::Spi< ))] avr_hal_generic::impl_spi! { hal: crate::Atmega, - peripheral: crate::pac::SPI, + peripheral: crate::pac::Spi, sclk: port::PB5, mosi: port::PB3, miso: port::PB4, @@ -95,7 +95,7 @@ avr_hal_generic::impl_spi! { #[cfg(feature = "atmega328pb")] pub type Spi0 = avr_hal_generic::spi::Spi< crate::Atmega, - crate::pac::SPI0, + crate::pac::Spi0, port::PB5, port::PB3, port::PB4, @@ -104,7 +104,7 @@ pub type Spi0 = avr_hal_generic::spi::Spi< #[cfg(feature = "atmega328pb")] avr_hal_generic::impl_spi! { hal: crate::Atmega, - peripheral: crate::pac::SPI0, + peripheral: crate::pac::Spi0, sclk: port::PB5, mosi: port::PB3, miso: port::PB4, @@ -113,7 +113,7 @@ avr_hal_generic::impl_spi! { #[cfg(feature = "atmega328pb")] pub type Spi1 = avr_hal_generic::spi::Spi< crate::Atmega, - crate::pac::SPI1, + crate::pac::Spi1, port::PC1, port::PE3, port::PC0, @@ -122,7 +122,7 @@ pub type Spi1 = avr_hal_generic::spi::Spi< #[cfg(feature = "atmega328pb")] avr_hal_generic::impl_spi! { hal: crate::Atmega, - peripheral: crate::pac::SPI1, + peripheral: crate::pac::Spi1, sclk: port::PC1, mosi: port::PE3, miso: port::PC0, @@ -132,7 +132,7 @@ avr_hal_generic::impl_spi! { #[cfg(any(feature = "atmega1284p", feature = "atmega32a"))] pub type Spi = avr_hal_generic::spi::Spi< crate::Atmega, - crate::pac::SPI, + crate::pac::Spi, port::PB7, port::PB5, port::PB6, @@ -141,7 +141,7 @@ pub type Spi = avr_hal_generic::spi::Spi< #[cfg(any(feature = "atmega1284p", feature = "atmega32a"))] avr_hal_generic::impl_spi! { hal: crate::Atmega, - peripheral: crate::pac::SPI, + peripheral: crate::pac::Spi, sclk: port::PB7, mosi: port::PB5, miso: port::PB6, diff --git a/mcu/atmega-hal/src/usart.rs b/mcu/atmega-hal/src/usart.rs index c4525f427c..eb520c2f54 100644 --- a/mcu/atmega-hal/src/usart.rs +++ b/mcu/atmega-hal/src/usart.rs @@ -42,7 +42,7 @@ pub type UsartReader = #[cfg(any(feature = "atmega16"))] pub type Usart0 = Usart< - crate::pac::USART, + crate::pac::Usart, port::Pin, port::Pin, CLOCK, @@ -56,7 +56,7 @@ pub type Usart0 = Usart< feature = "atmega164pa" ))] pub type Usart0 = Usart< - crate::pac::USART0, + crate::pac::Usart0, port::Pin, port::Pin, CLOCK, @@ -71,7 +71,7 @@ pub type Usart0 = Usart< ))] avr_hal_generic::impl_usart_traditional! { hal: crate::Atmega, - peripheral: crate::pac::USART0, + peripheral: crate::pac::Usart0, register_suffix: 0, rx: port::PD0, tx: port::PD1, @@ -79,7 +79,7 @@ avr_hal_generic::impl_usart_traditional! { #[cfg(feature = "atmega328pb")] pub type Usart1 = Usart< - crate::pac::USART1, + crate::pac::Usart1, port::Pin, port::Pin, CLOCK, @@ -87,7 +87,7 @@ pub type Usart1 = Usart< #[cfg(feature = "atmega328pb")] avr_hal_generic::impl_usart_traditional! { hal: crate::Atmega, - peripheral: crate::pac::USART1, + peripheral: crate::pac::Usart1, register_suffix: 1, rx: port::PB4, tx: port::PB3, @@ -102,7 +102,7 @@ avr_hal_generic::impl_usart_traditional! { feature = "atmega164pa" ))] pub type Usart1 = Usart< - crate::pac::USART1, + crate::pac::Usart1, port::Pin, port::Pin, CLOCK, @@ -116,7 +116,7 @@ pub type Usart1 = Usart< ))] avr_hal_generic::impl_usart_traditional! { hal: crate::Atmega, - peripheral: crate::pac::USART1, + peripheral: crate::pac::Usart1, register_suffix: 1, rx: port::PD2, tx: port::PD3, @@ -124,7 +124,7 @@ avr_hal_generic::impl_usart_traditional! { #[cfg(any(feature = "atmega128a", feature = "atmega1280", feature = "atmega2560"))] pub type Usart0 = Usart< - crate::pac::USART0, + crate::pac::Usart0, port::Pin, port::Pin, CLOCK, @@ -132,7 +132,7 @@ pub type Usart0 = Usart< #[cfg(any(feature = "atmega1280", feature = "atmega2560"))] avr_hal_generic::impl_usart_traditional! { hal: crate::Atmega, - peripheral: crate::pac::USART0, + peripheral: crate::pac::Usart0, register_suffix: 0, rx: port::PE0, tx: port::PE1, @@ -140,7 +140,7 @@ avr_hal_generic::impl_usart_traditional! { #[cfg(any(feature = "atmega1280", feature = "atmega2560"))] pub type Usart2 = Usart< - crate::pac::USART2, + crate::pac::Usart2, port::Pin, port::Pin, CLOCK, @@ -148,7 +148,7 @@ pub type Usart2 = Usart< #[cfg(any(feature = "atmega1280", feature = "atmega2560"))] avr_hal_generic::impl_usart_traditional! { hal: crate::Atmega, - peripheral: crate::pac::USART2, + peripheral: crate::pac::Usart2, register_suffix: 2, rx: port::PH0, tx: port::PH1, @@ -156,7 +156,7 @@ avr_hal_generic::impl_usart_traditional! { #[cfg(any(feature = "atmega1280", feature = "atmega2560"))] pub type Usart3 = Usart< - crate::pac::USART3, + crate::pac::Usart3, port::Pin, port::Pin, CLOCK, @@ -164,7 +164,7 @@ pub type Usart3 = Usart< #[cfg(any(feature = "atmega1280", feature = "atmega2560"))] avr_hal_generic::impl_usart_traditional! { hal: crate::Atmega, - peripheral: crate::pac::USART3, + peripheral: crate::pac::Usart3, register_suffix: 3, rx: port::PJ0, tx: port::PJ1, @@ -172,7 +172,7 @@ avr_hal_generic::impl_usart_traditional! { #[cfg(any(feature = "atmega8", feature = "atmega32a"))] pub type Usart0 = Usart< - crate::pac::USART, + crate::pac::Usart, port::Pin, port::Pin, CLOCK, @@ -191,7 +191,7 @@ impl crate::Atmega, crate::port::Pin, crate::port::Pin, - > for crate::pac::USART + > for crate::pac::Usart { fn raw_init(&mut self, baudrate: crate::usart::Baudrate) { // msb of ubrrh has to be 0 to set ubrrh register. (see atmega8 datasheet) @@ -272,7 +272,7 @@ impl crate::Atmega, crate::port::Pin, crate::port::Pin, - > for crate::pac::USART1 + > for crate::pac::Usart1 { fn raw_init(&mut self, baudrate: crate::usart::Baudrate) { let ubrr1h: u8 = (baudrate.ubrr >> 8) as u8; @@ -352,7 +352,7 @@ impl crate::Atmega, crate::port::Pin, crate::port::Pin, - > for crate::pac::USART0 + > for crate::pac::Usart0 { fn raw_init(&mut self, baudrate: crate::usart::Baudrate) { let ubrr0h: u8 = (baudrate.ubrr >> 8) as u8; diff --git a/mcu/atmega-hal/src/wdt.rs b/mcu/atmega-hal/src/wdt.rs index 36b19725d6..3922ff28d1 100644 --- a/mcu/atmega-hal/src/wdt.rs +++ b/mcu/atmega-hal/src/wdt.rs @@ -1,13 +1,13 @@ #[allow(unused_imports)] pub use avr_hal_generic::wdt::{Timeout, WdtOps}; -pub type Wdt = avr_hal_generic::wdt::Wdt; +pub type Wdt = avr_hal_generic::wdt::Wdt; #[cfg(not(any(feature = "atmega8", feature = "atmega16", feature = "atmega32a", feature = "atmega128a")))] avr_hal_generic::impl_wdt! { hal: crate::Atmega, - peripheral: crate::pac::WDT, - mcusr: crate::pac::cpu::MCUSR, + peripheral: crate::pac::Wdt, + mcusr: crate::pac::cpu::Mcusr, wdtcsr_name: wdtcsr, timeout: |to, w| match to { Timeout::Ms16 => w.wdpl().cycles_2k_512k(), @@ -26,7 +26,7 @@ avr_hal_generic::impl_wdt! { #[cfg(any(feature = "atmega8", feature = "atmega32a", feature = "atmega128a"))] avr_hal_generic::impl_wdt! { hal: crate::Atmega, - peripheral: crate::pac::WDT, + peripheral: crate::pac::Wdt, mcusr: crate::pac::cpu::MCUCSR, wdtcsr_name: wdtcr, timeout: |to, w| match to { From 7babd81f73d5048e025911262149daad39ad7604 Mon Sep 17 00:00:00 2001 From: Rahix Date: Wed, 30 Apr 2025 23:08:05 +0200 Subject: [PATCH 07/11] Revert "[WIP] treewide: Use CamelCase peripheral names everywhere" This reverts commit ef69e1b1ddc6aafcbfda61372d9946a019d4cedc. --- arduino-hal/src/lib.rs | 10 +- .../src/bin/uno-16chan-servo-driver.rs | 2 +- examples/arduino-uno/src/bin/uno-adc.rs | 2 +- examples/arduino-uno/src/bin/uno-eeprom.rs | 2 +- .../arduino-uno/src/bin/uno-ext-interrupt.rs | 4 +- examples/arduino-uno/src/bin/uno-hc-sr04.rs | 2 +- examples/arduino-uno/src/bin/uno-i2cdetect.rs | 2 +- examples/arduino-uno/src/bin/uno-infrared.rs | 12 +- .../arduino-uno/src/bin/uno-manual-servo.rs | 2 +- examples/arduino-uno/src/bin/uno-millis.rs | 4 +- .../src/bin/uno-pin-change-interrupt.rs | 4 +- .../src/bin/uno-simple-pwm-embedded-hal.rs | 2 +- .../arduino-uno/src/bin/uno-simple-pwm.rs | 2 +- .../arduino-uno/src/bin/uno-spi-feedback.rs | 2 +- examples/arduino-uno/src/bin/uno-timer.rs | 22 +-- examples/arduino-uno/src/bin/uno-watchdog.rs | 2 +- mcu/atmega-hal/src/adc.rs | 156 +++++++++--------- mcu/atmega-hal/src/eeprom.rs | 18 +- mcu/atmega-hal/src/i2c.rs | 24 +-- mcu/atmega-hal/src/lib.rs | 18 +- mcu/atmega-hal/src/port.rs | 82 ++++----- mcu/atmega-hal/src/simple_pwm.rs | 46 +++--- mcu/atmega-hal/src/spi.rs | 20 +-- mcu/atmega-hal/src/usart.rs | 34 ++-- mcu/atmega-hal/src/wdt.rs | 8 +- 25 files changed, 241 insertions(+), 241 deletions(-) diff --git a/arduino-hal/src/lib.rs b/arduino-hal/src/lib.rs index b576df1fcb..eb513bb354 100644 --- a/arduino-hal/src/lib.rs +++ b/arduino-hal/src/lib.rs @@ -243,7 +243,7 @@ macro_rules! pins { macro_rules! default_serial { ($p:expr, $pins:expr, $baud:expr) => { $crate::Usart::new( - $p.usart1, + $p.USART1, $pins.d0, $pins.d1.into_output(), $crate::hal::usart::BaudrateExt::into_baudrate($baud), @@ -264,7 +264,7 @@ macro_rules! default_serial { macro_rules! default_serial { ($p:expr, $pins:expr, $baud:expr) => { $crate::Usart::new( - $p.usart1, + $p.USART1, $pins.rx, $pins.tx.into_output(), $crate::hal::usart::BaudrateExt::into_baudrate($baud), @@ -287,7 +287,7 @@ macro_rules! default_serial { /// let dp = arduino_hal::Peripherals::take().unwrap(); /// let pins = arduino_hal::pins!(dp); /// let serial = arduino_hal::Usart::new( -/// dp.usart1, +/// dp.USART1, /// pins.d0, /// pins.d1.into_output(), /// // See src/usart.rs for why some boards use the BaudrateArduinoExt trait @@ -305,7 +305,7 @@ macro_rules! default_serial { macro_rules! default_serial { ($p:expr, $pins:expr, $baud:expr) => { $crate::Usart::new( - $p.usart0, + $p.USART0, $pins.d0, $pins.d1.into_output(), // See comment in avr-hal-generic/src/usart.rs for why these boards use the @@ -333,7 +333,7 @@ macro_rules! default_serial { macro_rules! default_serial { ($p:expr, $pins:expr, $baud:expr) => { $crate::Usart::new( - $p.usart0, + $p.USART0, $pins.d0, $pins.d1.into_output(), $crate::hal::usart::BaudrateExt::into_baudrate($baud), diff --git a/examples/arduino-uno/src/bin/uno-16chan-servo-driver.rs b/examples/arduino-uno/src/bin/uno-16chan-servo-driver.rs index 36bf0bafdd..b30ebc7c73 100644 --- a/examples/arduino-uno/src/bin/uno-16chan-servo-driver.rs +++ b/examples/arduino-uno/src/bin/uno-16chan-servo-driver.rs @@ -28,7 +28,7 @@ fn main() -> ! { let mut led = pins.d13.into_output(); let i2c = arduino_hal::I2c::new( - dp.twi, + dp.TWI, pins.a4.into_pull_up_input(), pins.a5.into_pull_up_input(), 100_000, diff --git a/examples/arduino-uno/src/bin/uno-adc.rs b/examples/arduino-uno/src/bin/uno-adc.rs index 0e1ca7d902..57ad302314 100644 --- a/examples/arduino-uno/src/bin/uno-adc.rs +++ b/examples/arduino-uno/src/bin/uno-adc.rs @@ -23,7 +23,7 @@ fn main() -> ! { let pins = arduino_hal::pins!(dp); let mut serial = arduino_hal::default_serial!(dp, pins, 57600); - let mut adc = arduino_hal::Adc::new(dp.adc, Default::default()); + let mut adc = arduino_hal::Adc::new(dp.ADC, Default::default()); let (vbg, gnd, tmp) = ( adc.read_blocking(&adc::channel::Vbg), diff --git a/examples/arduino-uno/src/bin/uno-eeprom.rs b/examples/arduino-uno/src/bin/uno-eeprom.rs index 635574696c..5f0e04960f 100644 --- a/examples/arduino-uno/src/bin/uno-eeprom.rs +++ b/examples/arduino-uno/src/bin/uno-eeprom.rs @@ -13,7 +13,7 @@ fn main() -> ! { let pins = arduino_hal::pins!(dp); let mut serial = arduino_hal::default_serial!(dp, pins, 57600); - let mut ep = arduino_hal::Eeprom::new(dp.eeprom); + let mut ep = arduino_hal::Eeprom::new(dp.EEPROM); let ep_capacity = ep.capacity(); ufmt::uwriteln!(&mut serial, "eeprom capacity is:{}\r", ep_capacity).unwrap_infallible(); diff --git a/examples/arduino-uno/src/bin/uno-ext-interrupt.rs b/examples/arduino-uno/src/bin/uno-ext-interrupt.rs index 6c45593a47..425c033556 100644 --- a/examples/arduino-uno/src/bin/uno-ext-interrupt.rs +++ b/examples/arduino-uno/src/bin/uno-ext-interrupt.rs @@ -47,9 +47,9 @@ fn main() -> ! { // thanks to tsemczyszyn and Rahix: https://github.com/Rahix/avr-hal/issues/240 // Configure INT0 for falling edge. 0x03 would be rising edge. - dp.exint.eicra().modify(|_, w| w.isc0().set(0x02)); + dp.EXINT.eicra().modify(|_, w| w.isc0().set(0x02)); // Enable the INT0 interrupt source. - dp.exint.eimsk().modify(|_, w| w.int0().set_bit()); + dp.EXINT.eimsk().modify(|_, w| w.int0().set_bit()); let mut leds: [Pin; 4] = [ pins.d3.into_output().downgrade(), diff --git a/examples/arduino-uno/src/bin/uno-hc-sr04.rs b/examples/arduino-uno/src/bin/uno-hc-sr04.rs index f88fed2d22..6e08fdaa33 100644 --- a/examples/arduino-uno/src/bin/uno-hc-sr04.rs +++ b/examples/arduino-uno/src/bin/uno-hc-sr04.rs @@ -29,7 +29,7 @@ fn main() -> ! { // it gives one clock count every 4 µs. // since the clock register size is 16 bits, the timer is full every // 1/(16e6/64)*2^16 ≈ 260 ms - let timer1 = dp.tc1; + let timer1 = dp.TC1; timer1.tccr1b().write(|w| w.cs1().prescale_64()); 'outer: loop { diff --git a/examples/arduino-uno/src/bin/uno-i2cdetect.rs b/examples/arduino-uno/src/bin/uno-i2cdetect.rs index ab40e942e8..54d7f37301 100644 --- a/examples/arduino-uno/src/bin/uno-i2cdetect.rs +++ b/examples/arduino-uno/src/bin/uno-i2cdetect.rs @@ -27,7 +27,7 @@ fn main() -> ! { let mut serial = arduino_hal::default_serial!(dp, pins, 57600); let mut i2c = arduino_hal::I2c::new( - dp.twi, + dp.TWI, pins.a4.into_pull_up_input(), pins.a5.into_pull_up_input(), 50000, diff --git a/examples/arduino-uno/src/bin/uno-infrared.rs b/examples/arduino-uno/src/bin/uno-infrared.rs index 9aad51f45b..0c1ba59318 100644 --- a/examples/arduino-uno/src/bin/uno-infrared.rs +++ b/examples/arduino-uno/src/bin/uno-infrared.rs @@ -24,7 +24,7 @@ use panic_halt as _; use arduino_hal::{ hal::port::{PD2, PD6, PD7}, - pac::tc0::tccr0b::Cs0, + pac::tc0::tccr0b::CS0_A, port::mode::{Floating, Input, Output}, port::Pin, prelude::*, @@ -51,7 +51,7 @@ fn main() -> ! { let mut serial = arduino_hal::default_serial!(dp, pins, 57600); // Monotonic clock to keep track of the time - CLOCK.start(dp.tc0); + CLOCK.start(dp.TC0); let mut uno_led = pins.d13.into_output(); let mut irdroino_led1 = pins.d7.into_output(); @@ -62,10 +62,10 @@ fn main() -> ! { irdroino_led2.set_low(); // Enable group 2 (PORTD) - dp.exint.pcicr().write(|w| unsafe { w.bits(0b100) }); + dp.EXINT.pcicr().write(|w| unsafe { w.bits(0b100) }); // Enable pin change interrupts on PCINT18 which is pin PD2 (= d2) - dp.exint.pcmsk2().write(|w| w.set(0b100)); + dp.EXINT.pcmsk2().write(|w| w.set(0b100)); let ir = Receiver::with_pin(Clock::FREQ, pins.d2); @@ -130,7 +130,7 @@ struct Clock { impl Clock { const FREQ: u32 = 20_000; - const PRESCALER: Cs0 = Cs0::Prescale8; + const PRESCALER: CS0_A = CS0_A::PRESCALE_8; const TOP: u8 = 99; pub const fn new() -> Clock { @@ -139,7 +139,7 @@ impl Clock { } } - pub fn start(&self, tc0: arduino_hal::pac::Tc0) { + pub fn start(&self, tc0: arduino_hal::pac::TC0) { // Configure the timer for the above interval (in CTC mode) tc0.tccr0a().write(|w| w.wgm0().ctc()); tc0.ocr0a().write(|w| w.set(Self::TOP)); diff --git a/examples/arduino-uno/src/bin/uno-manual-servo.rs b/examples/arduino-uno/src/bin/uno-manual-servo.rs index c9678dca82..ee67fa8357 100644 --- a/examples/arduino-uno/src/bin/uno-manual-servo.rs +++ b/examples/arduino-uno/src/bin/uno-manual-servo.rs @@ -29,7 +29,7 @@ fn main() -> ! { // - TC1 runs off a 250kHz clock, with 5000 counts per overflow => 50 Hz signal. // - Each count increases the duty-cycle by 4us. // - Use OC1A which is connected to D9 of the Arduino Uno. - let tc1 = dp.tc1; + let tc1 = dp.TC1; tc1.icr1().write(|w| w.set(4999)); tc1.tccr1a() .write(|w| w.wgm1().set(0b10).com1a().match_clear()); diff --git a/examples/arduino-uno/src/bin/uno-millis.rs b/examples/arduino-uno/src/bin/uno-millis.rs index cf5de13050..e9c22eee62 100644 --- a/examples/arduino-uno/src/bin/uno-millis.rs +++ b/examples/arduino-uno/src/bin/uno-millis.rs @@ -35,7 +35,7 @@ const MILLIS_INCREMENT: u32 = PRESCALER * TIMER_COUNTS / 16000; static MILLIS_COUNTER: avr_device::interrupt::Mutex> = avr_device::interrupt::Mutex::new(cell::Cell::new(0)); -fn millis_init(tc0: arduino_hal::pac::Tc0) { +fn millis_init(tc0: arduino_hal::pac::TC0) { // Configure the timer for the above interval (in CTC mode) // and enable its interrupt. tc0.tccr0a().write(|w| w.wgm0().ctc()); @@ -76,7 +76,7 @@ fn main() -> ! { let pins = arduino_hal::pins!(dp); let mut serial = arduino_hal::default_serial!(dp, pins, 57600); - millis_init(dp.tc0); + millis_init(dp.TC0); // Enable interrupts globally unsafe { avr_device::interrupt::enable() }; diff --git a/examples/arduino-uno/src/bin/uno-pin-change-interrupt.rs b/examples/arduino-uno/src/bin/uno-pin-change-interrupt.rs index 8dedebd9d3..42a71d3750 100644 --- a/examples/arduino-uno/src/bin/uno-pin-change-interrupt.rs +++ b/examples/arduino-uno/src/bin/uno-pin-change-interrupt.rs @@ -49,10 +49,10 @@ fn main() -> ! { ]; // Enable the PCINT2 pin change interrupt - dp.exint.pcicr().write(|w| unsafe { w.bits(0b100) }); + dp.EXINT.pcicr().write(|w| unsafe { w.bits(0b100) }); // Enable pin change interrupts on PCINT18 which is pin PD2 (= d2) - dp.exint.pcmsk2().write(|w| w.set(0b100)); + dp.EXINT.pcmsk2().write(|w| w.set(0b100)); //From this point on an interrupt can happen unsafe { avr_device::interrupt::enable() }; diff --git a/examples/arduino-uno/src/bin/uno-simple-pwm-embedded-hal.rs b/examples/arduino-uno/src/bin/uno-simple-pwm-embedded-hal.rs index 040b6bab2f..e0e0e2a786 100644 --- a/examples/arduino-uno/src/bin/uno-simple-pwm-embedded-hal.rs +++ b/examples/arduino-uno/src/bin/uno-simple-pwm-embedded-hal.rs @@ -24,7 +24,7 @@ fn main() -> ! { let dp = arduino_hal::Peripherals::take().unwrap(); let pins = arduino_hal::pins!(dp); - let timer0 = Timer0Pwm::new(dp.tc0, Prescaler::Prescale64); + let timer0 = Timer0Pwm::new(dp.TC0, Prescaler::Prescale64); // Digital pin 5 is connected to a LED and a resistor in series let mut pwm_led = pins.d5.into_output().into_pwm(&timer0); diff --git a/examples/arduino-uno/src/bin/uno-simple-pwm.rs b/examples/arduino-uno/src/bin/uno-simple-pwm.rs index 4b9bd4b11b..c7f39f7e59 100644 --- a/examples/arduino-uno/src/bin/uno-simple-pwm.rs +++ b/examples/arduino-uno/src/bin/uno-simple-pwm.rs @@ -12,7 +12,7 @@ fn main() -> ! { let dp = arduino_hal::Peripherals::take().unwrap(); let pins = arduino_hal::pins!(dp); - let timer0 = Timer0Pwm::new(dp.tc0, Prescaler::Prescale64); + let timer0 = Timer0Pwm::new(dp.TC0, Prescaler::Prescale64); // Digital pin 5 is connected to a LED and a resistor in series let mut pwm_led = pins.d5.into_output().into_pwm(&timer0); diff --git a/examples/arduino-uno/src/bin/uno-spi-feedback.rs b/examples/arduino-uno/src/bin/uno-spi-feedback.rs index 5de9885ed9..7ca86d907a 100644 --- a/examples/arduino-uno/src/bin/uno-spi-feedback.rs +++ b/examples/arduino-uno/src/bin/uno-spi-feedback.rs @@ -28,7 +28,7 @@ fn main() -> ! { // Create SPI interface. let (mut spi, _) = arduino_hal::Spi::new( - dp.spi, + dp.SPI, pins.d13.into_output(), pins.d11.into_output(), pins.d12.into_pull_up_input(), diff --git a/examples/arduino-uno/src/bin/uno-timer.rs b/examples/arduino-uno/src/bin/uno-timer.rs index a78c7c05d9..83b163d8f6 100644 --- a/examples/arduino-uno/src/bin/uno-timer.rs +++ b/examples/arduino-uno/src/bin/uno-timer.rs @@ -12,8 +12,8 @@ and then modernized to account for API drift since 2020 use arduino_hal::port::mode::Output; use arduino_hal::port::Pin; use arduino_hal::prelude::*; -use avr_device::atmega328p::tc1::tccr1b::Cs1; -use avr_device::atmega328p::Tc1; +use avr_device::atmega328p::tc1::tccr1b::CS1_A; +use avr_device::atmega328p::TC1; use core::mem; use panic_halt as _; use ufmt::{uWrite, uwriteln}; @@ -46,7 +46,7 @@ fn main() -> ! { // - let tmr1: Tc1 = dp.tc1; + let tmr1: TC1 = dp.TC1; rig_timer(&tmr1, &mut serial); @@ -77,7 +77,7 @@ pub const fn calc_overflow(clock_hz: u32, target_hz: u32, prescale: u32) -> u32 clock_hz / target_hz / prescale - 1 } -pub fn rig_timer>(tmr1: &Tc1, serial: &mut W) { +pub fn rig_timer>(tmr1: &TC1, serial: &mut W) { /* https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-7810-Automotive-Microcontrollers-ATmega328P_Datasheet.pdf section 15.11 @@ -85,14 +85,14 @@ pub fn rig_timer>(tmr1: &Tc1, ser use arduino_hal::clock::Clock; const ARDUINO_UNO_CLOCK_FREQUENCY_HZ: u32 = arduino_hal::DefaultClock::FREQ; - const CLOCK_SOURCE: Cs1 = Cs1::Prescale256; + const CLOCK_SOURCE: CS1_A = CS1_A::PRESCALE_256; let clock_divisor: u32 = match CLOCK_SOURCE { - Cs1::Direct => 1, - Cs1::Prescale8 => 8, - Cs1::Prescale64 => 64, - Cs1::Prescale256 => 256, - Cs1::Prescale1024 => 1024, - Cs1::NoClock | Cs1::ExtFalling | Cs1::ExtRising => { + CS1_A::DIRECT => 1, + CS1_A::PRESCALE_8 => 8, + CS1_A::PRESCALE_64 => 64, + CS1_A::PRESCALE_256 => 256, + CS1_A::PRESCALE_1024 => 1024, + CS1_A::NO_CLOCK | CS1_A::EXT_FALLING | CS1_A::EXT_RISING => { uwriteln!(serial, "uhoh, code tried to set the clock source to something other than a static prescaler {}", CLOCK_SOURCE as usize) .unwrap_infallible(); 1 diff --git a/examples/arduino-uno/src/bin/uno-watchdog.rs b/examples/arduino-uno/src/bin/uno-watchdog.rs index 40eadd4439..1801b127ce 100644 --- a/examples/arduino-uno/src/bin/uno-watchdog.rs +++ b/examples/arduino-uno/src/bin/uno-watchdog.rs @@ -24,7 +24,7 @@ fn main() -> ! { arduino_hal::delay_ms(100); } - let mut watchdog = wdt::Wdt::new(dp.wdt, &dp.cpu.mcusr()); + let mut watchdog = wdt::Wdt::new(dp.WDT, &dp.CPU.mcusr()); watchdog.start(wdt::Timeout::Ms2000).unwrap(); loop { diff --git a/mcu/atmega-hal/src/adc.rs b/mcu/atmega-hal/src/adc.rs index 91584b5acc..6dd225a751 100644 --- a/mcu/atmega-hal/src/adc.rs +++ b/mcu/atmega-hal/src/adc.rs @@ -55,7 +55,7 @@ pub struct AdcSettings { pub ref_voltage: ReferenceVoltage, } -fn apply_settings(peripheral: &crate::pac::Adc, settings: AdcSettings) { +fn apply_settings(peripheral: &crate::pac::ADC, settings: AdcSettings) { peripheral.adcsra().write(|w| { w.aden().set_bit(); match settings.clock_divider { @@ -76,10 +76,10 @@ fn apply_settings(peripheral: &crate::pac::Adc, settings: AdcSettings) { } /// Check the [`avr_hal_generic::adc::Adc`] documentation. -pub type Adc = avr_hal_generic::adc::Adc; +pub type Adc = avr_hal_generic::adc::Adc; /// Check the [`avr_hal_generic::adc::Channel`] documentation. -pub type Channel = avr_hal_generic::adc::Channel; +pub type Channel = avr_hal_generic::adc::Channel; /// Additional channels /// @@ -178,63 +178,63 @@ pub mod channel { ))] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::Adc, + peripheral: crate::pac::ADC, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, - channel_id: crate::pac::adc::admux::Mux, + channel_id: crate::pac::adc::admux::MUX_A, set_channel: |peripheral, id| { peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { - port::PC0: (crate::pac::adc::admux::Mux::Adc0, didr0::adc0d), - port::PC1: (crate::pac::adc::admux::Mux::Adc1, didr0::adc1d), - port::PC2: (crate::pac::adc::admux::Mux::Adc2, didr0::adc2d), - port::PC3: (crate::pac::adc::admux::Mux::Adc3, didr0::adc3d), - port::PC4: (crate::pac::adc::admux::Mux::Adc4, didr0::adc4d), - port::PC5: (crate::pac::adc::admux::Mux::Adc5, didr0::adc5d), + port::PC0: (crate::pac::adc::admux::MUX_A::ADC0, didr0::adc0d), + port::PC1: (crate::pac::adc::admux::MUX_A::ADC1, didr0::adc1d), + port::PC2: (crate::pac::adc::admux::MUX_A::ADC2, didr0::adc2d), + port::PC3: (crate::pac::adc::admux::MUX_A::ADC3, didr0::adc3d), + port::PC4: (crate::pac::adc::admux::MUX_A::ADC4, didr0::adc4d), + port::PC5: (crate::pac::adc::admux::MUX_A::ADC5, didr0::adc5d), }, channels: { #[cfg(feature = "enable-extra-adc")] - channel::ADC6: crate::pac::adc::admux::Mux::Adc6, + channel::ADC6: crate::pac::adc::admux::MUX_A::ADC6, #[cfg(feature = "enable-extra-adc")] - channel::ADC7: crate::pac::adc::admux::Mux::Adc7, - channel::Vbg: crate::pac::adc::admux::Mux::AdcVbg, - channel::Gnd: crate::pac::adc::admux::Mux::AdcGnd, + channel::ADC7: crate::pac::adc::admux::MUX_A::ADC7, + channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG, + channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND, #[cfg(any(feature = "atmega328p", feature = "atmega328pb", feature = "atmega48p"))] - channel::Temperature: crate::pac::adc::admux::Mux::Tempsens, + channel::Temperature: crate::pac::adc::admux::MUX_A::TEMPSENS, }, } #[cfg(any(feature = "atmega16", feature = "atmega32a"))] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::Adc, + peripheral: crate::pac::ADC, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, - channel_id: crate::pac::adc::admux::Mux, + channel_id: crate::pac::adc::admux::MUX_A, set_channel: |peripheral, id| { peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { - port::PA0: (crate::pac::adc::admux::Mux::Adc0), - port::PA1: (crate::pac::adc::admux::Mux::Adc1), - port::PA2: (crate::pac::adc::admux::Mux::Adc2), - port::PA3: (crate::pac::adc::admux::Mux::Adc3), - port::PA4: (crate::pac::adc::admux::Mux::Adc4), - port::PA5: (crate::pac::adc::admux::Mux::Adc5), - port::PA6: (crate::pac::adc::admux::Mux::Adc6), - port::PA7: (crate::pac::adc::admux::Mux::Adc7), + port::PA0: (crate::pac::adc::admux::MUX_A::ADC0), + port::PA1: (crate::pac::adc::admux::MUX_A::ADC1), + port::PA2: (crate::pac::adc::admux::MUX_A::ADC2), + port::PA3: (crate::pac::adc::admux::MUX_A::ADC3), + port::PA4: (crate::pac::adc::admux::MUX_A::ADC4), + port::PA5: (crate::pac::adc::admux::MUX_A::ADC5), + port::PA6: (crate::pac::adc::admux::MUX_A::ADC6), + port::PA7: (crate::pac::adc::admux::MUX_A::ADC7), }, channels: { - channel::Vbg: crate::pac::adc::admux::Mux::AdcVbg, - channel::Gnd: crate::pac::adc::admux::Mux::AdcGnd, + channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG, + channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND, }, } #[cfg(feature = "atmega32u4")] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::Adc, + peripheral: crate::pac::ADC, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, channel_id: u8, @@ -266,33 +266,33 @@ avr_hal_generic::impl_adc! { #[cfg(feature = "atmega128a")] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::Adc, + peripheral: crate::pac::ADC, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, - channel_id: crate::pac::adc::admux::Mux, + channel_id: crate::pac::adc::admux::MUX_A, set_channel: |peripheral, id| { peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { - port::PF0: (crate::pac::adc::admux::Mux::Adc0), - port::PF1: (crate::pac::adc::admux::Mux::Adc1), - port::PF2: (crate::pac::adc::admux::Mux::Adc2), - port::PF3: (crate::pac::adc::admux::Mux::Adc3), - port::PF4: (crate::pac::adc::admux::Mux::Adc4), - port::PF5: (crate::pac::adc::admux::Mux::Adc5), - port::PF6: (crate::pac::adc::admux::Mux::Adc6), - port::PF7: (crate::pac::adc::admux::Mux::Adc7), + port::PF0: (crate::pac::adc::admux::MUX_A::ADC0), + port::PF1: (crate::pac::adc::admux::MUX_A::ADC1), + port::PF2: (crate::pac::adc::admux::MUX_A::ADC2), + port::PF3: (crate::pac::adc::admux::MUX_A::ADC3), + port::PF4: (crate::pac::adc::admux::MUX_A::ADC4), + port::PF5: (crate::pac::adc::admux::MUX_A::ADC5), + port::PF6: (crate::pac::adc::admux::MUX_A::ADC6), + port::PF7: (crate::pac::adc::admux::MUX_A::ADC7), }, channels: { - channel::Vbg: crate::pac::adc::admux::Mux::AdcVbg, - channel::Gnd: crate::pac::adc::admux::Mux::AdcGnd, + channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG, + channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND, }, } #[cfg(any(feature = "atmega2560", feature = "atmega1280"))] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::Adc, + peripheral: crate::pac::ADC, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, channel_id: u8, @@ -327,81 +327,81 @@ avr_hal_generic::impl_adc! { #[cfg(any(feature = "atmega1284p"))] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::Adc, + peripheral: crate::pac::ADC, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, - channel_id: crate::pac::adc::admux::Mux, + channel_id: crate::pac::adc::admux::MUX_A, set_channel: |peripheral, id| { peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { - port::PA0: (crate::pac::adc::admux::Mux::Adc0, didr0::adc0d), - port::PA1: (crate::pac::adc::admux::Mux::Adc1, didr0::adc1d), - port::PA2: (crate::pac::adc::admux::Mux::Adc2, didr0::adc2d), - port::PA3: (crate::pac::adc::admux::Mux::Adc3, didr0::adc3d), - port::PA4: (crate::pac::adc::admux::Mux::Adc4, didr0::adc4d), - port::PA5: (crate::pac::adc::admux::Mux::Adc5, didr0::adc5d), + port::PA0: (crate::pac::adc::admux::MUX_A::ADC0, didr0::adc0d), + port::PA1: (crate::pac::adc::admux::MUX_A::ADC1, didr0::adc1d), + port::PA2: (crate::pac::adc::admux::MUX_A::ADC2, didr0::adc2d), + port::PA3: (crate::pac::adc::admux::MUX_A::ADC3, didr0::adc3d), + port::PA4: (crate::pac::adc::admux::MUX_A::ADC4, didr0::adc4d), + port::PA5: (crate::pac::adc::admux::MUX_A::ADC5, didr0::adc5d), }, channels: { #[cfg(feature = "enable-extra-adc")] - channel::ADC6: crate::pac::adc::admux::Mux::Adc6, + channel::ADC6: crate::pac::adc::admux::MUX_A::ADC6, #[cfg(feature = "enable-extra-adc")] - channel::ADC7: crate::pac::adc::admux::Mux::Adc7, - channel::Vbg: crate::pac::adc::admux::Mux::AdcVbg, - channel::Gnd: crate::pac::adc::admux::Mux::AdcGnd, + channel::ADC7: crate::pac::adc::admux::MUX_A::ADC7, + channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG, + channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND, }, } #[cfg(any(feature = "atmega8"))] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::Adc, + peripheral: crate::pac::ADC, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, - channel_id: crate::pac::adc::admux::Mux, + channel_id: crate::pac::adc::admux::MUX_A, set_channel: |peripheral, id| { peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { - port::PC0: (crate::pac::adc::admux::Mux::Adc0), - port::PC1: (crate::pac::adc::admux::Mux::Adc1), - port::PC2: (crate::pac::adc::admux::Mux::Adc2), - port::PC3: (crate::pac::adc::admux::Mux::Adc3), - port::PC4: (crate::pac::adc::admux::Mux::Adc4), - port::PC5: (crate::pac::adc::admux::Mux::Adc5), + port::PC0: (crate::pac::adc::admux::MUX_A::ADC0), + port::PC1: (crate::pac::adc::admux::MUX_A::ADC1), + port::PC2: (crate::pac::adc::admux::MUX_A::ADC2), + port::PC3: (crate::pac::adc::admux::MUX_A::ADC3), + port::PC4: (crate::pac::adc::admux::MUX_A::ADC4), + port::PC5: (crate::pac::adc::admux::MUX_A::ADC5), }, channels: { #[cfg(feature = "enable-extra-adc")] - channel::ADC6: crate::pac::adc::admux::Mux::Adc6, + channel::ADC6: crate::pac::adc::admux::MUX_A::ADC6, #[cfg(feature = "enable-extra-adc")] - channel::ADC7: crate::pac::adc::admux::Mux::Adc7, - channel::Vbg: crate::pac::adc::admux::Mux::AdcVbg, - channel::Gnd: crate::pac::adc::admux::Mux::AdcGnd, + channel::ADC7: crate::pac::adc::admux::MUX_A::ADC7, + channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG, + channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND, }, } #[cfg(any(feature = "atmega164pa"))] avr_hal_generic::impl_adc! { hal: crate::Atmega, - peripheral: crate::pac::Adc, + peripheral: crate::pac::ADC, settings: AdcSettings, apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) }, - channel_id: crate::pac::adc::admux::Mux, + channel_id: crate::pac::adc::admux::MUX_A, set_channel: |peripheral, id| { peripheral.admux().modify(|_, w| w.mux().variant(id)); }, pins: { - port::PA0: (crate::pac::adc::admux::Mux::Adc0, didr0::adc0d), - port::PA1: (crate::pac::adc::admux::Mux::Adc1, didr0::adc1d), - port::PA2: (crate::pac::adc::admux::Mux::Adc2, didr0::adc2d), - port::PA3: (crate::pac::adc::admux::Mux::Adc3, didr0::adc3d), - port::PA4: (crate::pac::adc::admux::Mux::Adc4, didr0::adc4d), - port::PA5: (crate::pac::adc::admux::Mux::Adc5, didr0::adc5d), - port::PA6: (crate::pac::adc::admux::Mux::Adc6, didr0::adc6d), - port::PA7: (crate::pac::adc::admux::Mux::Adc7, didr0::adc7d), + port::PA0: (crate::pac::adc::admux::MUX_A::ADC0, didr0::adc0d), + port::PA1: (crate::pac::adc::admux::MUX_A::ADC1, didr0::adc1d), + port::PA2: (crate::pac::adc::admux::MUX_A::ADC2, didr0::adc2d), + port::PA3: (crate::pac::adc::admux::MUX_A::ADC3, didr0::adc3d), + port::PA4: (crate::pac::adc::admux::MUX_A::ADC4, didr0::adc4d), + port::PA5: (crate::pac::adc::admux::MUX_A::ADC5, didr0::adc5d), + port::PA6: (crate::pac::adc::admux::MUX_A::ADC6, didr0::adc6d), + port::PA7: (crate::pac::adc::admux::MUX_A::ADC7, didr0::adc7d), }, channels: { - channel::Vbg: crate::pac::adc::admux::Mux::AdcVbg, - channel::Gnd: crate::pac::adc::admux::Mux::AdcGnd, + channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG, + channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND, }, } diff --git a/mcu/atmega-hal/src/eeprom.rs b/mcu/atmega-hal/src/eeprom.rs index 1409122ffa..ca3d199915 100644 --- a/mcu/atmega-hal/src/eeprom.rs +++ b/mcu/atmega-hal/src/eeprom.rs @@ -20,13 +20,13 @@ pub use avr_hal_generic::eeprom::{EepromOps, OutOfBoundsError}; -pub type Eeprom = avr_hal_generic::eeprom::Eeprom; +pub type Eeprom = avr_hal_generic::eeprom::Eeprom; /////////////////////////////////////////////////////////// #[cfg(feature = "atmega48p")] avr_hal_generic::impl_eeprom_atmega! { hal: crate::Atmega, - peripheral: crate::pac::Eeprom, + peripheral: crate::pac::EEPROM, capacity: 256, addr_width: u8, set_address: |peripheral, address| { @@ -37,7 +37,7 @@ avr_hal_generic::impl_eeprom_atmega! { #[cfg(feature = "atmega88p")] avr_hal_generic::impl_eeprom_atmega! { hal: crate::Atmega, - peripheral: crate::pac::Eeprom, + peripheral: crate::pac::EEPROM, capacity: 512, addr_width: u16, set_address: |peripheral, address| { @@ -48,7 +48,7 @@ avr_hal_generic::impl_eeprom_atmega! { #[cfg(any(feature = "atmega168", feature = "atmega164pa"))] avr_hal_generic::impl_eeprom_atmega! { hal: crate::Atmega, - peripheral: crate::pac::Eeprom, + peripheral: crate::pac::EEPROM, capacity: 512, addr_width: u16, set_address: |peripheral, address| { @@ -63,7 +63,7 @@ avr_hal_generic::impl_eeprom_atmega! { ))] avr_hal_generic::impl_eeprom_atmega! { hal: crate::Atmega, - peripheral: crate::pac::Eeprom, + peripheral: crate::pac::EEPROM, capacity: 1024, addr_width: u16, set_address: |peripheral, address| { @@ -78,7 +78,7 @@ avr_hal_generic::impl_eeprom_atmega! { ))] avr_hal_generic::impl_eeprom_atmega! { hal: crate::Atmega, - peripheral: crate::pac::Eeprom, + peripheral: crate::pac::EEPROM, capacity: 4096, addr_width: u16, set_address: |peripheral, address| { @@ -89,7 +89,7 @@ avr_hal_generic::impl_eeprom_atmega! { #[cfg(any(feature = "atmega8", feature = "atmega16"))] avr_hal_generic::impl_eeprom_atmega_old! { hal: crate::Atmega, - peripheral: crate::pac::Eeprom, + peripheral: crate::pac::EEPROM, capacity: 512, addr_width: u16, set_address: |peripheral, address| { @@ -100,7 +100,7 @@ avr_hal_generic::impl_eeprom_atmega_old! { #[cfg(any(feature = "atmega32a"))] avr_hal_generic::impl_eeprom_atmega_old! { hal: crate::Atmega, - peripheral: crate::pac::Eeprom, + peripheral: crate::pac::EEPROM, capacity: 1024, addr_width: u16, set_address: |peripheral, address| { @@ -111,7 +111,7 @@ avr_hal_generic::impl_eeprom_atmega_old! { #[cfg(any(feature = "atmega128a",))] avr_hal_generic::impl_eeprom_atmega_old! { hal: crate::Atmega, - peripheral: crate::pac::Eeprom, + peripheral: crate::pac::EEPROM, capacity: 4096, addr_width: u16, set_address: |peripheral, address| { diff --git a/mcu/atmega-hal/src/i2c.rs b/mcu/atmega-hal/src/i2c.rs index c2efaff9a9..1d068366db 100644 --- a/mcu/atmega-hal/src/i2c.rs +++ b/mcu/atmega-hal/src/i2c.rs @@ -31,7 +31,7 @@ pub use avr_hal_generic::i2c::*; ))] pub type I2c = avr_hal_generic::i2c::I2c< crate::Atmega, - crate::pac::Twi, + crate::pac::TWI, port::Pin, port::Pin, CLOCK, @@ -44,7 +44,7 @@ pub type I2c = avr_hal_generic::i2c::I2c< ))] avr_hal_generic::impl_i2c_twi! { hal: crate::Atmega, - peripheral: crate::pac::Twi, + peripheral: crate::pac::TWI, sda: port::PD1, scl: port::PD0, } @@ -52,7 +52,7 @@ avr_hal_generic::impl_i2c_twi! { #[cfg(any(feature = "atmega16", feature = "atmega164pa"))] pub type I2c = avr_hal_generic::i2c::I2c< crate::Atmega, - crate::pac::Twi, + crate::pac::TWI, port::Pin, port::Pin, CLOCK, @@ -60,7 +60,7 @@ pub type I2c = avr_hal_generic::i2c::I2c< #[cfg(any(feature = "atmega16", feature = "atmega164pa"))] avr_hal_generic::impl_i2c_twi! { hal: crate::Atmega, - peripheral: crate::pac::Twi, + peripheral: crate::pac::TWI, sda: port::PC1, scl: port::PC0, } @@ -74,7 +74,7 @@ avr_hal_generic::impl_i2c_twi! { ))] pub type I2c = avr_hal_generic::i2c::I2c< crate::Atmega, - crate::pac::Twi, + crate::pac::TWI, port::Pin, port::Pin, CLOCK, @@ -88,7 +88,7 @@ pub type I2c = avr_hal_generic::i2c::I2c< ))] avr_hal_generic::impl_i2c_twi! { hal: crate::Atmega, - peripheral: crate::pac::Twi, + peripheral: crate::pac::TWI, sda: port::PC4, scl: port::PC5, } @@ -96,7 +96,7 @@ avr_hal_generic::impl_i2c_twi! { #[cfg(any(feature = "atmega328pb"))] pub type I2c0 = avr_hal_generic::i2c::I2c< crate::Atmega, - crate::pac::Twi0, + crate::pac::TWI0, port::Pin, port::Pin, CLOCK, @@ -104,14 +104,14 @@ pub type I2c0 = avr_hal_generic::i2c::I2c< #[cfg(any(feature = "atmega328pb"))] avr_hal_generic::impl_i2c_twi! { hal: crate::Atmega, - peripheral: crate::pac::Twi0, + peripheral: crate::pac::TWI0, sda: port::PC4, scl: port::PC5, } #[cfg(any(feature = "atmega328pb"))] pub type I2c1 = avr_hal_generic::i2c::I2c< crate::Atmega, - crate::pac::Twi1, + crate::pac::TWI1, port::Pin, port::Pin, CLOCK, @@ -119,7 +119,7 @@ pub type I2c1 = avr_hal_generic::i2c::I2c< #[cfg(any(feature = "atmega328pb"))] avr_hal_generic::impl_i2c_twi! { hal: crate::Atmega, - peripheral: crate::pac::Twi1, + peripheral: crate::pac::TWI1, sda: port::PE0, scl: port::PE1, } @@ -127,7 +127,7 @@ avr_hal_generic::impl_i2c_twi! { #[cfg(any(feature = "atmega1284p", feature = "atmega32a"))] pub type I2c = avr_hal_generic::i2c::I2c< crate::Atmega, - crate::pac::Twi, + crate::pac::TWI, port::Pin, port::Pin, CLOCK, @@ -135,7 +135,7 @@ pub type I2c = avr_hal_generic::i2c::I2c< #[cfg(any(feature = "atmega1284p", feature = "atmega32a"))] avr_hal_generic::impl_i2c_twi! { hal: crate::Atmega, - peripheral: crate::pac::Twi, + peripheral: crate::pac::TWI, sda: port::PC1, scl: port::PC0, } diff --git a/mcu/atmega-hal/src/lib.rs b/mcu/atmega-hal/src/lib.rs index 98bb5fbbe4..d076052345 100644 --- a/mcu/atmega-hal/src/lib.rs +++ b/mcu/atmega-hal/src/lib.rs @@ -168,28 +168,28 @@ pub struct Atmega; #[macro_export] macro_rules! pins { ($p:expr) => { - $crate::Pins::new($p.port_b, $p.port_c, $p.port_d) + $crate::Pins::new($p.PORTB, $p.PORTC, $p.PORTD) }; } #[cfg(any(feature = "atmega16", feature = "atmega164pa"))] #[macro_export] macro_rules! pins { ($p:expr) => { - $crate::Pins::new($p.port_a, $p.port_b, $p.port_c, $p.port_d) + $crate::Pins::new($p.PORTA, $p.PORTB, $p.PORTC, $p.PORTD) }; } #[cfg(feature = "atmega328pb")] #[macro_export] macro_rules! pins { ($p:expr) => { - $crate::Pins::new($p.port_b, $p.port_c, $p.port_d, $p.port_e) + $crate::Pins::new($p.PORTB, $p.PORTC, $p.PORTD, $p.PORTE) }; } #[cfg(feature = "atmega32u4")] #[macro_export] macro_rules! pins { ($p:expr) => { - $crate::Pins::new($p.port_b, $p.port_c, $p.port_d, $p.port_e, $p.port_f) + $crate::Pins::new($p.PORTB, $p.PORTC, $p.PORTD, $p.PORTE, $p.PORTF) }; } @@ -198,7 +198,7 @@ macro_rules! pins { macro_rules! pins { ($p:expr) => { $crate::Pins::new( - $p.port_a, $p.port_b, $p.port_c, $p.port_d, $p.port_e, $p.port_f, $p.port_g, + $p.PORTA, $p.PORTB, $p.PORTC, $p.PORTD, $p.PORTE, $p.PORTF, $p.PORTG, ) }; } @@ -208,8 +208,8 @@ macro_rules! pins { macro_rules! pins { ($p:expr) => { $crate::Pins::new( - $p.port_a, $p.port_b, $p.port_c, $p.port_d, $p.port_e, $p.port_f, $p.port_g, $p.port_h, - $p.port_j, $p.port_k, $p.port_l, + $p.PORTA, $p.PORTB, $p.PORTC, $p.PORTD, $p.PORTE, $p.PORTF, $p.PORTG, $p.PORTH, + $p.PORTJ, $p.PORTK, $p.PORTL, ) }; } @@ -218,7 +218,7 @@ macro_rules! pins { #[macro_export] macro_rules! pins { ($p:expr) => { - $crate::Pins::new($p.port_a, $p.port_b, $p.port_c, $p.port_d) + $crate::Pins::new($p.PORTA, $p.PORTB, $p.PORTC, $p.PORTD) }; } @@ -226,6 +226,6 @@ macro_rules! pins { #[macro_export] macro_rules! pins { ($p:expr) => { - $crate::Pins::new($p.port_b, $p.port_c, $p.port_d) + $crate::Pins::new($p.PORTB, $p.PORTC, $p.PORTD) }; } diff --git a/mcu/atmega-hal/src/port.rs b/mcu/atmega-hal/src/port.rs index 53dc287b09..f33d2368a2 100644 --- a/mcu/atmega-hal/src/port.rs +++ b/mcu/atmega-hal/src/port.rs @@ -27,88 +27,88 @@ pub use avr_hal_generic::port::{mode, PinMode, PinOps}; ))] avr_hal_generic::impl_port_traditional! { enum Ports { - B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6, 7], - C: crate::pac::PortC = [0, 1, 2, 3, 4, 5, 6], - D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6, 7], + B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7], + C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6], + D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7], } } #[cfg(any(feature = "atmega16", feature = "atmega32a"))] avr_hal_generic::impl_port_traditional_old! { enum Ports { - A: crate::pac::PortA = [0, 1, 2, 3, 4, 5, 6 ,7], - B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6 ,7], - C: crate::pac::PortC = [0, 1, 2, 3, 4, 5, 6 ,7], - D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6 ,7], + A: crate::pac::PORTA = [0, 1, 2, 3, 4, 5, 6 ,7], + B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6 ,7], + C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6 ,7], + D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6 ,7], } } #[cfg(feature = "atmega328pb")] avr_hal_generic::impl_port_traditional! { enum Ports { - B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6, 7], - C: crate::pac::PortC = [0, 1, 2, 3, 4, 5, 6], - D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6, 7], - E: crate::pac::PortE = [0, 1, 2, 3], + B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7], + C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6], + D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7], + E: crate::pac::PORTE = [0, 1, 2, 3], } } #[cfg(feature = "atmega32u4")] avr_hal_generic::impl_port_traditional! { enum Ports { - B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6, 7], - C: crate::pac::PortC = [6, 7], - D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6, 7], - E: crate::pac::PortE = [2, 6], - F: crate::pac::PortF = [0, 1, 4, 5, 6, 7], + B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7], + C: crate::pac::PORTC = [6, 7], + D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7], + E: crate::pac::PORTE = [2, 6], + F: crate::pac::PORTF = [0, 1, 4, 5, 6, 7], } } #[cfg(any(feature = "atmega128a"))] avr_hal_generic::impl_port_traditional_old! { enum Ports { - A: crate::pac::PortA = [0, 1, 2, 3, 4, 5, 6, 7], - B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6, 7], - C: crate::pac::PortC = [0, 1, 2, 3, 4, 5, 6, 7], - D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6, 7], - E: crate::pac::PortE = [0, 1, 2, 3, 4, 5, 6, 7], - F: crate::pac::PortF = [0, 1, 2, 3, 4, 5, 6, 7], - G: crate::pac::PortG = [0, 1, 2, 3, 4], + A: crate::pac::PORTA = [0, 1, 2, 3, 4, 5, 6, 7], + B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7], + C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6, 7], + D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7], + E: crate::pac::PORTE = [0, 1, 2, 3, 4, 5, 6, 7], + F: crate::pac::PORTF = [0, 1, 2, 3, 4, 5, 6, 7], + G: crate::pac::PORTG = [0, 1, 2, 3, 4], } } #[cfg(any(feature = "atmega1280", feature = "atmega2560"))] avr_hal_generic::impl_port_traditional! { enum Ports { - A: crate::pac::PortA = [0, 1, 2, 3, 4, 5, 6, 7], - B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6, 7], - C: crate::pac::PortC = [0, 1, 2, 3, 4, 5, 6, 7], - D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6, 7], - E: crate::pac::PortE = [0, 1, 2, 3, 4, 5, 6, 7], - F: crate::pac::PortF = [0, 1, 2, 3, 4, 5, 6, 7], - G: crate::pac::PortG = [0, 1, 2, 3, 4, 5], - H: crate::pac::PortH = [0, 1, 2, 3, 4, 5, 6, 7], - J: crate::pac::PortJ = [0, 1, 2, 3, 4, 5, 6, 7], - K: crate::pac::PortK = [0, 1, 2, 3, 4, 5, 6, 7], - L: crate::pac::PortL = [0, 1, 2, 3, 4, 5, 6, 7], + A: crate::pac::PORTA = [0, 1, 2, 3, 4, 5, 6, 7], + B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7], + C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6, 7], + D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7], + E: crate::pac::PORTE = [0, 1, 2, 3, 4, 5, 6, 7], + F: crate::pac::PORTF = [0, 1, 2, 3, 4, 5, 6, 7], + G: crate::pac::PORTG = [0, 1, 2, 3, 4, 5], + H: crate::pac::PORTH = [0, 1, 2, 3, 4, 5, 6, 7], + J: crate::pac::PORTJ = [0, 1, 2, 3, 4, 5, 6, 7], + K: crate::pac::PORTK = [0, 1, 2, 3, 4, 5, 6, 7], + L: crate::pac::PORTL = [0, 1, 2, 3, 4, 5, 6, 7], } } #[cfg(any(feature = "atmega1284p", feature = "atmega164pa"))] avr_hal_generic::impl_port_traditional! { enum Ports { - A: crate::pac::PortA = [0, 1, 2, 3, 4, 5, 6, 7], - B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6, 7], - C: crate::pac::PortC = [0, 1, 2, 3, 4, 5, 6, 7], - D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6, 7], + A: crate::pac::PORTA = [0, 1, 2, 3, 4, 5, 6, 7], + B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7], + C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6, 7], + D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7], } } #[cfg(any(feature = "atmega8"))] avr_hal_generic::impl_port_traditional_old! { enum Ports { - B: crate::pac::PortB = [0, 1, 2, 3, 4, 5, 6, 7], - C: crate::pac::PortC = [0, 1, 2, 3, 4, 5, 6], - D: crate::pac::PortD = [0, 1, 2, 3, 4, 5, 6, 7], + B: crate::pac::PORTB = [0, 1, 2, 3, 4, 5, 6, 7], + C: crate::pac::PORTC = [0, 1, 2, 3, 4, 5, 6], + D: crate::pac::PORTD = [0, 1, 2, 3, 4, 5, 6, 7], } } diff --git a/mcu/atmega-hal/src/simple_pwm.rs b/mcu/atmega-hal/src/simple_pwm.rs index d7dc862141..bdf13e25f1 100644 --- a/mcu/atmega-hal/src/simple_pwm.rs +++ b/mcu/atmega-hal/src/simple_pwm.rs @@ -24,7 +24,7 @@ avr_hal_generic::impl_simple_pwm! { /// d5.enable(); /// ``` pub struct Timer0Pwm { - timer: crate::pac::Tc0, + timer: crate::pac::TC0, init: |tim, prescaler| { tim.tccr0a().modify(|_r, w| w.wgm0().pwm_fast()); tim.tccr0b().modify(|_r, w| match prescaler { @@ -78,7 +78,7 @@ avr_hal_generic::impl_simple_pwm! { /// d9.enable(); /// ``` pub struct Timer1Pwm { - timer: crate::pac::Tc1, + timer: crate::pac::TC1, init: |tim, prescaler| { tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); tim.tccr1b().modify(|_r, w| { @@ -136,7 +136,7 @@ avr_hal_generic::impl_simple_pwm! { /// d11.enable(); /// ``` pub struct Timer2Pwm { - timer: crate::pac::Tc2, + timer: crate::pac::TC2, init: |tim, prescaler| { tim.tccr2a().modify(|_r, w| w.wgm2().pwm_fast()); tim.tccr2b().modify(|_r, w| match prescaler { @@ -173,7 +173,7 @@ avr_hal_generic::impl_simple_pwm! { avr_hal_generic::impl_simple_pwm! { /// Use `TC3` for PWM (pins `PD0`, `PD2`) pub struct Timer3Pwm { - timer: crate::pac::Tc3, + timer: crate::pac::TC3, init: |tim, prescaler| { tim.tccr3a().modify(|_r, w| w.wgm3().set(0b01)); tim.tccr3b().modify(|_r, w| { @@ -214,7 +214,7 @@ avr_hal_generic::impl_simple_pwm! { avr_hal_generic::impl_simple_pwm! { /// Use `TC4` for PWM (pins `PD1`, `PD2`) pub struct Timer4Pwm { - timer: crate::pac::Tc4, + timer: crate::pac::TC4, init: |tim, prescaler| { tim.tccr4a().modify(|_r, w| w.wgm4().set(0b01)); tim.tccr4b().modify(|_r, w| { @@ -266,7 +266,7 @@ avr_hal_generic::impl_simple_pwm! { /// d13.enable(); /// ``` pub struct Timer0Pwm { - timer: crate::pac::Tc0, + timer: crate::pac::TC0, init: |tim, prescaler| { tim.tccr0a().modify(|_r, w| w.wgm0().pwm_fast()); tim.tccr0b().modify(|_r, w| match prescaler { @@ -315,7 +315,7 @@ avr_hal_generic::impl_simple_pwm! { /// d11.enable(); /// ``` pub struct Timer1Pwm { - timer: crate::pac::Tc1, + timer: crate::pac::TC1, init: |tim, prescaler| { tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); tim.tccr1b().modify(|_r, w| match prescaler { @@ -373,7 +373,7 @@ avr_hal_generic::impl_simple_pwm! { /// ``` pub struct Timer2Pwm { - timer: crate::pac::Tc2, + timer: crate::pac::TC2, init: |tim, prescaler| { tim.tccr2a().modify(|_r, w| w.wgm2().set(0b01)); tim.tccr2b().modify(|_r, w| { @@ -426,7 +426,7 @@ avr_hal_generic::impl_simple_pwm! { /// d5.enable(); /// ``` pub struct Timer3Pwm { - timer: crate::pac::Tc3, + timer: crate::pac::TC3, init: |tim, prescaler| { tim.tccr3a().modify(|_r, w| w.wgm3().set(0b01)); tim.tccr3b().modify(|_r, w| { @@ -489,7 +489,7 @@ avr_hal_generic::impl_simple_pwm! { /// d6.enable(); /// ``` pub struct Timer4Pwm { - timer: crate::pac::Tc4, + timer: crate::pac::TC4, init: |tim, prescaler| { tim.tccr4a().modify(|_r, w| w.wgm4().set(0b01)); tim.tccr4b().modify(|_r, w| { @@ -552,7 +552,7 @@ avr_hal_generic::impl_simple_pwm! { /// d46.enable(); /// ``` pub struct Timer5Pwm { - timer: crate::pac::Tc5, + timer: crate::pac::TC5, init: |tim, prescaler| { tim.tccr5a().modify(|_r, w| w.wgm5().set(0b01)); tim.tccr5b().modify(|_r, w| { @@ -614,7 +614,7 @@ avr_hal_generic::impl_simple_pwm! { /// d11.enable(); /// ``` pub struct Timer0Pwm { - timer: crate::pac::Tc0, + timer: crate::pac::TC0, init: |tim, prescaler| { tim.tccr0a().modify(|_r, w| w.wgm0().pwm_fast()); tim.tccr0b().modify(|_r, w| match prescaler { @@ -663,7 +663,7 @@ avr_hal_generic::impl_simple_pwm! { /// d9.enable(); /// ``` pub struct Timer1Pwm { - timer: crate::pac::Tc1, + timer: crate::pac::TC1, init: |tim, prescaler| { tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); tim.tccr1b().modify(|_r, w| w.wgm1().set(0b01)); @@ -721,7 +721,7 @@ avr_hal_generic::impl_simple_pwm! { /// d5.enable(); /// ``` pub struct Timer3Pwm { - timer: crate::pac::Tc3, + timer: crate::pac::TC3, init: |tim, prescaler| { tim.tccr3a().modify(|_r, w| w.wgm3().set(0b01)); tim.tccr3b().modify(|_r, w| w.wgm3().set(0b01)); @@ -763,7 +763,7 @@ avr_hal_generic::impl_simple_pwm! { /// d6.enable(); /// ``` pub struct Timer4Pwm { - timer: crate::pac::Tc4, + timer: crate::pac::TC4, init: |tim, prescaler| { tim.tccr4a().modify(|_r, w| w.pwm4a().set_bit()); tim.tccr4a().modify(|_r, w| w.pwm4b().set_bit()); @@ -823,7 +823,7 @@ avr_hal_generic::impl_simple_pwm! { /// b4.enable(); /// ``` pub struct Timer0Pwm { - timer: crate::pac::Tc0, + timer: crate::pac::TC0, init: |tim, prescaler| { tim.tccr0a().modify(|_r, w| w.wgm0().pwm_fast()); tim.tccr0b().modify(|_r, w| match prescaler { @@ -871,7 +871,7 @@ avr_hal_generic::impl_simple_pwm! { /// d5.enable(); /// ``` pub struct Timer1Pwm { - timer: crate::pac::Tc1, + timer: crate::pac::TC1, init: |tim, prescaler| { tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); tim.tccr1b().modify(|_r, w| { @@ -923,7 +923,7 @@ avr_hal_generic::impl_simple_pwm! { /// d7.enable(); /// ``` pub struct Timer2Pwm { - timer: crate::pac::Tc2, + timer: crate::pac::TC2, init: |tim, prescaler| { tim.tccr2a().modify(|_r, w| w.wgm2().pwm_fast()); tim.tccr2b().modify(|_r, w| match prescaler { @@ -960,7 +960,7 @@ avr_hal_generic::impl_simple_pwm! { avr_hal_generic::impl_simple_pwm! { /// Use `TC3` for PWM (pins `PB6`, `PB7`) pub struct Timer3Pwm { - timer: crate::pac::Tc3, + timer: crate::pac::TC3, init: |tim, prescaler| { tim.tccr3a().modify(|_r, w| w.wgm3().set(0b01)); tim.tccr3b().modify(|_r, w| { @@ -1012,7 +1012,7 @@ avr_hal_generic::impl_simple_pwm! { /// d9.enable(); /// ``` pub struct Timer1Pwm { - timer: crate::pac::Tc1, + timer: crate::pac::TC1, init: |tim, prescaler| { tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); tim.tccr1b().modify(|_r, w| { @@ -1064,7 +1064,7 @@ avr_hal_generic::impl_simple_pwm! { /// d11.enable(); /// ``` pub struct Timer2Pwm { - timer: crate::pac::Tc2, + timer: crate::pac::TC2, init: |tim, prescaler| { tim.tccr2().modify(|_r, w| w.wgm20().set_bit().wgm21().set_bit()); tim.tccr2().modify(|_r, w| match prescaler { @@ -1102,7 +1102,7 @@ avr_hal_generic::impl_simple_pwm! { /// b3.enable(); /// ``` pub struct Timer0Pwm { - timer: crate::pac::Tc0, + timer: crate::pac::TC0, init: |tim, prescaler| { tim.tccr0a().modify(|_r, w| w.wgm0().set(0b11)); tim.tccr0a().modify(|_r, w| w.com0a().set(0b00)); @@ -1145,7 +1145,7 @@ avr_hal_generic::impl_simple_pwm! { /// d5.enable(); /// ``` pub struct Timer1Pwm { - timer: crate::pac::Tc1, + timer: crate::pac::TC1, init: |tim, prescaler| { tim.tccr1a().modify(|_r, w| w.wgm1().set(0b01)); tim.tccr1a().modify(|_r, w| w.com1a().set(0b00)); diff --git a/mcu/atmega-hal/src/spi.rs b/mcu/atmega-hal/src/spi.rs index 0a72e1d30d..5338e89fe5 100644 --- a/mcu/atmega-hal/src/spi.rs +++ b/mcu/atmega-hal/src/spi.rs @@ -40,7 +40,7 @@ pub use avr_hal_generic::spi::*; ))] pub type Spi = avr_hal_generic::spi::Spi< crate::Atmega, - crate::pac::Spi, + crate::pac::SPI, port::PB1, port::PB2, port::PB3, @@ -54,7 +54,7 @@ pub type Spi = avr_hal_generic::spi::Spi< ))] avr_hal_generic::impl_spi! { hal: crate::Atmega, - peripheral: crate::pac::Spi, + peripheral: crate::pac::SPI, sclk: port::PB1, mosi: port::PB2, miso: port::PB3, @@ -70,7 +70,7 @@ avr_hal_generic::impl_spi! { ))] pub type Spi = avr_hal_generic::spi::Spi< crate::Atmega, - crate::pac::Spi, + crate::pac::SPI, port::PB5, port::PB3, port::PB4, @@ -85,7 +85,7 @@ pub type Spi = avr_hal_generic::spi::Spi< ))] avr_hal_generic::impl_spi! { hal: crate::Atmega, - peripheral: crate::pac::Spi, + peripheral: crate::pac::SPI, sclk: port::PB5, mosi: port::PB3, miso: port::PB4, @@ -95,7 +95,7 @@ avr_hal_generic::impl_spi! { #[cfg(feature = "atmega328pb")] pub type Spi0 = avr_hal_generic::spi::Spi< crate::Atmega, - crate::pac::Spi0, + crate::pac::SPI0, port::PB5, port::PB3, port::PB4, @@ -104,7 +104,7 @@ pub type Spi0 = avr_hal_generic::spi::Spi< #[cfg(feature = "atmega328pb")] avr_hal_generic::impl_spi! { hal: crate::Atmega, - peripheral: crate::pac::Spi0, + peripheral: crate::pac::SPI0, sclk: port::PB5, mosi: port::PB3, miso: port::PB4, @@ -113,7 +113,7 @@ avr_hal_generic::impl_spi! { #[cfg(feature = "atmega328pb")] pub type Spi1 = avr_hal_generic::spi::Spi< crate::Atmega, - crate::pac::Spi1, + crate::pac::SPI1, port::PC1, port::PE3, port::PC0, @@ -122,7 +122,7 @@ pub type Spi1 = avr_hal_generic::spi::Spi< #[cfg(feature = "atmega328pb")] avr_hal_generic::impl_spi! { hal: crate::Atmega, - peripheral: crate::pac::Spi1, + peripheral: crate::pac::SPI1, sclk: port::PC1, mosi: port::PE3, miso: port::PC0, @@ -132,7 +132,7 @@ avr_hal_generic::impl_spi! { #[cfg(any(feature = "atmega1284p", feature = "atmega32a"))] pub type Spi = avr_hal_generic::spi::Spi< crate::Atmega, - crate::pac::Spi, + crate::pac::SPI, port::PB7, port::PB5, port::PB6, @@ -141,7 +141,7 @@ pub type Spi = avr_hal_generic::spi::Spi< #[cfg(any(feature = "atmega1284p", feature = "atmega32a"))] avr_hal_generic::impl_spi! { hal: crate::Atmega, - peripheral: crate::pac::Spi, + peripheral: crate::pac::SPI, sclk: port::PB7, mosi: port::PB5, miso: port::PB6, diff --git a/mcu/atmega-hal/src/usart.rs b/mcu/atmega-hal/src/usart.rs index eb520c2f54..c4525f427c 100644 --- a/mcu/atmega-hal/src/usart.rs +++ b/mcu/atmega-hal/src/usart.rs @@ -42,7 +42,7 @@ pub type UsartReader = #[cfg(any(feature = "atmega16"))] pub type Usart0 = Usart< - crate::pac::Usart, + crate::pac::USART, port::Pin, port::Pin, CLOCK, @@ -56,7 +56,7 @@ pub type Usart0 = Usart< feature = "atmega164pa" ))] pub type Usart0 = Usart< - crate::pac::Usart0, + crate::pac::USART0, port::Pin, port::Pin, CLOCK, @@ -71,7 +71,7 @@ pub type Usart0 = Usart< ))] avr_hal_generic::impl_usart_traditional! { hal: crate::Atmega, - peripheral: crate::pac::Usart0, + peripheral: crate::pac::USART0, register_suffix: 0, rx: port::PD0, tx: port::PD1, @@ -79,7 +79,7 @@ avr_hal_generic::impl_usart_traditional! { #[cfg(feature = "atmega328pb")] pub type Usart1 = Usart< - crate::pac::Usart1, + crate::pac::USART1, port::Pin, port::Pin, CLOCK, @@ -87,7 +87,7 @@ pub type Usart1 = Usart< #[cfg(feature = "atmega328pb")] avr_hal_generic::impl_usart_traditional! { hal: crate::Atmega, - peripheral: crate::pac::Usart1, + peripheral: crate::pac::USART1, register_suffix: 1, rx: port::PB4, tx: port::PB3, @@ -102,7 +102,7 @@ avr_hal_generic::impl_usart_traditional! { feature = "atmega164pa" ))] pub type Usart1 = Usart< - crate::pac::Usart1, + crate::pac::USART1, port::Pin, port::Pin, CLOCK, @@ -116,7 +116,7 @@ pub type Usart1 = Usart< ))] avr_hal_generic::impl_usart_traditional! { hal: crate::Atmega, - peripheral: crate::pac::Usart1, + peripheral: crate::pac::USART1, register_suffix: 1, rx: port::PD2, tx: port::PD3, @@ -124,7 +124,7 @@ avr_hal_generic::impl_usart_traditional! { #[cfg(any(feature = "atmega128a", feature = "atmega1280", feature = "atmega2560"))] pub type Usart0 = Usart< - crate::pac::Usart0, + crate::pac::USART0, port::Pin, port::Pin, CLOCK, @@ -132,7 +132,7 @@ pub type Usart0 = Usart< #[cfg(any(feature = "atmega1280", feature = "atmega2560"))] avr_hal_generic::impl_usart_traditional! { hal: crate::Atmega, - peripheral: crate::pac::Usart0, + peripheral: crate::pac::USART0, register_suffix: 0, rx: port::PE0, tx: port::PE1, @@ -140,7 +140,7 @@ avr_hal_generic::impl_usart_traditional! { #[cfg(any(feature = "atmega1280", feature = "atmega2560"))] pub type Usart2 = Usart< - crate::pac::Usart2, + crate::pac::USART2, port::Pin, port::Pin, CLOCK, @@ -148,7 +148,7 @@ pub type Usart2 = Usart< #[cfg(any(feature = "atmega1280", feature = "atmega2560"))] avr_hal_generic::impl_usart_traditional! { hal: crate::Atmega, - peripheral: crate::pac::Usart2, + peripheral: crate::pac::USART2, register_suffix: 2, rx: port::PH0, tx: port::PH1, @@ -156,7 +156,7 @@ avr_hal_generic::impl_usart_traditional! { #[cfg(any(feature = "atmega1280", feature = "atmega2560"))] pub type Usart3 = Usart< - crate::pac::Usart3, + crate::pac::USART3, port::Pin, port::Pin, CLOCK, @@ -164,7 +164,7 @@ pub type Usart3 = Usart< #[cfg(any(feature = "atmega1280", feature = "atmega2560"))] avr_hal_generic::impl_usart_traditional! { hal: crate::Atmega, - peripheral: crate::pac::Usart3, + peripheral: crate::pac::USART3, register_suffix: 3, rx: port::PJ0, tx: port::PJ1, @@ -172,7 +172,7 @@ avr_hal_generic::impl_usart_traditional! { #[cfg(any(feature = "atmega8", feature = "atmega32a"))] pub type Usart0 = Usart< - crate::pac::Usart, + crate::pac::USART, port::Pin, port::Pin, CLOCK, @@ -191,7 +191,7 @@ impl crate::Atmega, crate::port::Pin, crate::port::Pin, - > for crate::pac::Usart + > for crate::pac::USART { fn raw_init(&mut self, baudrate: crate::usart::Baudrate) { // msb of ubrrh has to be 0 to set ubrrh register. (see atmega8 datasheet) @@ -272,7 +272,7 @@ impl crate::Atmega, crate::port::Pin, crate::port::Pin, - > for crate::pac::Usart1 + > for crate::pac::USART1 { fn raw_init(&mut self, baudrate: crate::usart::Baudrate) { let ubrr1h: u8 = (baudrate.ubrr >> 8) as u8; @@ -352,7 +352,7 @@ impl crate::Atmega, crate::port::Pin, crate::port::Pin, - > for crate::pac::Usart0 + > for crate::pac::USART0 { fn raw_init(&mut self, baudrate: crate::usart::Baudrate) { let ubrr0h: u8 = (baudrate.ubrr >> 8) as u8; diff --git a/mcu/atmega-hal/src/wdt.rs b/mcu/atmega-hal/src/wdt.rs index 3922ff28d1..36b19725d6 100644 --- a/mcu/atmega-hal/src/wdt.rs +++ b/mcu/atmega-hal/src/wdt.rs @@ -1,13 +1,13 @@ #[allow(unused_imports)] pub use avr_hal_generic::wdt::{Timeout, WdtOps}; -pub type Wdt = avr_hal_generic::wdt::Wdt; +pub type Wdt = avr_hal_generic::wdt::Wdt; #[cfg(not(any(feature = "atmega8", feature = "atmega16", feature = "atmega32a", feature = "atmega128a")))] avr_hal_generic::impl_wdt! { hal: crate::Atmega, - peripheral: crate::pac::Wdt, - mcusr: crate::pac::cpu::Mcusr, + peripheral: crate::pac::WDT, + mcusr: crate::pac::cpu::MCUSR, wdtcsr_name: wdtcsr, timeout: |to, w| match to { Timeout::Ms16 => w.wdpl().cycles_2k_512k(), @@ -26,7 +26,7 @@ avr_hal_generic::impl_wdt! { #[cfg(any(feature = "atmega8", feature = "atmega32a", feature = "atmega128a"))] avr_hal_generic::impl_wdt! { hal: crate::Atmega, - peripheral: crate::pac::Wdt, + peripheral: crate::pac::WDT, mcusr: crate::pac::cpu::MCUCSR, wdtcsr_name: wdtcr, timeout: |to, w| match to { From 9f61d0b40b73bfeae09fb09f77ce98cbdbf4d3e8 Mon Sep 17 00:00:00 2001 From: Rahix Date: Wed, 30 Apr 2025 23:15:58 +0200 Subject: [PATCH 08/11] fixup! [WIP] generic: Accommodate for new return value of write() and modify() --- mcu/atmega-hal/src/usart.rs | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/mcu/atmega-hal/src/usart.rs b/mcu/atmega-hal/src/usart.rs index c4525f427c..78487e6687 100644 --- a/mcu/atmega-hal/src/usart.rs +++ b/mcu/atmega-hal/src/usart.rs @@ -334,10 +334,14 @@ impl fn raw_interrupt(&mut self, event: crate::usart::Event, state: bool) { match event { - crate::usart::Event::RxComplete => self.ucsr1b().modify(|_, w| w.rxcie1().bit(state)), - crate::usart::Event::TxComplete => self.ucsr1b().modify(|_, w| w.txcie1().bit(state)), + crate::usart::Event::RxComplete => { + self.ucsr1b().modify(|_, w| w.rxcie1().bit(state)); + } + crate::usart::Event::TxComplete => { + self.ucsr1b().modify(|_, w| w.txcie1().bit(state)); + } crate::usart::Event::DataRegisterEmpty => { - self.ucsr1b().modify(|_, w| w.udrie1().bit(state)) + self.ucsr1b().modify(|_, w| w.udrie1().bit(state)); } } } @@ -410,10 +414,14 @@ impl fn raw_interrupt(&mut self, event: crate::usart::Event, state: bool) { match event { - crate::usart::Event::RxComplete => self.ucsr0b().modify(|_, w| w.rxcie0().bit(state)), - crate::usart::Event::TxComplete => self.ucsr0b().modify(|_, w| w.txcie0().bit(state)), + crate::usart::Event::RxComplete => { + self.ucsr0b().modify(|_, w| w.rxcie0().bit(state)); + } + crate::usart::Event::TxComplete => { + self.ucsr0b().modify(|_, w| w.txcie0().bit(state)); + } crate::usart::Event::DataRegisterEmpty => { - self.ucsr0b().modify(|_, w| w.udrie0().bit(state)) + self.ucsr0b().modify(|_, w| w.udrie0().bit(state)); } } } From 3c65b735f84e9d90aaf7e071adc4d1b6b273b529 Mon Sep 17 00:00:00 2001 From: Rahix Date: Wed, 30 Apr 2025 23:18:06 +0200 Subject: [PATCH 09/11] fixup! treewide: Apply changes for new svd2rust API --- mcu/atmega-hal/src/eeprom.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/mcu/atmega-hal/src/eeprom.rs b/mcu/atmega-hal/src/eeprom.rs index ca3d199915..d20db81269 100644 --- a/mcu/atmega-hal/src/eeprom.rs +++ b/mcu/atmega-hal/src/eeprom.rs @@ -41,7 +41,7 @@ avr_hal_generic::impl_eeprom_atmega! { capacity: 512, addr_width: u16, set_address: |peripheral, address| { - peripheral.eear.write(|w| w.bits(address)); + peripheral.eear().write(|w| w.bits(address)); }, } From 683321279b2e5cbdf81bad0d140cf6fc9c10fd9f Mon Sep 17 00:00:00 2001 From: Rahix Date: Wed, 30 Apr 2025 23:18:18 +0200 Subject: [PATCH 10/11] fixup! [WIP] generic: Accommodate for new return value of write() and modify() --- mcu/atmega-hal/src/usart.rs | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/mcu/atmega-hal/src/usart.rs b/mcu/atmega-hal/src/usart.rs index 78487e6687..0fbcf35051 100644 --- a/mcu/atmega-hal/src/usart.rs +++ b/mcu/atmega-hal/src/usart.rs @@ -255,10 +255,14 @@ impl fn raw_interrupt(&mut self, event: crate::usart::Event, state: bool) { match event { - crate::usart::Event::RxComplete => self.ucsrb().modify(|_, w| w.rxcie().bit(state)), - crate::usart::Event::TxComplete => self.ucsrb().modify(|_, w| w.txcie().bit(state)), + crate::usart::Event::RxComplete => { + self.ucsrb().modify(|_, w| w.rxcie().bit(state)); + } + crate::usart::Event::TxComplete => { + self.ucsrb().modify(|_, w| w.txcie().bit(state)); + } crate::usart::Event::DataRegisterEmpty => { - self.ucsrb().modify(|_, w| w.udrie().bit(state)) + self.ucsrb().modify(|_, w| w.udrie().bit(state)); } } } From b589e0dbf99c52e875343be9df0554f24efae8ee Mon Sep 17 00:00:00 2001 From: Rahix Date: Wed, 30 Apr 2025 23:20:35 +0200 Subject: [PATCH 11/11] examples: nano168: Fix wrong interrupt annotation Previous versions of `avr-device` allowed accidentally mis-specifying the MCU in the interrupt definition. Now that this is caught, fix one such mistake here. --- examples/nano168/src/bin/nano168-millis.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/nano168/src/bin/nano168-millis.rs b/examples/nano168/src/bin/nano168-millis.rs index 85e906c61e..240fe9724b 100644 --- a/examples/nano168/src/bin/nano168-millis.rs +++ b/examples/nano168/src/bin/nano168-millis.rs @@ -53,7 +53,7 @@ fn millis_init(tc0: arduino_hal::pac::TC0) { }); } -#[avr_device::interrupt(atmega328p)] +#[avr_device::interrupt(atmega168)] fn TIMER0_COMPA() { avr_device::interrupt::free(|cs| { let counter_cell = MILLIS_COUNTER.borrow(cs);