refactor(time): 重构计时器校准逻辑并提取通用 PIT 校准工具

- 在 libs/time 中实现 calibrate_with_pit 通用校准函数
- 将 APIC 计时器校准逻辑从中断模块迁移至 libs/time/apic
- 使用通用工具简化 TSC 初始化流程
- 修正 scripts/install.sh 权限并包含新模块文件

Author: moyanj

kernel/src/interrupts/apic/mod.rs

@@ -3,7 +3,7 @@ use crate::interrupts::pic;
 use crate::libs::msr;
 use crate::memory::protection;
 use crate::{get_hhdm_offset, libs::acpi::ACPI_INFO};
-use log::{debug, info};
+use log::debug;
 use raw_cpuid::CpuId;
 use spin::Mutex;
 use x86_64::registers::model_specific::Msr;
@@ -18,10 +18,6 @@ const APIC_BASE_X2APIC_ENABLE: u64 = 1 << 10;
 // MMIO Offsets for xAPIC
 const XAPIC_EOI_OFFSET: u32 = 0x0B0;
 const XAPIC_SIVR_OFFSET: u32 = 0x0F0;
-const XAPIC_LVT_TIMER_OFFSET: u32 = 0x320;
-const XAPIC_TIMER_INIT_COUNT_OFFSET: u32 = 0x380;
-const XAPIC_TIMER_CUR_COUNT_OFFSET: u32 = 0x390;
-const XAPIC_TIMER_DIV_CONF_OFFSET: u32 = 0x3E0;
 
 pub const TIMER_VECTOR: u8 = 0x30; // APIC Timer interrupt vector
 
@@ -146,37 +142,12 @@ impl LocalApic {
         debug!("Local APIC initialized in {:?} mode", self.mode);
     }
 
-    // TODO: move to libs/time
     pub unsafe fn calibrate_timer(&self) {
-        // Stop timer
-        self.write_reg(XAPIC_TIMER_INIT_COUNT_OFFSET, 0);
-        // Set divider to 16
-        self.write_reg(XAPIC_TIMER_DIV_CONF_OFFSET, 0x3);
-
-        let mut pit = crate::libs::time::pit::PIT.lock();
-
-        // Start PIT one-shot for 10ms (10000 us)
-        // PIT freq is 1.193182 MHz. 10ms = 11932 ticks
-        let pit_ticks = 11932;
-        pit.start_one_shot(pit_ticks);
-
-        // Set APIC timer to max
-        self.write_reg(XAPIC_TIMER_INIT_COUNT_OFFSET, 0xFFFFFFFF);
-
-        // Wait for PIT
-        while (x86_64::instructions::port::Port::<u8>::new(0x61).read() & 0x20) == 0 {
-            core::hint::spin_loop();
-        }
-
-        // Stop APIC timer
-        let current_count = self.read_reg(XAPIC_TIMER_CUR_COUNT_OFFSET);
-        let ticks_per_10ms = 0xFFFFFFFF - current_count;
-
-        info!("APIC Timer calibrated: {} ticks per 10ms", ticks_per_10ms);
-
-        // Set timer for periodic interrupt at 100Hz (10ms)
-        self.write_reg(XAPIC_LVT_TIMER_OFFSET, 0x20000 | TIMER_VECTOR as u32); // Periodic mode
-        self.write_reg(XAPIC_TIMER_INIT_COUNT_OFFSET, ticks_per_10ms);
+        crate::libs::time::apic::calibrate_timer(
+            |reg| self.read_reg(reg),
+            |reg, val| self.write_reg(reg, val),
+            TIMER_VECTOR,
+        );
     }
 }
 

kernel/src/libs/time/apic.rs

@@ -0,0 +1,43 @@
+use log::info;
+
+pub const XAPIC_LVT_TIMER_OFFSET: u32 = 0x320;
+pub const XAPIC_TIMER_INIT_COUNT_OFFSET: u32 = 0x380;
+pub const XAPIC_TIMER_CUR_COUNT_OFFSET: u32 = 0x390;
+pub const XAPIC_TIMER_DIV_CONF_OFFSET: u32 = 0x3E0;
+
+/// Calibrate the APIC timer using PIT.
+///
+/// # Arguments
+/// * `read_reg` - A closure to read an APIC register.
+/// * `write_reg` - A closure to write an APIC register.
+/// * `timer_vector` - The interrupt vector to use for the timer.
+///
+/// # Returns
+/// The number of ticks per 10ms.
+pub unsafe fn calibrate_timer<F1, F2>(read_reg: F1, write_reg: F2, timer_vector: u8) -> u64
+where
+    F1: Fn(u32) -> u32,
+    F2: Fn(u32, u32),
+{
+    // Stop timer
+    write_reg(XAPIC_TIMER_INIT_COUNT_OFFSET, 0);
+    // Set divider to 16
+    write_reg(XAPIC_TIMER_DIV_CONF_OFFSET, 0x3);
+
+    let (ticks_per_10ms, _) = super::calibrate_with_pit(10000, || {
+        // Set APIC timer to max
+        write_reg(XAPIC_TIMER_INIT_COUNT_OFFSET, 0xFFFFFFFF);
+        move || {
+            let current_count = read_reg(XAPIC_TIMER_CUR_COUNT_OFFSET);
+            0xFFFFFFFF - current_count as u64
+        }
+    });
+
+    info!("APIC Timer calibrated: {} ticks per 10ms", ticks_per_10ms);
+
+    // Set timer for periodic interrupt at 100Hz (10ms)
+    write_reg(XAPIC_LVT_TIMER_OFFSET, 0x20000 | timer_vector as u32); // Periodic mode
+    write_reg(XAPIC_TIMER_INIT_COUNT_OFFSET, ticks_per_10ms as u32);
+
+    ticks_per_10ms
+}

kernel/src/libs/time/mod.rs

@@ -1,4 +1,37 @@
+pub mod apic;
 pub mod pit;
 pub mod tsc;
 
 pub use tsc::{init, sleep_us, time_since_boot};
+
+/// Calibrate a timer using the PIT (Programmable Interval Timer).
+///
+/// # Arguments
+/// * `us` - The duration to wait for in microseconds.
+/// * `f` - A closure that starts the timer and returns another closure to stop it.
+///
+/// # Returns
+/// A tuple containing (measured_value, actual_pit_ticks).
+pub fn calibrate_with_pit<F, R>(us: u64, f: F) -> (u64, u64)
+where
+    F: FnOnce() -> R,
+    R: FnOnce() -> u64,
+{
+    let mut pit = pit::PIT.lock();
+    // PIT freq is 1.193182 MHz
+    let ticks = (us * 1_193_182) / 1_000_000;
+
+    x86_64::instructions::interrupts::without_interrupts(|| {
+        pit.start_one_shot(ticks as u16);
+        let stop_fn = f();
+
+        // Wait for PIT to finish (Port 0x61, Bit 5 goes HIGH)
+        unsafe {
+            while (x86_64::instructions::port::Port::<u8>::new(0x61).read() & 0x20) == 0 {
+                core::hint::spin_loop();
+            }
+        }
+
+        (stop_fn(), ticks as u64)
+    })
+}

kernel/src/libs/time/tsc.rs

@@ -6,60 +6,21 @@ static TSC_FREQUENCY: AtomicU64 = AtomicU64::new(0);
 
 /// Initialize TSC by calibrating it against the PIT
 pub fn init() {
-    let mut pit = PIT.lock();
-
     // Check if TSC is supported? (Assuming yes for x86_64)
 
-    // We will wait for approximately 50ms worth of PIT ticks
-    // 1193182 Hz / 1000 * 50 ~= 59659 ticks
-    // This fits in u16 (65535)
-    const PIT_FREQ: u64 = 1_193_182;
     const CAL_MS: u64 = 50;
-    const TARGET_TICKS: u16 = (PIT_FREQ * CAL_MS / 1000) as u16;
-
-    // Run calibration with interrupts disabled to minimize jitter
-    let freq = x86_64::instructions::interrupts::without_interrupts(|| {
-        // Setup PIT Ch2 in Mode 0 with max count
-        // We start from 0xFFFF (65535) and count down
-        pit.start_one_shot(0xFFFF);
+    const PIT_FREQ: u64 = 1_193_182;
 
-        // Wait for a short while to ensure counting started and stable
-        // (Just reading it once is usually enough to settle?)
-        let start_pit = pit.read_count();
+    let (tsc_delta, pit_ticks) = super::calibrate_with_pit(CAL_MS * 1000, || {
         let start_tsc = unsafe { _rdtsc() };
-
-        let mut end_pit;
-        let mut end_tsc;
-
-        loop {
-            end_pit = pit.read_count();
-            end_tsc = unsafe { _rdtsc() };
-
-            // Check delta (handling potential wrap if any, though Mode 0 shouldn't)
-            // Since we count down: delta = start - end
-            if start_pit >= end_pit {
-                let delta = start_pit - end_pit;
-                if delta >= TARGET_TICKS {
-                    break;
-                }
-            } else {
-                // If end > start, something weird happened (reload? or wrap?)
-                // Just break to avoid infinite loop
-                break;
-            }
+        move || {
+            let end_tsc = unsafe { _rdtsc() };
+            end_tsc - start_tsc
         }
-
-        let pit_delta = (start_pit - end_pit) as u64;
-        let tsc_delta = end_tsc - start_tsc;
-
-        // Calculate Frequency
-        // freq = tsc_delta / time
-        // time = pit_delta / PIT_FREQ
-        // freq = tsc_delta * PIT_FREQ / pit_delta
-
-        (tsc_delta * PIT_FREQ).checked_div(pit_delta).unwrap_or(0)
     });
 
+    let freq = (tsc_delta * PIT_FREQ).checked_div(pit_ticks).unwrap_or(0);
+
     TSC_FREQUENCY.store(freq, Ordering::Relaxed);
 }