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reanme to simd64
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+6
-6
lines changed

3 files changed

+6
-6
lines changed

src/VecSim/spaces/IP/IP_AVX512F_BW_VL_VNNI_INT8.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -60,13 +60,13 @@ static inline int INT8_InnerProductImp(const void *pVect1v, const void *pVect2v,
6060
}
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6262
template <unsigned char residual> // 0..32
63-
float INT8_InnerProductSIMD32_AVX512F_BW_VL_VNNI(const void *pVect1v, const void *pVect2v,
63+
float INT8_InnerProductSIMD64_AVX512F_BW_VL_VNNI(const void *pVect1v, const void *pVect2v,
6464
size_t dimension) {
6565

6666
return 1 - INT8_InnerProductImp<residual>(pVect1v, pVect2v, dimension);
6767
}
6868
template <unsigned char residual> // 0..32
69-
float INT8_CosineSIMD32_AVX512F_BW_VL_VNNI(const void *pVect1v, const void *pVect2v,
69+
float INT8_CosineSIMD64_AVX512F_BW_VL_VNNI(const void *pVect1v, const void *pVect2v,
7070
size_t dimension) {
7171
float norm_v1 = *(float *)((int8_t *)pVect1v + dimension);
7272
float norm_v2 = *(float *)((int8_t *)pVect2v + dimension);

src/VecSim/spaces/L2/L2_AVX512F_BW_VL_VNNI_INT8.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ static inline void L2SqrStep(int8_t *&pVect1, int8_t *&pVect2, __m512i &sum) {
2424
}
2525

2626
template <unsigned char residual> // 0..64
27-
float INT8_L2SqrSIMD32_AVX512F_BW_VL_VNNI(const void *pVect1v, const void *pVect2v,
27+
float INT8_L2SqrSIMD64_AVX512F_BW_VL_VNNI(const void *pVect1v, const void *pVect2v,
2828
size_t dimension) {
2929
int8_t *pVect1 = (int8_t *)pVect1v;
3030
int8_t *pVect2 = (int8_t *)pVect2v;

src/VecSim/spaces/functions/AVX512F_BW_VL_VNNI.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -15,19 +15,19 @@ namespace spaces {
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1616
dist_func_t<float> Choose_INT8_L2_implementation_AVX512F_BW_VL_VNNI(size_t dim) {
1717
dist_func_t<float> ret_dist_func;
18-
CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 64, INT8_L2SqrSIMD32_AVX512F_BW_VL_VNNI);
18+
CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 64, INT8_L2SqrSIMD64_AVX512F_BW_VL_VNNI);
1919
return ret_dist_func;
2020
}
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dist_func_t<float> Choose_INT8_IP_implementation_AVX512F_BW_VL_VNNI(size_t dim) {
2323
dist_func_t<float> ret_dist_func;
24-
CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 64, INT8_InnerProductSIMD32_AVX512F_BW_VL_VNNI);
24+
CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 64, INT8_InnerProductSIMD64_AVX512F_BW_VL_VNNI);
2525
return ret_dist_func;
2626
}
2727

2828
dist_func_t<float> Choose_INT8_Cosine_implementation_AVX512F_BW_VL_VNNI(size_t dim) {
2929
dist_func_t<float> ret_dist_func;
30-
CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 64, INT8_CosineSIMD32_AVX512F_BW_VL_VNNI);
30+
CHOOSE_IMPLEMENTATION(ret_dist_func, dim, 64, INT8_CosineSIMD64_AVX512F_BW_VL_VNNI);
3131
return ret_dist_func;
3232
}
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