Is IDT setup right ? #81
Closed
macpacheco
started this conversation in
Show and tell
Replies: 1 comment 2 replies
-
|
I believe this is correct. The first 32 entries (0-31) in the IDT are reserved for the CPU exceptions (of which 21 are used). Interrupts from 32 onwards are for hardware devices. I checked memory before and after creating the exception gate stubs and it set INT 0. RDI is cleared to 0 so the first call to create_gate is for gate 0. As a test try to do a divide by 0. Exception 0 should be triggered. You'll see the exception in the serial.log file in sys/ |
Beta Was this translation helpful? Give feedback.
2 replies
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Uh oh!
There was an error while loading. Please reload this page.
-
The original code from 64.asm seems to do this:
The first loop installs gates for INT 32 through INT 1. Skipping INT 0.
The 2nd loop installs gates for INT 21 -> exception_gate_00, INT 20 -> gate_01, ... INT 0 -> exception_gate_21. I think this is reversed.
The following code fixes the 2nd issue.
On the first one, should INT32 be reset ? No setting INT 0 handler at first gets rectified by 2nd loop.
Beta Was this translation helpful? Give feedback.
All reactions