Update i8259x

Author: Ian Seyler

src/drivers/net/i8257x.asm

@@ -220,6 +220,7 @@ net_i8257x_reset_nextdesc:
 ; -----------------------------------------------------------------------------
 ; net_i8257x_transmit - Transmit a packet via an Intel 8257x NIC
 ;  IN:	RSI = Location of packet
+;	RDX = Interface ID
 ;	RCX = Length of packet
 ; OUT:	Nothing
 ; Note:	This driver uses the "legacy format" so TDESC.CMD.DEXT (5) is cleared to 0
@@ -272,6 +273,7 @@ net_i8257x_transmit:
 ; -----------------------------------------------------------------------------
 ; net_i8257x_poll - Polls the Intel 8257x NIC for a received packet
 ;  IN:	RDI = Location to store packet
+;	RDX = Interface ID
 ; OUT:	RCX = Length of packet
 ; Note:	RDESC Descriptor Format:
 ;	First Qword:

src/drivers/net/i8259x.asm

@@ -10,16 +10,29 @@
 ; Initialize an Intel 8259x NIC
 ;  IN:	RDX = Packed Bus address (as per syscalls/bus.asm)
 net_i8259x_init:
+	push rdi
 	push rsi
 	push rdx
 	push rcx
 	push rax
 
+	mov rdi, net_table
+	xor eax, eax
+	mov al, [os_net_icount]
+	shl eax, 7			; Quick multiply by 128
+	add rdi, rax
+
+	mov ax, 0x8259			; Driver tag for i8259x
+	stosw
+	add rdi, 14
+
 	; Get the Base Memory Address of the device
 	mov al, 0			; Read BAR0
 	call os_bus_read_bar
-	mov [os_NetIOBaseMem], rax	; Save it as the base
-	mov [os_NetIOLength], rcx	; Save the length
+	stosq				; Save the base
+	push rax			; Save the base for gathering the MAC later
+	mov rax, rcx
+	stosq				; Save the length
 
 	; Set PCI Status/Command values
 	mov dl, 0x01			; Read Status/Command
@@ -30,29 +43,53 @@ net_i8259x_init:
 	call os_bus_write		; Write updated Status/Command
 
 	; Get the MAC address
-	mov rsi, [os_NetIOBaseMem]
+	pop rsi				; Restore the base
+	sub rdi, 24			; 8 bytes into net table entry
 	mov eax, [rsi+i8259x_RAL]	; RAL
-	mov [os_NetMAC], al
+	stosb
 	shr eax, 8
-	mov [os_NetMAC+1], al
+	stosb
 	shr eax, 8
-	mov [os_NetMAC+2], al
+	stosb
 	shr eax, 8
-	mov [os_NetMAC+3], al
+	stosb
 	mov eax, [rsi+i8259x_RAH]	; RAH
-	mov [os_NetMAC+4], al
+	stosb
 	shr eax, 8
-	mov [os_NetMAC+5], al
+	stosb
+
+	; Set base addresses for TX and RX descriptors
+	xor ecx, ecx
+	mov cl, byte [os_net_icount]
+	shl ecx, 15
+
+	add rdi, 0x22
+	mov rax, os_tx_desc
+	add rax, rcx
+	stosq
+	mov rax, os_rx_desc
+	add rax, rcx
+	stosq
 
 	; Reset the device
+	xor edx, edx
+	mov dl, [os_net_icount]
 	call net_i8259x_reset
 
+	; Store call addresses
+	sub rdi, 0x20
+	mov rax, net_i8259x_transmit
+	stosq
+	mov rax, net_i8259x_poll
+	stosq
+
 net_i8259x_init_error:
 
 	pop rax
 	pop rcx
 	pop rdx
 	pop rsi
+	pop rdi
 	ret
 ; -----------------------------------------------------------------------------
 
@@ -62,10 +99,19 @@ net_i8259x_init_error:
 ;  IN:	Nothing
 ; OUT:	Nothing, all registers preserved
 net_i8259x_reset:
+	push rdi
 	push rsi
 	push rax
 
-	mov rsi, [os_NetIOBaseMem]
+	; Gather Base Address from net_table
+	mov rsi, net_table
+	xor eax, eax
+	mov al, [os_net_icount]
+	shl eax, 7			; Quick multiply by 128
+	add rsi, rax
+	add rsi, 16
+	mov rsi, [rsi]
+	mov rdi, rsi
 
 	; Disable Interrupts (4.6.3.1)
 	xor eax, eax
@@ -138,7 +184,11 @@ net_i8259x_reset_dma_wait:
 	; Create RX descriptors
 	push rdi
 	mov ecx, i8259x_MAX_DESC
+	xor eax, eax
+	mov al, byte [os_net_icount]
+	shl eax, 15
 	mov rdi, os_rx_desc
+	add rdi, rax
 net_i8259x_reset_nextdesc:	
 	mov rax, os_PacketBuffers	; Default packet will go here
 	stosq
@@ -181,7 +231,10 @@ net_i8259x_reset_nextdesc:
 	bts eax, 28			; i8259x_SRRCTL_DROP_EN
 	mov [rsi+i8259x_SRRCTL], eax
 	; Set up RX descriptor ring 0
-	mov rax, os_rx_desc
+	xor eax, eax
+	mov al, byte [os_net_icount]
+	shl eax, 15
+	add rax, os_rx_desc
 	mov [rsi+i8259x_RDBAL], eax
 	shr rax, 32
 	mov [rsi+i8259x_RDBAH], eax
@@ -254,7 +307,10 @@ net_i8259x_init_rx_enable_wait:
 	btc eax, i8259x_RTTDCS_ARBDIS
 	mov [rsi+i8259x_RTTDCS], eax
 	; Set up TX descriptor ring 0
-	mov rax, os_tx_desc
+	xor eax, eax
+	mov al, byte [os_net_icount]
+	shl eax, 15
+	add rax, os_tx_desc
 	mov [rsi+i8259x_TDBAL], eax	; Bits 6:0 are ignored, memory alignment at 128bytes
 	shr rax, 32
 	mov [rsi+i8259x_TDBAH], eax
@@ -288,21 +344,21 @@ net_i8259x_init_tx_enable_wait:
 	; or eax, 0x80000000		; GPIE_PBA_SUPPORT
 	; or eax, 0x40000000		; GPIE_EIAME
 	; mov [rsi+0x00898], eax		; Set Ixgbe_GPIE
-	
+
 	; ; Step 2:-	We don't use the minimum threshold interrupt
-	
+
 	; ; Step 3:-
 	; mov eax, 0x0000FFFF
 	; mov [rsi+i8259x_EIAC], eax
 
 	; ; Step 4:- In our case we prefer to not auto-mask the interrupts
 	; ; TODO- Set EITR
-	
+
 	; ; Step 5:-
 	; mov eax, [rsi+i8259x_EIMS]
 	; or eax, 0x00000001
 	; mov [rsi+i8259x_EIMS], eax
-	
+
 
 ; DEBUG - Enable Promiscuous mode
 	mov eax, [rsi+i8259x_FCTRL]
@@ -316,13 +372,15 @@ net_i8259x_init_tx_enable_wait:
 
 	pop rax
 	pop rsi
+	pop rdi
 	ret
 ; -----------------------------------------------------------------------------
 
 
 ; -----------------------------------------------------------------------------
 ; net_i8259x_transmit - Transmit a packet via an Intel 8259x NIC
 ;  IN:	RSI = Location of packet
+;	RDX = Interface ID
 ;	RCX = Length of packet
 ; OUT:	Nothing
 ; Note:	Transmit Descriptor (TDESC) Layout - Legacy Mode (7.2.3.2.2):
@@ -333,10 +391,10 @@ net_i8259x_transmit:
 	push rdi
 	push rax
 
-	mov rdi, os_tx_desc		; Transmit Descriptor Base Address
+	mov rdi, [rdx+nt_tx_desc]	; Transmit Descriptor Base Address
 
 	; Calculate the descriptor to write to
-	mov eax, [i8259x_tx_lasttail]
+	mov eax, [rdx+nt_tx_head]	; Get tx_lasttail
 	push rax			; Save lasttail
 	shl eax, 4			; Quick multiply by 16
 	add rdi, rax			; Add offset to RDI
@@ -354,8 +412,8 @@ net_i8259x_transmit:
 	pop rax				; Restore lasttail
 	add eax, 1
 	and eax, i8259x_MAX_DESC - 1
-	mov [i8259x_tx_lasttail], eax
-	mov rdi, [os_NetIOBaseMem]
+	mov [rdx+nt_tx_head], eax	; Set tx_lasttail
+	mov rdi, [rdx+nt_base]		; Load the base MMIO of the NIC
 	mov [rdi+i8259x_TDT], eax	; TDL - Transmit Descriptor Tail
 
 	; TDESC.STA.DD (bit 32) should be 1 once the hardware has sent the packet
@@ -369,6 +427,7 @@ net_i8259x_transmit:
 ; -----------------------------------------------------------------------------
 ; net_i8259x_poll - Polls the Intel 8259x NIC for a received packet
 ;  IN:	RDI = Location to store packet
+;	RDX = Interface ID
 ; OUT:	RCX = Length of packet
 ; Note: Receive Descriptor (RDESC) Layout - Legacy Mode (7.1.5):
 ;	Bits 63:0 - Buffer Address
@@ -379,11 +438,11 @@ net_i8259x_poll:
 	push rsi			; Used for the base MMIO of the NIC
 	push rax
 
-	mov rdi, os_rx_desc
-	mov rsi, [os_NetIOBaseMem]	; Load the base MMIO of the NIC
+	mov rdi, [rdx+nt_rx_desc]
+	mov rsi, [rdx+nt_base]		; Load the base MMIO of the NIC
 
 	; Calculate the descriptor to read from
-	mov eax, [i8259x_rx_lasthead]
+	mov eax, [rdx+nt_rx_head]	; Get rx_lasthead
 	shl eax, 4			; Quick multiply by 16
 	add eax, 8			; Offset to bytes received
 	add rdi, rax			; Add offset to RDI
@@ -397,10 +456,11 @@ net_i8259x_poll:
 	stosq				; Clear the descriptor length and status
 
 	; Increment i8259x_rx_lasthead and the Receive Descriptor Tail
-	mov eax, [i8259x_rx_lasthead]
+	mov eax, [rdx+nt_rx_head]	; Get rx_lasthead
 	add eax, 1
 	and eax, i8259x_MAX_DESC - 1
-	mov [i8259x_rx_lasthead], eax
+	mov [rdx+nt_rx_head], eax	; Set rx_lasthead
+
 	mov eax, [rsi+i8259x_RDT]	; Read the current Receive Descriptor Tail
 	add eax, 1			; Add 1 to the Receive Descriptor Tail
 	and eax, i8259x_MAX_DESC - 1
@@ -420,10 +480,6 @@ net_i8259x_poll_end:
 ; -----------------------------------------------------------------------------
 
 
-; Variables
-i8259x_tx_lasttail: dd 0
-i8259x_rx_lasthead: dd 0
-
 ; Constants
 i8259x_MAX_PKT_SIZE	equ 16384
 i8259x_MAX_DESC		equ 4096	; Must be 16, 32, 64, 128, etc.