@@ -220,7 +220,7 @@ net_i8254x_transmit:
220220 mov rdi , os_tx_desc ; Transmit Descriptor Base Address
221221
222222 ; Calculate the descriptor to write to
223- mov eax , [ rdx + 0x30 ] ; Get tx_lasttail
223+ mov eax , [ rdx + nt_tx_head ] ; Get tx_lasttail
224224 push rax ; Save lasttail
225225 shl eax , 4 ; Quick multiply by 16
226226 add rdi , rax ; Add offset to RDI
@@ -238,8 +238,8 @@ net_i8254x_transmit:
238238 pop rax ; Restore lasttail
239239 add eax , 1
240240 and eax , i8254x_MAX_DESC - 1
241- mov [ rdx + 0x30 ], eax ; Set tx_lasttail
242- mov rdi , [ rdx + 0x10 ] ; Load the base MMIO of the NIC
241+ mov [ rdx + nt_tx_head ], eax ; Set tx_lasttail
242+ mov rdi , [ rdx + nt_base ] ; Load the base MMIO of the NIC
243243 mov [ rdi + i8254x_TDT ], eax ; TDL - Transmit Descriptor Tail
244244
245245 pop rax
@@ -268,10 +268,10 @@ net_i8254x_poll:
268268 push rax
269269
270270 mov rdi , os_rx_desc
271- mov rsi , [ rdx + 0x10 ] ; Load the base MMIO of the NIC
271+ mov rsi , [ rdx + nt_base ] ; Load the base MMIO of the NIC
272272
273273 ; Calculate the descriptor to read from
274- mov eax , [ rdx + 0x34 ] ; Get rx_lasthead
274+ mov eax , [ rdx + nt_rx_head ] ; Get rx_lasthead
275275 shl eax , 4 ; Quick multiply by 16
276276 add eax , 8 ; Offset to bytes received
277277 add rdi , rax ; Add offset to RDI
@@ -285,10 +285,10 @@ net_i8254x_poll:
285285 stosq ; Clear the descriptor length and status
286286
287287 ; Increment i8254x_rx_lasthead and the Receive Descriptor Tail
288- mov eax , [ rdx + 0x34 ] ; Get rx_lasthead
288+ mov eax , [ rdx + nt_rx_head ] ; Get rx_lasthead
289289 add eax , 1
290290 and eax , i8254x_MAX_DESC - 1
291- mov [ rdx + 0x34 ], eax ; Set rx_lasthead
291+ mov [ rdx + nt_rx_head ], eax ; Set rx_lasthead
292292
293293 mov eax , [ rsi + i8254x_RDT ] ; Read the current Receive Descriptor Tail
294294 add eax , 1 ; Add 1 to the Receive Descriptor Tail
0 commit comments