Store values from CPUID

Author: Ian Seyler

docs/README.md

@@ -168,11 +168,14 @@ The Pure64 information table is located at `0x0000000000005000` and ends at `0x0
 <table border="1" cellpadding="2" cellspacing="0">
 <tr><th>Memory Address</th><th>Variable Size</th><th>Name</th><th>Description</th></tr>
 <tr><td>0x5000</td><td>64-bit</td><td>ACPI</td><td>Address of the ACPI tables</td></tr>
-<tr><td>0x5008</td><td>32-bit</td><td>BSP_ID</td><td>APIC ID of the BSP</td></tr>
-<tr><td>0x5010</td><td>16-bit</td><td>CPUSPEED</td><td>Speed of the CPUs in MegaHertz (<a href="http://en.wikipedia.org/wiki/Hertz">MHz</a>)</td></tr>
-<tr><td>0x5012</td><td>16-bit</td><td>CORES_ACTIVE</td><td>The number of CPU cores that were activated in the system</td></tr>
-<tr><td>0x5014</td><td>16-bit</td><td>CORES_DETECT</td><td>The number of CPU cores that were detected in the system</td></tr>
-<tr><td>0x5016 - 0x501F</td><td>&nbsp;</td><td>&nbsp;</td><td>For future use</td></tr>
+<tr><td>0x5008</td><td>32-bit</td><td>CPU_BSP_ID</td><td>APIC ID of the BSP</td></tr>
+<tr><td>0x5010</td><td>16-bit</td><td>CPU_SPEED</td><td>Speed of the CPUs in MegaHertz (<a href="http://en.wikipedia.org/wiki/Hertz">MHz</a>)</td></tr>
+<tr><td>0x5012</td><td>16-bit</td><td>CPU_CORES_ACTIVE</td><td>The number of CPU cores that were activated in the system</td></tr>
+<tr><td>0x5014</td><td>16-bit</td><td>CPU_CORES_DETECT</td><td>The number of CPU cores that were detected in the system</td></tr>
+<tr><td>0x5016</td><td>8-bit</td><td>CPU_MEM_PHYSICAL</td><td>The number of bits that are valid for a physical address</td></tr>
+<tr><td>0x5017</td><td>8-bit</td><td>CPU_MEM_VIRTUAL</td><td>The number of bits that are valid for a virtual address</td></tr>
+<tr><td>0x5018</td><td>32-bit</td><td>CPU_ID_MAX_STANDARD</td><td>The maximum CPUID standard leaf</td></tr>
+<tr><td>0x501C</td><td>32-bit</td><td>CPU_ID_MAX_EXTENDED</td><td>The maximum CPUID extended leaf</td></tr>
 <tr><td>0x5020</td><td>32-bit</td><td>RAMAMOUNT</td><td>Amount of system RAM in Mebibytes (<a href="http://en.wikipedia.org/wiki/Mebibyte">MiB</a>)</td></tr>
 <tr><td>0x5022 - 0x502F</td><td>&nbsp;</td><td>&nbsp;</td><td>For future use</td></tr>
 <tr><td>0x5030</td><td>8-bit</td><td>IOAPIC_COUNT</td><td>Number of I/O APICs in the system</td></tr>

src/pure64.asm

@@ -746,6 +746,20 @@ pde_end:
 	mov ax, [p_cpu_detected]
 	stosw
 
+	mov di, 0x5018
+	xor eax, eax
+	cpuid
+	stosd				; Store maximum supported CPUID standard level
+	mov eax, 0x80000000
+	cpuid
+	stosd				; Store maximum supported CPUID extended level
+	cmp eax, 0x80000008
+	jb no_address_size
+	mov eax, 0x80000008
+	cpuid
+	mov [0x5016], ax		; Store virtual/physical address bits
+no_address_size:
+
 	mov di, 0x5020
 	mov eax, [p_mem_amount]
 	and eax, 0xFFFFFFFE