[SLP][NFC]Replace more unreachable terminators by rets, NFC

Author: alexey-bataev

llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll

@@ -4,7 +4,7 @@
 @bar = external global [4 x [4 x i32]], align 4
 @dct_luma = external global [4 x [4 x i32]], align 4
 
-define void @foo() local_unnamed_addr {
+define void @foo() {
 ; CHECK-LABEL: @foo(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[ADD277:%.*]] = add nsw i32 undef, undef
@@ -18,7 +18,7 @@ define void @foo() local_unnamed_addr {
 ; CHECK-NEXT:    [[TMP5:%.*]] = add nsw <4 x i32> [[TMP3]], [[TMP4]]
 ; CHECK-NEXT:    [[TMP6:%.*]] = ashr <4 x i32> [[TMP5]], <i32 6, i32 6, i32 6, i32 6>
 ; CHECK-NEXT:    store <4 x i32> [[TMP6]], ptr [[ARRAYIDX372]], align 4
-; CHECK-NEXT:    unreachable
+; CHECK-NEXT:    ret void
 ;
 entry:
   %add277 = add nsw i32 undef, undef
@@ -42,5 +42,5 @@ entry:
   %shr.i.3 = ashr i32 %sub355.3, 6
   %arrayidx372.3 = getelementptr inbounds [4 x [4 x i32]], ptr @dct_luma, i64 0, i64 3, i64 3
   store i32 %shr.i.3, ptr %arrayidx372.3, align 4
-  unreachable
+  ret void
 }

llvm/test/Transforms/SLPVectorizer/X86/crash_smallpt.ll

@@ -32,7 +32,7 @@ define void @main() {
 ; CHECK-NEXT:    store <2 x double> [[TMP3]], ptr undef, align 8
 ; CHECK-NEXT:    [[TMP4:%.*]] = fmul <2 x double> <double 2.000000e-01, double 3.000000e-01>, [[TMP1]]
 ; CHECK-NEXT:    store <2 x double> [[TMP4]], ptr [[AGG_TMP101211_SROA_0_0_IDX]], align 8
-; CHECK-NEXT:    unreachable
+; CHECK-NEXT:    ret void
 ; CHECK:       cond.true63.us:
 ; CHECK-NEXT:    unreachable
 ; CHECK:       for.body42.lr.ph.us:
@@ -81,7 +81,7 @@ cond.false66.us:
   store double %add4.i246.us, ptr %agg.tmp99208.sroa.1.8.idx388, align 8
   store double %mul.i.i.us, ptr %agg.tmp101211.sroa.0.0.idx, align 8
   store double %mul2.i.i.us, ptr %agg.tmp101211.sroa.1.8.idx390, align 8
-  unreachable
+  ret void
 
 cond.true63.us:
   unreachable

llvm/test/Transforms/SLPVectorizer/X86/extractelement-single-use-many-nodes.ll

@@ -41,7 +41,7 @@ define void @foo(double %i) {
 ; CHECK-NEXT:    [[OP_RDX1:%.*]] = select i1 [[OP_RDX]], i32 [[TMP31]], i32 32000
 ; CHECK-NEXT:    [[I163:%.*]] = fcmp ogt double [[I118]], 0.000000e+00
 ; CHECK-NEXT:    [[I164:%.*]] = icmp slt i32 0, [[OP_RDX1]]
-; CHECK-NEXT:    unreachable
+; CHECK-NEXT:    ret void
 ; CHECK:       bb58:
 ; CHECK-NEXT:    ret void
 ;
@@ -134,7 +134,7 @@ bb115:
   %i159 = select i1 %i158, i32 %i157, i32 %i152
   %i163 = fcmp ogt double %i118, 0.000000e+00
   %i164 = icmp slt i32 0, %i159
-  unreachable
+  ret void
 
 bb58:
   ret void

llvm/test/Transforms/SLPVectorizer/X86/resched.ll

@@ -31,7 +31,7 @@ define fastcc void @_ZN12_GLOBAL__N_127PolynomialMultiplyRecognize9recognizeEv()
 ; CHECK-NEXT:    [[TMP16:%.*]] = call <16 x i8> @llvm.vector.insert.v16i8.v2i8(<16 x i8> [[TMP14]], <2 x i8> [[TMP15]], i64 2)
 ; CHECK-NEXT:    [[TMP17:%.*]] = and <16 x i8> [[TMP16]], <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
 ; CHECK-NEXT:    store <16 x i8> [[TMP17]], ptr undef, align 1
-; CHECK-NEXT:    unreachable
+; CHECK-NEXT:    ret void
 ; CHECK:       if.end50.i:
 ; CHECK-NEXT:    ret void
 ;
@@ -119,7 +119,7 @@ if.then22.i:                                      ; preds = %entry
   %conv.15.i.i = and i8 %15, 1
   %arrayidx.i.i7.15.i.i = getelementptr inbounds %"struct.std::array", ptr undef, i64 0, i32 0, i64 15
   store i8 %conv.15.i.i, ptr %arrayidx.i.i7.15.i.i, align 1
-  unreachable
+  ret void
 
 if.end50.i:                                       ; preds = %entry
   ret void