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ardbiesheuvelbp3tk0v
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x86/decompressor: Assign paging related global variables earlier
There is no need to defer the assignment of the paging related global variables 'pgdir_shift' and 'ptrs_per_p4d' until after the trampoline is cleaned up, so assign them as soon as it is clear that 5-level paging will be enabled. Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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+5
-11
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2 files changed

+5
-11
lines changed

arch/x86/boot/compressed/misc.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -179,9 +179,7 @@ static inline int count_immovable_mem_regions(void) { return 0; }
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#endif
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/* ident_map_64.c */
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#ifdef CONFIG_X86_5LEVEL
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extern unsigned int __pgtable_l5_enabled, pgdir_shift, ptrs_per_p4d;
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#endif
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extern void kernel_add_identity_map(unsigned long start, unsigned long end);
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/* Used by PAGE_KERN* macros: */

arch/x86/boot/compressed/pgtable_64.c

Lines changed: 5 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -130,6 +130,11 @@ struct paging_config paging_prepare(void *rmode)
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native_cpuid_eax(0) >= 7 &&
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(native_cpuid_ecx(7) & (1 << (X86_FEATURE_LA57 & 31)))) {
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paging_config.l5_required = 1;
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/* Initialize variables for 5-level paging */
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__pgtable_l5_enabled = 1;
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pgdir_shift = 48;
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ptrs_per_p4d = 512;
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}
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paging_config.trampoline_start = find_trampoline_placement();
@@ -206,13 +211,4 @@ void cleanup_trampoline(void *pgtable)
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/* Restore trampoline memory */
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memcpy(trampoline_32bit, trampoline_save, TRAMPOLINE_32BIT_SIZE);
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/* Initialize variables for 5-level paging */
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#ifdef CONFIG_X86_5LEVEL
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if (__read_cr4() & X86_CR4_LA57) {
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__pgtable_l5_enabled = 1;
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pgdir_shift = 48;
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ptrs_per_p4d = 512;
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}
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#endif
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}

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