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Merge tag 'soc-fixes-6.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC fixes from Arnd Bergmann: "These all address issues in devicetree files: - The Rockchip rk3588j are now limited the same way as the vendor kernel, to allow room for the industrial-grade temperature ranges. - Seven more Rockchip fixes address minor issues with specific boards - Invalid clk controller references in multiple amlogic chips, plus one accidentally disabled audio on clock - Two devicetree fixes for i.MX8MP boards, both for incorrect regulator settings - A power domain change for apple laptop touchbar, fixing suspend/resume problems - An incorrect DMA controller setting for sophgo cv18xx chips" * tag 'soc-fixes-6.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: arm64: dts: amazon: Fix simple-bus node name schema warnings MAINTAINERS: delete email for Shiraz Hashim arm64: dts: imx8mp-var-som: Fix LDO5 shutdown causing SD card timeout arm64: dts: imx8mp: use 800MHz NoC OPP for nominal drive mode arm64: dts: amlogic: dreambox: fix missing clkc_audio node riscv: dts: sophgo: fix DMA data-width configuration for CV18xx arm64: dts: rockchip: fix Sige5 RTC interrupt pin arm64: dts: rockchip: Assign RT5616 MCLK rate on rk3588-friendlyelec-cm3588 arm64: dts: rockchip: Align wifi node name with bindings in CB2 arm64: dts: amlogic: g12: fix reference to unknown/untested PWM clock arm64: dts: amlogic: gx: fix reference to unknown/untested PWM clock ARM: dts: amlogic: meson8b: fix reference to unknown/untested PWM clock ARM: dts: amlogic: meson8: fix reference to unknown/untested PWM clock arm64: dts: apple: touchbar: Mark ps_dispdfr_be as always-on mailmap: Update email for Asahi Lina arm64: dts: rockchip: Fix mmc-pwrseq clock name on rock-pi-4 arm64: dts: rockchip: Use "regulator-fixed" for btreg on px30-engicam for vcc3v3-btreg arm64: dts: rockchip: Add pinmuxing for eMMC on QNAP TS433 arm64: dts: rockchip: Remove overdrive-mode OPPs from RK3588J SoC dtsi arm64: dts: rockchip: Allow Turing RK1 cooling fan to spin down
2 parents 9f35e33 + 15eaaa7 commit 00f281f

26 files changed

+93
-63
lines changed

.mailmap

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Original file line numberDiff line numberDiff line change
@@ -102,6 +102,7 @@ Ard Biesheuvel <[email protected]> <[email protected]>
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Arnaud Patard <[email protected]>
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Arnd Bergmann <[email protected]>
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Arun Kumar Neelakantam <[email protected]> <[email protected]>
105+
105106
Ashok Raj Nagarajan <[email protected]> <[email protected]>
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107108

MAINTAINERS

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@@ -22916,7 +22916,6 @@ F: drivers/accessibility/speakup/
2291622916

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SPEAR PLATFORM/CLOCK/PINCTRL SUPPORT
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M: Viresh Kumar <[email protected]>
22919-
M: Shiraz Hashim <[email protected]>
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L: [email protected] (moderated for non-subscribers)
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S: Maintained

arch/arm/boot/dts/amlogic/meson8.dtsi

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -451,7 +451,7 @@
451451
pwm_ef: pwm@86c0 {
452452
compatible = "amlogic,meson8-pwm-v2";
453453
clocks = <&xtal>,
454-
<>, /* unknown/untested, the datasheet calls it "Video PLL" */
454+
<0>, /* unknown/untested, the datasheet calls it "Video PLL" */
455455
<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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reg = <0x86c0 0x10>;
@@ -705,15 +705,15 @@
705705
&pwm_ab {
706706
compatible = "amlogic,meson8-pwm-v2";
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clocks = <&xtal>,
708-
<>, /* unknown/untested, the datasheet calls it "Video PLL" */
708+
<0>, /* unknown/untested, the datasheet calls it "Video PLL" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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};
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&pwm_cd {
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compatible = "amlogic,meson8-pwm-v2";
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clocks = <&xtal>,
716-
<>, /* unknown/untested, the datasheet calls it "Video PLL" */
716+
<0>, /* unknown/untested, the datasheet calls it "Video PLL" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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};

arch/arm/boot/dts/amlogic/meson8b.dtsi

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -406,7 +406,7 @@
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compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x86c0 0x10>;
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clocks = <&xtal>,
409-
<>, /* unknown/untested, the datasheet calls it "Video PLL" */
409+
<0>, /* unknown/untested, the datasheet calls it "Video PLL" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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#pwm-cells = <3>;
@@ -680,15 +680,15 @@
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&pwm_ab {
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compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";
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clocks = <&xtal>,
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<>, /* unknown/untested, the datasheet calls it "Video PLL" */
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<0>, /* unknown/untested, the datasheet calls it "Video PLL" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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};
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&pwm_cd {
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compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";
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clocks = <&xtal>,
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<>, /* unknown/untested, the datasheet calls it "Video PLL" */
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<0>, /* unknown/untested, the datasheet calls it "Video PLL" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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};

arch/arm64/boot/dts/amazon/alpine-v2.dtsi

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@@ -151,7 +151,7 @@
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al,msi-num-spis = <160>;
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};
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154-
io-fabric@fc000000 {
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io-bus@fc000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;

arch/arm64/boot/dts/amazon/alpine-v3.dtsi

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@@ -361,7 +361,7 @@
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interrupt-parent = <&gic>;
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};
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364-
io-fabric@fc000000 {
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io-bus@fc000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;

arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2313,7 +2313,7 @@
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"amlogic,meson8-pwm-v2";
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reg = <0x0 0x19000 0x0 0x20>;
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clocks = <&xtal>,
2316-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
2316+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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#pwm-cells = <3>;
@@ -2325,7 +2325,7 @@
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"amlogic,meson8-pwm-v2";
23262326
reg = <0x0 0x1a000 0x0 0x20>;
23272327
clocks = <&xtal>,
2328-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
2328+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
23292329
<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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#pwm-cells = <3>;
@@ -2337,7 +2337,7 @@
23372337
"amlogic,meson8-pwm-v2";
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reg = <0x0 0x1b000 0x0 0x20>;
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clocks = <&xtal>,
2340-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
2340+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
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<&clkc CLKID_FCLK_DIV4>,
23422342
<&clkc CLKID_FCLK_DIV3>;
23432343
#pwm-cells = <3>;

arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi

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Original file line numberDiff line numberDiff line change
@@ -116,6 +116,10 @@
116116
status = "okay";
117117
};
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119+
&clkc_audio {
120+
status = "okay";
121+
};
122+
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&frddr_a {
120124
status = "okay";
121125
};

arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi

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Original file line numberDiff line numberDiff line change
@@ -741,7 +741,7 @@
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&pwm_ab {
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clocks = <&xtal>,
744-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
744+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
745745
<&clkc CLKID_FCLK_DIV4>,
746746
<&clkc CLKID_FCLK_DIV3>;
747747
};
@@ -752,14 +752,14 @@
752752

753753
&pwm_cd {
754754
clocks = <&xtal>,
755-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
755+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
756756
<&clkc CLKID_FCLK_DIV4>,
757757
<&clkc CLKID_FCLK_DIV3>;
758758
};
759759

760760
&pwm_ef {
761761
clocks = <&xtal>,
762-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
762+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
763763
<&clkc CLKID_FCLK_DIV4>,
764764
<&clkc CLKID_FCLK_DIV3>;
765765
};

arch/arm64/boot/dts/amlogic/meson-gxl.dtsi

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -811,7 +811,7 @@
811811

812812
&pwm_ab {
813813
clocks = <&xtal>,
814-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
814+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
815815
<&clkc CLKID_FCLK_DIV4>,
816816
<&clkc CLKID_FCLK_DIV3>;
817817
};
@@ -822,14 +822,14 @@
822822

823823
&pwm_cd {
824824
clocks = <&xtal>,
825-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
825+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
826826
<&clkc CLKID_FCLK_DIV4>,
827827
<&clkc CLKID_FCLK_DIV3>;
828828
};
829829

830830
&pwm_ef {
831831
clocks = <&xtal>,
832-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
832+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
833833
<&clkc CLKID_FCLK_DIV4>,
834834
<&clkc CLKID_FCLK_DIV3>;
835835
};

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