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Commit 02c35dc

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Roger QuadrosTero Kristo
authored andcommitted
arm64: dts: ti: k3-j721e: Enable Super-Speed support for USB0
USB0 supports super-speed mode on the EVM. Enable that. On the EVM, USB0 uses SERDES3 for super-speed lane. Since USB0 is a type-C port, it needs to support lane swapping for cable flip support. This is provided using SERDES lane swap feature. Provide the Type-C cable orientation GPIO to the SERDES Wrapper driver. Signed-off-by: Roger Quadros <[email protected]> Signed-off-by: Sekhar Nori <[email protected]> Signed-off-by: Tero Kristo <[email protected]>
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arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts

Lines changed: 30 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -109,6 +109,7 @@
109109
main_usbss0_pins_default: main_usbss0_pins_default {
110110
pinctrl-single,pins = <
111111
J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */
112+
J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */
112113
>;
113114
};
114115

@@ -398,16 +399,43 @@
398399
status = "disabled";
399400
};
400401

402+
&usb_serdes_mux {
403+
idle-states = <1>, <0>; /* USB0 to SERDES3, USB1 to SERDES1 */
404+
};
405+
406+
&serdes_ln_ctrl {
407+
idle-states = <SERDES0_LANE0_PCIE0_LANE0>, <SERDES0_LANE1_PCIE0_LANE1>,
408+
<SERDES1_LANE0_PCIE1_LANE0>, <SERDES1_LANE1_PCIE1_LANE1>,
409+
<SERDES2_LANE0_PCIE2_LANE0>, <SERDES2_LANE1_PCIE2_LANE1>,
410+
<SERDES3_LANE0_USB3_0_SWAP>, <SERDES3_LANE1_USB3_0>,
411+
<SERDES4_LANE0_EDP_LANE0>, <SERDES4_LANE1_EDP_LANE1>, <SERDES4_LANE2_EDP_LANE2>, <SERDES4_LANE3_EDP_LANE3>;
412+
};
413+
414+
&serdes_wiz3 {
415+
typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_HIGH>;
416+
};
417+
418+
&serdes3 {
419+
serdes3_usb_link: link@0 {
420+
reg = <0>;
421+
cdns,num-lanes = <2>;
422+
#phy-cells = <0>;
423+
cdns,phy-type = <PHY_TYPE_USB3>;
424+
resets = <&serdes_wiz3 1>, <&serdes_wiz3 2>;
425+
};
426+
};
427+
401428
&usbss0 {
402429
pinctrl-names = "default";
403430
pinctrl-0 = <&main_usbss0_pins_default>;
404-
ti,usb2-only;
405431
ti,vbus-divider;
406432
};
407433

408434
&usb0 {
409435
dr_mode = "otg";
410-
maximum-speed = "high-speed";
436+
maximum-speed = "super-speed";
437+
phys = <&serdes3_usb_link>;
438+
phy-names = "cdns3,usb3-phy";
411439
};
412440

413441
&usbss1 {

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