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avpatelpalmer-dabbelt
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clocksource/drivers/timer-riscv: Use per-CPU timer interrupt
Instead of directly calling RISC-V timer interrupt handler from RISC-V local interrupt conntroller driver, this patch implements RISC-V timer interrupt as a per-CPU interrupt using per-CPU APIs of Linux IRQ subsystem. Signed-off-by: Anup Patel <[email protected]> Reviewed-by: Atish Patra <[email protected]> Reviewed-by: Marc Zyngier <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
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3 files changed

+40
-13
lines changed

3 files changed

+40
-13
lines changed

arch/riscv/include/asm/irq.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,8 +10,6 @@
1010
#include <linux/interrupt.h>
1111
#include <linux/linkage.h>
1212

13-
void riscv_timer_interrupt(void);
14-
1513
#include <asm-generic/irq.h>
1614

1715
#endif /* _ASM_RISCV_IRQ_H */

drivers/clocksource/timer-riscv.c

Lines changed: 40 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -12,8 +12,11 @@
1212
#include <linux/cpu.h>
1313
#include <linux/delay.h>
1414
#include <linux/irq.h>
15+
#include <linux/irqdomain.h>
1516
#include <linux/sched_clock.h>
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#include <linux/io-64-nonatomic-lo-hi.h>
18+
#include <linux/interrupt.h>
19+
#include <linux/of_irq.h>
1720
#include <asm/smp.h>
1821
#include <asm/sbi.h>
1922

@@ -39,6 +42,7 @@ static int riscv_clock_next_event(unsigned long delta,
3942
return 0;
4043
}
4144

45+
static unsigned int riscv_clock_event_irq;
4246
static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = {
4347
.name = "riscv_timer_clockevent",
4448
.features = CLOCK_EVT_FEAT_ONESHOT,
@@ -74,30 +78,36 @@ static int riscv_timer_starting_cpu(unsigned int cpu)
7478
struct clock_event_device *ce = per_cpu_ptr(&riscv_clock_event, cpu);
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7680
ce->cpumask = cpumask_of(cpu);
81+
ce->irq = riscv_clock_event_irq;
7782
clockevents_config_and_register(ce, riscv_timebase, 100, 0x7fffffff);
7883

79-
csr_set(CSR_IE, IE_TIE);
84+
enable_percpu_irq(riscv_clock_event_irq,
85+
irq_get_trigger_type(riscv_clock_event_irq));
8086
return 0;
8187
}
8288

8389
static int riscv_timer_dying_cpu(unsigned int cpu)
8490
{
85-
csr_clear(CSR_IE, IE_TIE);
91+
disable_percpu_irq(riscv_clock_event_irq);
8692
return 0;
8793
}
8894

8995
/* called directly from the low-level interrupt handler */
90-
void riscv_timer_interrupt(void)
96+
static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id)
9197
{
9298
struct clock_event_device *evdev = this_cpu_ptr(&riscv_clock_event);
9399

94100
csr_clear(CSR_IE, IE_TIE);
95101
evdev->event_handler(evdev);
102+
103+
return IRQ_HANDLED;
96104
}
97105

98106
static int __init riscv_timer_init_dt(struct device_node *n)
99107
{
100108
int cpuid, hartid, error;
109+
struct device_node *child;
110+
struct irq_domain *domain;
101111

102112
hartid = riscv_of_processor_hartid(n);
103113
if (hartid < 0) {
@@ -115,6 +125,25 @@ static int __init riscv_timer_init_dt(struct device_node *n)
115125
if (cpuid != smp_processor_id())
116126
return 0;
117127

128+
domain = NULL;
129+
child = of_get_compatible_child(n, "riscv,cpu-intc");
130+
if (!child) {
131+
pr_err("Failed to find INTC node [%pOF]\n", n);
132+
return -ENODEV;
133+
}
134+
domain = irq_find_host(child);
135+
of_node_put(child);
136+
if (!domain) {
137+
pr_err("Failed to find IRQ domain for node [%pOF]\n", n);
138+
return -ENODEV;
139+
}
140+
141+
riscv_clock_event_irq = irq_create_mapping(domain, RV_IRQ_TIMER);
142+
if (!riscv_clock_event_irq) {
143+
pr_err("Failed to map timer interrupt for node [%pOF]\n", n);
144+
return -ENODEV;
145+
}
146+
118147
pr_info("%s: Registering clocksource cpuid [%d] hartid [%d]\n",
119148
__func__, cpuid, hartid);
120149
error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
@@ -126,6 +155,14 @@ static int __init riscv_timer_init_dt(struct device_node *n)
126155

127156
sched_clock_register(riscv_sched_clock, 64, riscv_timebase);
128157

158+
error = request_percpu_irq(riscv_clock_event_irq,
159+
riscv_timer_interrupt,
160+
"riscv-timer", &riscv_clock_event);
161+
if (error) {
162+
pr_err("registering percpu irq failed [%d]\n", error);
163+
return error;
164+
}
165+
129166
error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
130167
"clockevents/riscv/timer:starting",
131168
riscv_timer_starting_cpu, riscv_timer_dying_cpu);

drivers/irqchip/irq-riscv-intc.c

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -21,20 +21,12 @@ static struct irq_domain *intc_domain;
2121

2222
static asmlinkage void riscv_intc_irq(struct pt_regs *regs)
2323
{
24-
struct pt_regs *old_regs;
2524
unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG;
2625

2726
if (unlikely(cause >= BITS_PER_LONG))
2827
panic("unexpected interrupt cause");
2928

3029
switch (cause) {
31-
case RV_IRQ_TIMER:
32-
old_regs = set_irq_regs(regs);
33-
irq_enter();
34-
riscv_timer_interrupt();
35-
irq_exit();
36-
set_irq_regs(old_regs);
37-
break;
3830
#ifdef CONFIG_SMP
3931
case RV_IRQ_SOFT:
4032
/*

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