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dt-bindings: riscv: add Zve32[xf] Zve64[xfd] ISA extension description
Add description for Zve32x Zve32f Zve64x Zve64f Zve64d ISA extensions. Signed-off-by: Andy Chiu <[email protected]> Acked-by: Conor Dooley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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Documentation/devicetree/bindings/riscv/extensions.yaml

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@@ -381,6 +381,36 @@ properties:
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instructions, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zve32f
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description:
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The standard Zve32f extension for embedded processors, as ratified
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in commit 6f702a2 ("Vector extensions are now ratified") of
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riscv-v-spec.
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- const: zve32x
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description:
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The standard Zve32x extension for embedded processors, as ratified
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in commit 6f702a2 ("Vector extensions are now ratified") of
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riscv-v-spec.
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- const: zve64d
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description:
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The standard Zve64d extension for embedded processors, as ratified
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in commit 6f702a2 ("Vector extensions are now ratified") of
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riscv-v-spec.
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- const: zve64f
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description:
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The standard Zve64f extension for embedded processors, as ratified
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in commit 6f702a2 ("Vector extensions are now ratified") of
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riscv-v-spec.
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- const: zve64x
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description:
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The standard Zve64x extension for embedded processors, as ratified
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in commit 6f702a2 ("Vector extensions are now ratified") of
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riscv-v-spec.
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- const: zvfh
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description:
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The standard Zvfh extension for vectored half-precision

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