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#define STM32_RTC_CR_ALRAE BIT(8)
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#define STM32_RTC_CR_ALRAIE BIT(12)
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#define STM32_RTC_CR_OSEL GENMASK(22, 21)
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+ #define STM32_RTC_CR_OSEL_ALARM_A FIELD_PREP(STM32_RTC_CR_OSEL, 0x01)
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#define STM32_RTC_CR_COE BIT(23)
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#define STM32_RTC_CR_TAMPOE BIT(26)
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+ #define STM32_RTC_CR_TAMPALRM_TYPE BIT(30)
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#define STM32_RTC_CR_OUT2EN BIT(31)
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/* STM32_RTC_ISR/STM32_RTC_ICSR bit fields */
@@ -158,6 +160,7 @@ struct stm32_rtc_data {
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bool need_accuracy ;
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bool rif_protected ;
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bool has_lsco ;
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+ bool has_alarm_out ;
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};
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struct stm32_rtc {
@@ -245,6 +248,47 @@ struct stm32_rtc_pinmux_func {
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int (* action )(struct pinctrl_dev * pctl_dev , unsigned int pin );
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};
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+ static int stm32_rtc_pinmux_action_alarm (struct pinctrl_dev * pctldev , unsigned int pin )
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+ {
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+ struct stm32_rtc * rtc = pinctrl_dev_get_drvdata (pctldev );
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+ struct stm32_rtc_registers regs = rtc -> data -> regs ;
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+ unsigned int cr = readl_relaxed (rtc -> base + regs .cr );
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+ unsigned int cfgr = readl_relaxed (rtc -> base + regs .cfgr );
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+
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+ if (!rtc -> data -> has_alarm_out )
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+ return - EPERM ;
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+
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+ cr &= ~STM32_RTC_CR_OSEL ;
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+ cr |= STM32_RTC_CR_OSEL_ALARM_A ;
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+ cr &= ~STM32_RTC_CR_TAMPOE ;
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+ cr &= ~STM32_RTC_CR_COE ;
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+ cr &= ~STM32_RTC_CR_TAMPALRM_TYPE ;
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+
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+ switch (pin ) {
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+ case OUT1 :
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+ cr &= ~STM32_RTC_CR_OUT2EN ;
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+ cfgr &= ~STM32_RTC_CFGR_OUT2_RMP ;
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+ break ;
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+ case OUT2 :
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+ cr |= STM32_RTC_CR_OUT2EN ;
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+ cfgr &= ~STM32_RTC_CFGR_OUT2_RMP ;
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+ break ;
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+ case OUT2_RMP :
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+ cr |= STM32_RTC_CR_OUT2EN ;
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+ cfgr |= STM32_RTC_CFGR_OUT2_RMP ;
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+ break ;
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+ default :
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+ return - EINVAL ;
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+ }
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+
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+ stm32_rtc_wpr_unlock (rtc );
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+ writel_relaxed (cr , rtc -> base + regs .cr );
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+ writel_relaxed (cfgr , rtc -> base + regs .cfgr );
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+ stm32_rtc_wpr_lock (rtc );
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+
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+ return 0 ;
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+ }
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+
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static int stm32_rtc_pinmux_lsco_available (struct pinctrl_dev * pctldev , unsigned int pin )
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{
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struct stm32_rtc * rtc = pinctrl_dev_get_drvdata (pctldev );
@@ -307,6 +351,7 @@ static int stm32_rtc_pinmux_action_lsco(struct pinctrl_dev *pctldev, unsigned in
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static const struct stm32_rtc_pinmux_func stm32_rtc_pinmux_functions [] = {
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STM32_RTC_PINMUX ("lsco" , & stm32_rtc_pinmux_action_lsco , "out1" , "out2_rmp" ),
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+ STM32_RTC_PINMUX ("alarm-a" , & stm32_rtc_pinmux_action_alarm , "out1" , "out2" , "out2_rmp" ),
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};
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static int stm32_rtc_pinmux_get_functions_count (struct pinctrl_dev * pctldev )
@@ -763,6 +808,7 @@ static const struct stm32_rtc_data stm32_rtc_data = {
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.need_accuracy = false,
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.rif_protected = false,
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.has_lsco = false,
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+ .has_alarm_out = false,
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.regs = {
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.tr = 0x00 ,
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.dr = 0x04 ,
@@ -788,6 +834,7 @@ static const struct stm32_rtc_data stm32h7_rtc_data = {
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.need_accuracy = false,
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.rif_protected = false,
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.has_lsco = false,
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+ .has_alarm_out = false,
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.regs = {
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.tr = 0x00 ,
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.dr = 0x04 ,
@@ -822,6 +869,7 @@ static const struct stm32_rtc_data stm32mp1_data = {
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.need_accuracy = true,
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.rif_protected = false,
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.has_lsco = true,
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+ .has_alarm_out = true,
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.regs = {
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.tr = 0x00 ,
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.dr = 0x04 ,
@@ -847,6 +895,7 @@ static const struct stm32_rtc_data stm32mp25_data = {
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.need_accuracy = true,
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.rif_protected = true,
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.has_lsco = true,
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+ .has_alarm_out = true,
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.regs = {
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.tr = 0x00 ,
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.dr = 0x04 ,
@@ -878,6 +927,17 @@ MODULE_DEVICE_TABLE(of, stm32_rtc_of_match);
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static void stm32_rtc_clean_outs (struct stm32_rtc * rtc )
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{
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struct stm32_rtc_registers regs = rtc -> data -> regs ;
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+ unsigned int cr = readl_relaxed (rtc -> base + regs .cr );
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+
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+ cr &= ~STM32_RTC_CR_OSEL ;
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+ cr &= ~STM32_RTC_CR_TAMPOE ;
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+ cr &= ~STM32_RTC_CR_COE ;
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+ cr &= ~STM32_RTC_CR_TAMPALRM_TYPE ;
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+ cr &= ~STM32_RTC_CR_OUT2EN ;
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+
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+ stm32_rtc_wpr_unlock (rtc );
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+ writel_relaxed (cr , rtc -> base + regs .cr );
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+ stm32_rtc_wpr_lock (rtc );
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if (regs .cfgr != UNDEF_REG ) {
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unsigned int cfgr = readl_relaxed (rtc -> base + regs .cfgr );
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