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Mani-Sadhasivambjorn-helgaas
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PCI: dwc: Pass the eDMA mapping format flag directly from glue drivers
Instead of maintaining a separate capability for glue drivers that cannot support auto detection of the eDMA mapping format, pass the mapping format directly from them. This will simplify the code and also allow adding HDMA support that also doesn't support auto detection of mapping format. Suggested-by: Serge Semin <[email protected]> Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Serge Semin <[email protected]> Reviewed-by: Siddharth Vadapalli <[email protected]> Reviewed-by: Yoshihiro Shimoda <[email protected]> Tested-by: Yoshihiro Shimoda <[email protected]>
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drivers/pci/controller/dwc/pcie-designware.c

Lines changed: 9 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -894,18 +894,20 @@ static int dw_pcie_edma_find_mf(struct dw_pcie *pci)
894894
{
895895
u32 val;
896896

897+
/*
898+
* Bail out finding the mapping format if it is already set by the glue
899+
* driver. Also ensure that the edma.reg_base is pointing to a valid
900+
* memory region.
901+
*/
902+
if (pci->edma.mf != EDMA_MF_EDMA_LEGACY)
903+
return pci->edma.reg_base ? 0 : -ENODEV;
904+
897905
/*
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* Indirect eDMA CSRs access has been completely removed since v5.40a
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* thus no space is now reserved for the eDMA channels viewport and
900908
* former DMA CTRL register is no longer fixed to FFs.
901-
*
902-
* Note that Renesas R-Car S4-8's PCIe controllers for unknown reason
903-
* have zeros in the eDMA CTRL register even though the HW-manual
904-
* explicitly states there must FFs if the unrolled mapping is enabled.
905-
* For such cases the low-level drivers are supposed to manually
906-
* activate the unrolled mapping to bypass the auto-detection procedure.
907909
*/
908-
if (dw_pcie_ver_is_ge(pci, 540A) || dw_pcie_cap_is(pci, EDMA_UNROLL))
910+
if (dw_pcie_ver_is_ge(pci, 540A))
909911
val = 0xFFFFFFFF;
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else
911913
val = dw_pcie_readl_dbi(pci, PCIE_DMA_VIEWPORT_BASE + PCIE_DMA_CTRL);

drivers/pci/controller/dwc/pcie-designware.h

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -51,9 +51,8 @@
5151

5252
/* DWC PCIe controller capabilities */
5353
#define DW_PCIE_CAP_REQ_RES 0
54-
#define DW_PCIE_CAP_EDMA_UNROLL 1
55-
#define DW_PCIE_CAP_IATU_UNROLL 2
56-
#define DW_PCIE_CAP_CDM_CHECK 3
54+
#define DW_PCIE_CAP_IATU_UNROLL 1
55+
#define DW_PCIE_CAP_CDM_CHECK 2
5756

5857
#define dw_pcie_cap_is(_pci, _cap) \
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test_bit(DW_PCIE_CAP_ ## _cap, &(_pci)->caps)

drivers/pci/controller/dwc/pcie-rcar-gen4.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -255,7 +255,7 @@ static struct rcar_gen4_pcie *rcar_gen4_pcie_alloc(struct platform_device *pdev)
255255
rcar->dw.ops = &dw_pcie_ops;
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rcar->dw.dev = dev;
257257
rcar->pdev = pdev;
258-
dw_pcie_cap_set(&rcar->dw, EDMA_UNROLL);
258+
rcar->dw.edma.mf = EDMA_MF_EDMA_UNROLL;
259259
dw_pcie_cap_set(&rcar->dw, REQ_RES);
260260
platform_set_drvdata(pdev, rcar);
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