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15 | 15 | "renesas,r9a06g032";
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16 | 16 | };
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17 | 17 |
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| 18 | +&gmac1 { |
| 19 | + pinctrl-0 = <&pins_eth0>, <&pins_mdio0>; |
| 20 | + pinctrl-names = "default"; |
| 21 | + |
| 22 | + status = "okay"; |
| 23 | + phy-mode = "rgmii-id"; |
| 24 | + phy-handle = <&phy_mii0>; |
| 25 | + |
| 26 | + mdio { |
| 27 | + #address-cells = <1>; |
| 28 | + #size-cells = <0>; |
| 29 | + compatible = "snps,dwmac-mdio"; |
| 30 | + |
| 31 | + phy_mii0: ethernet-phy@8 { |
| 32 | + reg = <8>; |
| 33 | + |
| 34 | + leds { |
| 35 | + #address-cells = <1>; |
| 36 | + #size-cells = <0>; |
| 37 | + |
| 38 | + led@0 { |
| 39 | + reg = <0>; |
| 40 | + color = <LED_COLOR_ID_GREEN>; |
| 41 | + function = LED_FUNCTION_LAN; |
| 42 | + default-state = "keep"; |
| 43 | + }; |
| 44 | + |
| 45 | + led@1 { |
| 46 | + reg = <1>; |
| 47 | + color = <LED_COLOR_ID_ORANGE>; |
| 48 | + function = LED_FUNCTION_ACTIVITY; |
| 49 | + default-state = "keep"; |
| 50 | + }; |
| 51 | + }; |
| 52 | + }; |
| 53 | + }; |
| 54 | +}; |
| 55 | + |
18 | 56 | &i2c2 {
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19 | 57 | /* Sensors are different across revisions. All are LM75B compatible */
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20 | 58 | sensor@49 {
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23 | 61 | };
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24 | 62 | };
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25 | 63 |
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| 64 | +&mii_conv1 { |
| 65 | + renesas,miic-input = <MIIC_GMAC1_PORT>; |
| 66 | + status = "okay"; |
| 67 | +}; |
| 68 | + |
26 | 69 | &mii_conv2 {
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27 | 70 | renesas,miic-input = <MIIC_SWITCH_PORTD>;
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28 | 71 | status = "okay";
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34 | 77 | };
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35 | 78 |
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36 | 79 | &pinctrl {
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| 80 | + pins_eth0: pins-eth0 { |
| 81 | + pinmux = <RZN1_PINMUX(0, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, |
| 82 | + <RZN1_PINMUX(1, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, |
| 83 | + <RZN1_PINMUX(2, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, |
| 84 | + <RZN1_PINMUX(3, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, |
| 85 | + <RZN1_PINMUX(4, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, |
| 86 | + <RZN1_PINMUX(5, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, |
| 87 | + <RZN1_PINMUX(6, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, |
| 88 | + <RZN1_PINMUX(7, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, |
| 89 | + <RZN1_PINMUX(8, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, |
| 90 | + <RZN1_PINMUX(9, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, |
| 91 | + <RZN1_PINMUX(10, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, |
| 92 | + <RZN1_PINMUX(11, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>; |
| 93 | + drive-strength = <6>; |
| 94 | + bias-disable; |
| 95 | + }; |
| 96 | + |
37 | 97 | pins_eth1: pins-eth1 {
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38 | 98 | pinmux = <RZN1_PINMUX(12, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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39 | 99 | <RZN1_PINMUX(13, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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68 | 128 | bias-disable;
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69 | 129 | };
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70 | 130 |
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| 131 | + pins_mdio0: pins-mdio0 { |
| 132 | + pinmux = <RZN1_PINMUX(150, RZN1_FUNC_MDIO0_GMAC0)>, |
| 133 | + <RZN1_PINMUX(151, RZN1_FUNC_MDIO0_GMAC0)>; |
| 134 | + }; |
| 135 | + |
71 | 136 | pins_sdio1: pins-sdio1 {
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72 | 137 | pinmux = <RZN1_PINMUX(95, RZN1_FUNC_SDIO)>,
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73 | 138 | <RZN1_PINMUX(97, RZN1_FUNC_SDIO)>,
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