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pa1guptahansendc
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x86/bhi: Do not set BHI_DIS_S in 32-bit mode
With the possibility of intra-mode BHI via cBPF, complete mitigation for BHI is to use IBHF (history fence) instruction with BHI_DIS_S set. Since this new instruction is only available in 64-bit mode, setting BHI_DIS_S in 32-bit mode is only a partial mitigation. Do not set BHI_DIS_S in 32-bit mode so as to avoid reporting misleading mitigated status. With this change IBHF won't be used in 32-bit mode, also remove the CONFIG_X86_64 check from emit_spectre_bhb_barrier(). Suggested-by: Josh Poimboeuf <[email protected]> Signed-off-by: Pawan Gupta <[email protected]> Signed-off-by: Dave Hansen <[email protected]> Reviewed-by: Josh Poimboeuf <[email protected]> Reviewed-by: Alexandre Chartre <[email protected]>
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arch/x86/kernel/cpu/bugs.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1697,11 +1697,11 @@ static void __init bhi_select_mitigation(void)
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return;
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}
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1700-
/* Mitigate in hardware if supported */
1701-
if (spec_ctrl_bhi_dis())
1700+
if (!IS_ENABLED(CONFIG_X86_64))
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return;
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1704-
if (!IS_ENABLED(CONFIG_X86_64))
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/* Mitigate in hardware if supported */
1704+
if (spec_ctrl_bhi_dis())
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return;
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17071707
if (bhi_mitigation == BHI_MITIGATION_VMEXIT_ONLY) {

arch/x86/net/bpf_jit_comp.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1527,8 +1527,7 @@ static int emit_spectre_bhb_barrier(u8 **pprog, u8 *ip,
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/* Insert IBHF instruction */
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if ((cpu_feature_enabled(X86_FEATURE_CLEAR_BHB_LOOP) &&
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cpu_feature_enabled(X86_FEATURE_HYPERVISOR)) ||
1530-
(cpu_feature_enabled(X86_FEATURE_CLEAR_BHB_HW) &&
1531-
IS_ENABLED(CONFIG_X86_64))) {
1530+
cpu_feature_enabled(X86_FEATURE_CLEAR_BHB_HW)) {
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/*
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* Add an Indirect Branch History Fence (IBHF). IBHF acts as a
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* fence preventing branch history from before the fence from
@@ -1538,6 +1537,8 @@ static int emit_spectre_bhb_barrier(u8 **pprog, u8 *ip,
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* hardware that doesn't need or support it. The REP and REX.W
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* prefixes are required by the microcode, and they also ensure
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* that the NOP is unlikely to be used in existing code.
1540+
*
1541+
* IBHF is not a valid instruction in 32-bit mode.
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*/
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EMIT5(0xF3, 0x48, 0x0F, 0x1E, 0xF8); /* ibhf */
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}

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