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Merge tag 'drm-fixes-5.4-2019-11-14' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
drm-fixes-5.4-2019-11-14: amdgpu: - Fix a potential crash in firmware parsing Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2 parents 5d97c0c + a84fddb commit 07cecca

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drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

Lines changed: 16 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -950,21 +950,7 @@ static void psp_print_fw_hdr(struct psp_context *psp,
950950
struct amdgpu_firmware_info *ucode)
951951
{
952952
struct amdgpu_device *adev = psp->adev;
953-
const struct sdma_firmware_header_v1_0 *sdma_hdr =
954-
(const struct sdma_firmware_header_v1_0 *)
955-
adev->sdma.instance[ucode->ucode_id - AMDGPU_UCODE_ID_SDMA0].fw->data;
956-
const struct gfx_firmware_header_v1_0 *ce_hdr =
957-
(const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data;
958-
const struct gfx_firmware_header_v1_0 *pfp_hdr =
959-
(const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data;
960-
const struct gfx_firmware_header_v1_0 *me_hdr =
961-
(const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data;
962-
const struct gfx_firmware_header_v1_0 *mec_hdr =
963-
(const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data;
964-
const struct rlc_firmware_header_v2_0 *rlc_hdr =
965-
(const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
966-
const struct smc_firmware_header_v1_0 *smc_hdr =
967-
(const struct smc_firmware_header_v1_0 *)adev->pm.fw->data;
953+
struct common_firmware_header *hdr;
968954

969955
switch (ucode->ucode_id) {
970956
case AMDGPU_UCODE_ID_SDMA0:
@@ -975,25 +961,33 @@ static void psp_print_fw_hdr(struct psp_context *psp,
975961
case AMDGPU_UCODE_ID_SDMA5:
976962
case AMDGPU_UCODE_ID_SDMA6:
977963
case AMDGPU_UCODE_ID_SDMA7:
978-
amdgpu_ucode_print_sdma_hdr(&sdma_hdr->header);
964+
hdr = (struct common_firmware_header *)
965+
adev->sdma.instance[ucode->ucode_id - AMDGPU_UCODE_ID_SDMA0].fw->data;
966+
amdgpu_ucode_print_sdma_hdr(hdr);
979967
break;
980968
case AMDGPU_UCODE_ID_CP_CE:
981-
amdgpu_ucode_print_gfx_hdr(&ce_hdr->header);
969+
hdr = (struct common_firmware_header *)adev->gfx.ce_fw->data;
970+
amdgpu_ucode_print_gfx_hdr(hdr);
982971
break;
983972
case AMDGPU_UCODE_ID_CP_PFP:
984-
amdgpu_ucode_print_gfx_hdr(&pfp_hdr->header);
973+
hdr = (struct common_firmware_header *)adev->gfx.pfp_fw->data;
974+
amdgpu_ucode_print_gfx_hdr(hdr);
985975
break;
986976
case AMDGPU_UCODE_ID_CP_ME:
987-
amdgpu_ucode_print_gfx_hdr(&me_hdr->header);
977+
hdr = (struct common_firmware_header *)adev->gfx.me_fw->data;
978+
amdgpu_ucode_print_gfx_hdr(hdr);
988979
break;
989980
case AMDGPU_UCODE_ID_CP_MEC1:
990-
amdgpu_ucode_print_gfx_hdr(&mec_hdr->header);
981+
hdr = (struct common_firmware_header *)adev->gfx.mec_fw->data;
982+
amdgpu_ucode_print_gfx_hdr(hdr);
991983
break;
992984
case AMDGPU_UCODE_ID_RLC_G:
993-
amdgpu_ucode_print_rlc_hdr(&rlc_hdr->header);
985+
hdr = (struct common_firmware_header *)adev->gfx.rlc_fw->data;
986+
amdgpu_ucode_print_rlc_hdr(hdr);
994987
break;
995988
case AMDGPU_UCODE_ID_SMC:
996-
amdgpu_ucode_print_smc_hdr(&smc_hdr->header);
989+
hdr = (struct common_firmware_header *)adev->pm.fw->data;
990+
amdgpu_ucode_print_smc_hdr(hdr);
997991
break;
998992
default:
999993
break;

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