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floatiouskwilczynski
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PCI: cadence: Set a 64-bit BAR if requested
Ever since commit f25b5fa ("PCI: endpoint: Setting a BAR size > 4 GB is invalid if 64-bit flag is not set") it has been impossible to get the .set_bar() callback with a BAR size > 2 GB (yes, 2GB!), if the BAR was also not requested to be configured as a 64-bit BAR. Thus, forcing setting the 64-bit flag for BARs larger than 2 GB in the lower level driver is dead code and can be removed. It is however possible that an EPF driver configures a BAR as 64-bit, even if the requested size is < 4 GB. Respect the requested BAR configuration, just like how it is already respected with regards to the prefetchable bit. Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Niklas Cassel <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]>
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drivers/pci/controller/cadence/pcie-cadence-ep.c

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -99,14 +99,11 @@ static int cdns_pcie_ep_set_bar(struct pci_epc *epc, u8 fn, u8 vfn,
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ctrl = CDNS_PCIE_LM_BAR_CFG_CTRL_IO_32BITS;
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} else {
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bool is_prefetch = !!(flags & PCI_BASE_ADDRESS_MEM_PREFETCH);
102-
bool is_64bits = sz > SZ_2G;
102+
bool is_64bits = !!(flags & PCI_BASE_ADDRESS_MEM_TYPE_64);
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if (is_64bits && (bar & 1))
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return -EINVAL;
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if (is_64bits && !(flags & PCI_BASE_ADDRESS_MEM_TYPE_64))
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epf_bar->flags |= PCI_BASE_ADDRESS_MEM_TYPE_64;
109-
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if (is_64bits && is_prefetch)
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ctrl = CDNS_PCIE_LM_BAR_CFG_CTRL_PREFETCH_MEM_64BITS;
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else if (is_prefetch)

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