106
106
#define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 */
107
107
#define HHI_HDMI_PHY_CNTL0 0x3a0 /* 0xe8 */
108
108
#define HHI_HDMI_PHY_CNTL1 0x3a4 /* 0xe9 */
109
+ #define PHY_CNTL1_INIT 0x03900000
110
+ #define PHY_INVERT BIT(17)
109
111
#define HHI_HDMI_PHY_CNTL2 0x3a8 /* 0xea */
110
112
#define HHI_HDMI_PHY_CNTL3 0x3ac /* 0xeb */
111
113
#define HHI_HDMI_PHY_CNTL4 0x3b0 /* 0xec */
@@ -130,6 +132,8 @@ struct meson_dw_hdmi_data {
130
132
unsigned int addr );
131
133
void (* dwc_write )(struct meson_dw_hdmi * dw_hdmi ,
132
134
unsigned int addr , unsigned int data );
135
+ u32 cntl0_init ;
136
+ u32 cntl1_init ;
133
137
};
134
138
135
139
struct meson_dw_hdmi {
@@ -458,7 +462,9 @@ static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi,
458
462
459
463
DRM_DEBUG_DRIVER ("\n" );
460
464
461
- regmap_write (priv -> hhi , HHI_HDMI_PHY_CNTL0 , 0 );
465
+ /* Fallback to init mode */
466
+ regmap_write (priv -> hhi , HHI_HDMI_PHY_CNTL1 , dw_hdmi -> data -> cntl1_init );
467
+ regmap_write (priv -> hhi , HHI_HDMI_PHY_CNTL0 , dw_hdmi -> data -> cntl0_init );
462
468
}
463
469
464
470
static enum drm_connector_status dw_hdmi_read_hpd (struct dw_hdmi * hdmi ,
@@ -576,18 +582,31 @@ static const struct regmap_config meson_dw_hdmi_regmap_config = {
576
582
.fast_io = true,
577
583
};
578
584
579
- static const struct meson_dw_hdmi_data meson_dw_hdmi_gx_data = {
585
+ static const struct meson_dw_hdmi_data meson_dw_hdmi_gxbb_data = {
580
586
.top_read = dw_hdmi_top_read ,
581
587
.top_write = dw_hdmi_top_write ,
582
588
.dwc_read = dw_hdmi_dwc_read ,
583
589
.dwc_write = dw_hdmi_dwc_write ,
590
+ .cntl0_init = 0x0 ,
591
+ .cntl1_init = PHY_CNTL1_INIT | PHY_INVERT ,
592
+ };
593
+
594
+ static const struct meson_dw_hdmi_data meson_dw_hdmi_gxl_data = {
595
+ .top_read = dw_hdmi_top_read ,
596
+ .top_write = dw_hdmi_top_write ,
597
+ .dwc_read = dw_hdmi_dwc_read ,
598
+ .dwc_write = dw_hdmi_dwc_write ,
599
+ .cntl0_init = 0x0 ,
600
+ .cntl1_init = PHY_CNTL1_INIT ,
584
601
};
585
602
586
603
static const struct meson_dw_hdmi_data meson_dw_hdmi_g12a_data = {
587
604
.top_read = dw_hdmi_g12a_top_read ,
588
605
.top_write = dw_hdmi_g12a_top_write ,
589
606
.dwc_read = dw_hdmi_g12a_dwc_read ,
590
607
.dwc_write = dw_hdmi_g12a_dwc_write ,
608
+ .cntl0_init = 0x000b4242 , /* Bandgap */
609
+ .cntl1_init = PHY_CNTL1_INIT ,
591
610
};
592
611
593
612
static void meson_dw_hdmi_init (struct meson_dw_hdmi * meson_dw_hdmi )
@@ -626,18 +645,8 @@ static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)
626
645
meson_dw_hdmi -> data -> top_write (meson_dw_hdmi , HDMITX_TOP_BIST_CNTL , BIT (12 ));
627
646
628
647
/* Setup PHY */
629
- regmap_update_bits (priv -> hhi , HHI_HDMI_PHY_CNTL1 ,
630
- 0xffff << 16 , 0x0390 << 16 );
631
-
632
- /* BIT_INVERT */
633
- if (dw_hdmi_is_compatible (meson_dw_hdmi , "amlogic,meson-gxl-dw-hdmi" ) ||
634
- dw_hdmi_is_compatible (meson_dw_hdmi , "amlogic,meson-gxm-dw-hdmi" ) ||
635
- dw_hdmi_is_compatible (meson_dw_hdmi , "amlogic,meson-g12a-dw-hdmi" ))
636
- regmap_update_bits (priv -> hhi , HHI_HDMI_PHY_CNTL1 ,
637
- BIT (17 ), 0 );
638
- else
639
- regmap_update_bits (priv -> hhi , HHI_HDMI_PHY_CNTL1 ,
640
- BIT (17 ), BIT (17 ));
648
+ regmap_write (priv -> hhi , HHI_HDMI_PHY_CNTL1 , meson_dw_hdmi -> data -> cntl1_init );
649
+ regmap_write (priv -> hhi , HHI_HDMI_PHY_CNTL0 , meson_dw_hdmi -> data -> cntl0_init );
641
650
642
651
/* Enable HDMI-TX Interrupt */
643
652
meson_dw_hdmi -> data -> top_write (meson_dw_hdmi , HDMITX_TOP_INTR_STAT_CLR ,
@@ -848,11 +857,11 @@ static const struct dev_pm_ops meson_dw_hdmi_pm_ops = {
848
857
849
858
static const struct of_device_id meson_dw_hdmi_of_table [] = {
850
859
{ .compatible = "amlogic,meson-gxbb-dw-hdmi" ,
851
- .data = & meson_dw_hdmi_gx_data },
860
+ .data = & meson_dw_hdmi_gxbb_data },
852
861
{ .compatible = "amlogic,meson-gxl-dw-hdmi" ,
853
- .data = & meson_dw_hdmi_gx_data },
862
+ .data = & meson_dw_hdmi_gxl_data },
854
863
{ .compatible = "amlogic,meson-gxm-dw-hdmi" ,
855
- .data = & meson_dw_hdmi_gx_data },
864
+ .data = & meson_dw_hdmi_gxl_data },
856
865
{ .compatible = "amlogic,meson-g12a-dw-hdmi" ,
857
866
.data = & meson_dw_hdmi_g12a_data },
858
867
{ }
0 commit comments