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drm/i915: Don't clobber crtc_state->cpu_transcoder for inactive crtcs
Inactive crtcs are supposed to have their crtc_state completely cleared. Currently we are clobbering crtc_state->cpu_transcoder before determining whether it's actually enabled or not. Don't do that. I want to rework the inherited flag handling for inactive crtcs a bit, and having a bogus cpu_transcoder in the crtc state can then cause confusing fastset mismatches even when the crtc never changes state during the commit. Reviewed-by: Vinod Govindapillai <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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drivers/gpu/drm/i915/display/intel_display.c

Lines changed: 13 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -2985,26 +2985,25 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
29852985
{
29862986
struct intel_display *display = to_intel_display(crtc);
29872987
enum intel_display_power_domain power_domain;
2988+
enum transcoder cpu_transcoder = (enum transcoder)crtc->pipe;
29882989
intel_wakeref_t wakeref;
2990+
bool ret = false;
29892991
u32 tmp;
2990-
bool ret;
29912992

29922993
power_domain = POWER_DOMAIN_PIPE(crtc->pipe);
29932994
wakeref = intel_display_power_get_if_enabled(display, power_domain);
29942995
if (!wakeref)
29952996
return false;
29962997

2997-
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
2998-
pipe_config->sink_format = pipe_config->output_format;
2999-
pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
3000-
3001-
ret = false;
3002-
3003-
tmp = intel_de_read(display,
3004-
TRANSCONF(display, pipe_config->cpu_transcoder));
2998+
tmp = intel_de_read(display, TRANSCONF(display, cpu_transcoder));
30052999
if (!(tmp & TRANSCONF_ENABLE))
30063000
goto out;
30073001

3002+
pipe_config->cpu_transcoder = cpu_transcoder;
3003+
3004+
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
3005+
pipe_config->sink_format = pipe_config->output_format;
3006+
30083007
if (display->platform.g4x || display->platform.valleyview ||
30093008
display->platform.cherryview) {
30103009
switch (tmp & TRANSCONF_BPC_MASK) {
@@ -3328,23 +3327,22 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
33283327
{
33293328
struct intel_display *display = to_intel_display(crtc);
33303329
enum intel_display_power_domain power_domain;
3330+
enum transcoder cpu_transcoder = (enum transcoder)crtc->pipe;
33313331
intel_wakeref_t wakeref;
3332+
bool ret = false;
33323333
u32 tmp;
3333-
bool ret;
33343334

33353335
power_domain = POWER_DOMAIN_PIPE(crtc->pipe);
33363336
wakeref = intel_display_power_get_if_enabled(display, power_domain);
33373337
if (!wakeref)
33383338
return false;
33393339

3340-
pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
3341-
3342-
ret = false;
3343-
tmp = intel_de_read(display,
3344-
TRANSCONF(display, pipe_config->cpu_transcoder));
3340+
tmp = intel_de_read(display, TRANSCONF(display, cpu_transcoder));
33453341
if (!(tmp & TRANSCONF_ENABLE))
33463342
goto out;
33473343

3344+
pipe_config->cpu_transcoder = cpu_transcoder;
3345+
33483346
switch (tmp & TRANSCONF_BPC_MASK) {
33493347
case TRANSCONF_BPC_6:
33503348
pipe_config->pipe_bpp = 18;

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