mips: dts: ralink: mt7621: reorder cpuintc node attributes

Reorder the CPU Interrupt Controller node's attributes to follow
what the DTS Coding Style dictates.

Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Reviewed-by: Sergio Paracuellos <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

Author: jhswartz

arch/mips/boot/dts/ralink/mt7621.dtsi

@@ -27,10 +27,12 @@
 	};
 
 	cpuintc: cpuintc {
+		compatible = "mti,cpu-interrupt-controller";
+
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
+
 		interrupt-controller;
-		compatible = "mti,cpu-interrupt-controller";
 	};
 
 	mmc_fixed_3v3: regulator-3v3 {