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Documentation/admin-guide/cgroup-v2.rst

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@@ -1213,23 +1213,25 @@ PAGE_SIZE multiple when read back.
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A read-write single value file which exists on non-root
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cgroups. The default is "max".
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Memory usage throttle limit. This is the main mechanism to
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control memory usage of a cgroup. If a cgroup's usage goes
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Memory usage throttle limit. If a cgroup's usage goes
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over the high boundary, the processes of the cgroup are
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throttled and put under heavy reclaim pressure.
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Going over the high limit never invokes the OOM killer and
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under extreme conditions the limit may be breached.
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under extreme conditions the limit may be breached. The high
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limit should be used in scenarios where an external process
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monitors the limited cgroup to alleviate heavy reclaim
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pressure.
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memory.max
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A read-write single value file which exists on non-root
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cgroups. The default is "max".
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Memory usage hard limit. This is the final protection
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mechanism. If a cgroup's memory usage reaches this limit and
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can't be reduced, the OOM killer is invoked in the cgroup.
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Under certain circumstances, the usage may go over the limit
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temporarily.
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Memory usage hard limit. This is the main mechanism to limit
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memory usage of a cgroup. If a cgroup's memory usage reaches
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this limit and can't be reduced, the OOM killer is invoked in
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the cgroup. Under certain circumstances, the usage may go
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over the limit temporarily.
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In default configuration regular 0-order allocations always
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succeed unless OOM killer chooses current task as a victim.
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Caller could retry them differently, return into userspace
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as -ENOMEM or silently ignore in cases like disk readahead.
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This is the ultimate protection mechanism. As long as the
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high limit is used and monitored properly, this limit's
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utility is limited to providing the final safety net.
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memory.reclaim
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A write-only nested-keyed file which exists for all cgroups.
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Documentation/devicetree/bindings/ata/ahci-common.yaml

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@@ -8,7 +8,7 @@ title: Common Properties for Serial ATA AHCI controllers
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maintainers:
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- Hans de Goede <[email protected]>
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- Damien Le Moal <[email protected]>
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- Damien Le Moal <[email protected]>
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description:
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This document defines device tree properties for a common AHCI SATA

Documentation/devicetree/bindings/cache/qcom,llcc.yaml

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- qcom,sm8250-llcc
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- qcom,sm8350-llcc
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- qcom,sm8450-llcc
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- qcom,sm8550-llcc
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then:
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properties:
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reg:

Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml

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@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Canaan Kendryte K210 Clock
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maintainers:
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- Damien Le Moal <[email protected]>
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- Damien Le Moal <[email protected]>
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description: |
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Canaan Kendryte K210 SoC clocks driver bindings. The clock

Documentation/devicetree/bindings/firmware/qcom,scm.yaml

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minItems: 1
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maxItems: 3
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dma-coherent: true
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interconnects:
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maxItems: 1
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Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml

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@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Lattice Slave SPI sysCONFIG FPGA manager
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maintainers:
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- Ivan Bornyakov <i.bornyakov@metrotek.ru>
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- Vladimir Georgiev <v.georgiev@metrotek.ru>
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description: |
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Lattice sysCONFIG port, which is used for FPGA configuration, among others,

Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml

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@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip Polarfire FPGA manager.
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maintainers:
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- Ivan Bornyakov <i.bornyakov@metrotek.ru>
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- Vladimir Georgiev <v.georgiev@metrotek.ru>
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description:
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Device Tree Bindings for Microchip Polarfire FPGA Manager using slave SPI to

Documentation/devicetree/bindings/i2c/opencores,i2c-ocores.yaml

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default: 0
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regstep:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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deprecated, use reg-shift above
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deprecated: true

Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml

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- clock-names
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- clocks
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additionalProperties: true
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unevaluatedProperties: false
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examples:
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- |

Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml

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power-domains:
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maxItems: 1
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vref-supply:
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description: |
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External ADC reference voltage supply on VREFH pad. If VERID[MVI] is
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set, there are additional, internal reference voltages selectable.
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VREFH1 is always from VREFH pad.
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"#io-channel-cells":
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const: 1
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assigned-clocks = <&clk IMX_SC_R_ADC_0>;
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assigned-clock-rates = <24000000>;
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power-domains = <&pd IMX_SC_R_ADC_0>;
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vref-supply = <&reg_1v8>;
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#io-channel-cells = <1>;
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};
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};

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