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9 | 9 |
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10 | 10 | #include <dt-bindings/interrupt-controller/apple-aic.h>
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11 | 11 | #include <dt-bindings/interrupt-controller/irq.h>
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| 12 | +#include <dt-bindings/pinctrl/apple.h> |
12 | 13 |
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13 | 14 | / {
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14 | 15 | compatible = "apple,t8103", "apple,arm-platform";
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131 | 132 | interrupt-controller;
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132 | 133 | reg = <0x2 0x3b100000 0x0 0x8000>;
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133 | 134 | };
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| 135 | + |
| 136 | + pinctrl_ap: pinctrl@23c100000 { |
| 137 | + compatible = "apple,t8103-pinctrl", "apple,pinctrl"; |
| 138 | + reg = <0x2 0x3c100000 0x0 0x100000>; |
| 139 | + |
| 140 | + gpio-controller; |
| 141 | + #gpio-cells = <2>; |
| 142 | + gpio-ranges = <&pinctrl_ap 0 0 212>; |
| 143 | + apple,npins = <212>; |
| 144 | + |
| 145 | + interrupt-controller; |
| 146 | + interrupt-parent = <&aic>; |
| 147 | + interrupts = <AIC_IRQ 190 IRQ_TYPE_LEVEL_HIGH>, |
| 148 | + <AIC_IRQ 191 IRQ_TYPE_LEVEL_HIGH>, |
| 149 | + <AIC_IRQ 192 IRQ_TYPE_LEVEL_HIGH>, |
| 150 | + <AIC_IRQ 193 IRQ_TYPE_LEVEL_HIGH>, |
| 151 | + <AIC_IRQ 194 IRQ_TYPE_LEVEL_HIGH>, |
| 152 | + <AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH>, |
| 153 | + <AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH>; |
| 154 | + |
| 155 | + pcie_pins: pcie-pins { |
| 156 | + pinmux = <APPLE_PINMUX(150, 1)>, |
| 157 | + <APPLE_PINMUX(151, 1)>, |
| 158 | + <APPLE_PINMUX(32, 1)>; |
| 159 | + }; |
| 160 | + }; |
| 161 | + |
| 162 | + pinctrl_aop: pinctrl@24a820000 { |
| 163 | + compatible = "apple,t8103-pinctrl", "apple,pinctrl"; |
| 164 | + reg = <0x2 0x4a820000 0x0 0x4000>; |
| 165 | + |
| 166 | + gpio-controller; |
| 167 | + #gpio-cells = <2>; |
| 168 | + gpio-ranges = <&pinctrl_aop 0 0 42>; |
| 169 | + apple,npins = <42>; |
| 170 | + |
| 171 | + interrupt-controller; |
| 172 | + interrupt-parent = <&aic>; |
| 173 | + interrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>, |
| 174 | + <AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>, |
| 175 | + <AIC_IRQ 270 IRQ_TYPE_LEVEL_HIGH>, |
| 176 | + <AIC_IRQ 271 IRQ_TYPE_LEVEL_HIGH>, |
| 177 | + <AIC_IRQ 272 IRQ_TYPE_LEVEL_HIGH>, |
| 178 | + <AIC_IRQ 273 IRQ_TYPE_LEVEL_HIGH>, |
| 179 | + <AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>; |
| 180 | + }; |
| 181 | + |
| 182 | + pinctrl_nub: pinctrl@23d1f0000 { |
| 183 | + compatible = "apple,t8103-pinctrl", "apple,pinctrl"; |
| 184 | + reg = <0x2 0x3d1f0000 0x0 0x4000>; |
| 185 | + |
| 186 | + gpio-controller; |
| 187 | + #gpio-cells = <2>; |
| 188 | + gpio-ranges = <&pinctrl_nub 0 0 23>; |
| 189 | + apple,npins = <23>; |
| 190 | + |
| 191 | + interrupt-controller; |
| 192 | + interrupt-parent = <&aic>; |
| 193 | + interrupts = <AIC_IRQ 330 IRQ_TYPE_LEVEL_HIGH>, |
| 194 | + <AIC_IRQ 331 IRQ_TYPE_LEVEL_HIGH>, |
| 195 | + <AIC_IRQ 332 IRQ_TYPE_LEVEL_HIGH>, |
| 196 | + <AIC_IRQ 333 IRQ_TYPE_LEVEL_HIGH>, |
| 197 | + <AIC_IRQ 334 IRQ_TYPE_LEVEL_HIGH>, |
| 198 | + <AIC_IRQ 335 IRQ_TYPE_LEVEL_HIGH>, |
| 199 | + <AIC_IRQ 336 IRQ_TYPE_LEVEL_HIGH>; |
| 200 | + }; |
| 201 | + |
| 202 | + pinctrl_smc: pinctrl@23e820000 { |
| 203 | + compatible = "apple,t8103-pinctrl", "apple,pinctrl"; |
| 204 | + reg = <0x2 0x3e820000 0x0 0x4000>; |
| 205 | + |
| 206 | + gpio-controller; |
| 207 | + #gpio-cells = <2>; |
| 208 | + gpio-ranges = <&pinctrl_smc 0 0 16>; |
| 209 | + apple,npins = <16>; |
| 210 | + |
| 211 | + interrupt-controller; |
| 212 | + interrupt-parent = <&aic>; |
| 213 | + interrupts = <AIC_IRQ 391 IRQ_TYPE_LEVEL_HIGH>, |
| 214 | + <AIC_IRQ 392 IRQ_TYPE_LEVEL_HIGH>, |
| 215 | + <AIC_IRQ 393 IRQ_TYPE_LEVEL_HIGH>, |
| 216 | + <AIC_IRQ 394 IRQ_TYPE_LEVEL_HIGH>, |
| 217 | + <AIC_IRQ 395 IRQ_TYPE_LEVEL_HIGH>, |
| 218 | + <AIC_IRQ 396 IRQ_TYPE_LEVEL_HIGH>, |
| 219 | + <AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>; |
| 220 | + }; |
134 | 221 | };
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135 | 222 | };
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