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MarijnS95lumag
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drm/msm/dpu1: Account for DSC's bits_per_pixel having 4 fractional bits
According to the comment this DPU register contains the bits per pixel as a 6.4 fractional value, conveniently matching the contents of bits_per_pixel in struct drm_dsc_config which also uses 4 fractional bits. However, the downstream source this implementation was copy-pasted from has its bpp field stored _without_ fractional part. This makes the entire convoluted math obsolete as it is impossible to pull those 4 fractional bits out of thin air, by somehow trying to reuse the lowest 2 bits of a non-fractional bpp (lsb = bpp % 4??). The rest of the code merely attempts to keep the integer part a multiple of 4, which is rendered useless thanks to data |= dsc->bits_per_pixel << 12; already filling up those bits anyway (but not on downstream). Fixes: c110cfd ("drm/msm/disp/dpu1: Add support for DSC") Signed-off-by: Marijn Suijten <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Vinod Koul <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/508946/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
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drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c

Lines changed: 2 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ static void dpu_hw_dsc_config(struct dpu_hw_dsc *hw_dsc,
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u32 initial_lines)
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{
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struct dpu_hw_blk_reg_map *c = &hw_dsc->hw;
45-
u32 data, lsb, bpp;
45+
u32 data;
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u32 slice_last_group_size;
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u32 det_thresh_flatness;
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bool is_cmd_mode = !(mode & DSC_MODE_VIDEO);
@@ -56,14 +56,7 @@ static void dpu_hw_dsc_config(struct dpu_hw_dsc *hw_dsc,
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data = (initial_lines << 20);
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data |= ((slice_last_group_size - 1) << 18);
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/* bpp is 6.4 format, 4 LSBs bits are for fractional part */
59-
data |= dsc->bits_per_pixel << 12;
60-
lsb = dsc->bits_per_pixel % 4;
61-
bpp = dsc->bits_per_pixel / 4;
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bpp *= 4;
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bpp <<= 4;
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bpp |= lsb;
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data |= bpp << 8;
59+
data |= (dsc->bits_per_pixel << 8);
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data |= (dsc->block_pred_enable << 7);
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data |= (dsc->line_buf_depth << 3);
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data |= (dsc->simple_422 << 2);

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