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*/
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#include <linux/bitfield.h>
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+ #include <linux/ethtool_netlink.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/phy.h>
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#define DP83TD510E_INT1_LINK BIT(13)
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#define DP83TD510E_INT1_LINK_EN BIT(5)
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+ #define DP83TD510E_CTRL 0x1f
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+ #define DP83TD510E_CTRL_HW_RESET BIT(15)
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+ #define DP83TD510E_CTRL_SW_RESET BIT(14)
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+
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#define DP83TD510E_AN_STAT_1 0x60c
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#define DP83TD510E_MASTER_SLAVE_RESOL_FAIL BIT(15)
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@@ -53,6 +58,117 @@ static const u16 dp83td510_mse_sqi_map[] = {
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0x0000 /* 24dB =< SNR */
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};
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+ /* Time Domain Reflectometry (TDR) Functionality of DP83TD510 PHY
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+ *
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+ * I assume that this PHY is using a variation of Spread Spectrum Time Domain
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+ * Reflectometry (SSTDR) rather than the commonly used TDR found in many PHYs.
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+ * Here are the following observations which likely confirm this:
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+ * - The DP83TD510 PHY transmits a modulated signal of configurable length
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+ * (default 16000 µs) instead of a single pulse pattern, which is typical
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+ * for traditional TDR.
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+ * - The pulse observed on the wire, triggered by the HW RESET register, is not
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+ * part of the cable testing process.
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+ *
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+ * I assume that SSTDR seems to be a logical choice for the 10BaseT1L
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+ * environment due to improved noise resistance, making it suitable for
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+ * environments with significant electrical noise, such as long 10BaseT1L cable
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+ * runs.
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+ *
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+ * Configuration Variables:
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+ * The SSTDR variation used in this PHY involves more configuration variables
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+ * that can dramatically affect the functionality and precision of cable
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+ * testing. Since most of these configuration options are either not well
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+ * documented or documented with minimal details, the following sections
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+ * describe my understanding and observations of these variables and their
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+ * impact on TDR functionality.
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+ *
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+ * Timeline:
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+ * ,<--cfg_pre_silence_time
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+ * | ,<-SSTDR Modulated Transmission
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+ * | | ,<--cfg_post_silence_time
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+ * | | | ,<--Force Link Mode
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+ * |<--'-->|<-------'------->|<--'-->|<--------'------->|
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+ *
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+ * - cfg_pre_silence_time: Optional silence time before TDR transmission starts.
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+ * - SSTDR Modulated Transmission: Transmission duration configured by
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+ * cfg_tdr_tx_duration and amplitude configured by cfg_tdr_tx_type.
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+ * - cfg_post_silence_time: Silence time after TDR transmission.
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+ * - Force Link Mode: If nothing is configured after cfg_post_silence_time,
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+ * the PHY continues in force link mode without autonegotiation.
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+ */
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+
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+ #define DP83TD510E_TDR_CFG 0x1e
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+ #define DP83TD510E_TDR_START BIT(15)
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+ #define DP83TD510E_TDR_DONE BIT(1)
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+ #define DP83TD510E_TDR_FAIL BIT(0)
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+
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+ #define DP83TD510E_TDR_CFG1 0x300
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+ /* cfg_tdr_tx_type: Transmit voltage level for TDR.
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+ * 0 = 1V, 1 = 2.4V
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+ * Note: Using different voltage levels may not work
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+ * in all configuration variations. For example, setting
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+ * 2.4V may give different cable length measurements.
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+ * Other settings may be needed to make it work properly.
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+ */
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+ #define DP83TD510E_TDR_TX_TYPE BIT(12)
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+ #define DP83TD510E_TDR_TX_TYPE_1V 0
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+ #define DP83TD510E_TDR_TX_TYPE_2_4V 1
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+ /* cfg_post_silence_time: Time after the TDR sequence. Since we force master mode
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+ * for the TDR will proceed with forced link state after this time. For Linux
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+ * it is better to set max value to avoid false link state detection.
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+ */
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+ #define DP83TD510E_TDR_CFG1_POST_SILENCE_TIME GENMASK(3, 2)
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+ #define DP83TD510E_TDR_CFG1_POST_SILENCE_TIME_0MS 0
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+ #define DP83TD510E_TDR_CFG1_POST_SILENCE_TIME_10MS 1
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+ #define DP83TD510E_TDR_CFG1_POST_SILENCE_TIME_100MS 2
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+ #define DP83TD510E_TDR_CFG1_POST_SILENCE_TIME_1000MS 3
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+ /* cfg_pre_silence_time: Time before the TDR sequence. It should be enough to
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+ * settle down all pulses and reflections. Since for 10BASE-T1L we have
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+ * maximum 2000m cable length, we can set it to 1ms.
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+ */
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+ #define DP83TD510E_TDR_CFG1_PRE_SILENCE_TIME GENMASK(1, 0)
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+ #define DP83TD510E_TDR_CFG1_PRE_SILENCE_TIME_0MS 0
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+ #define DP83TD510E_TDR_CFG1_PRE_SILENCE_TIME_10MS 1
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+ #define DP83TD510E_TDR_CFG1_PRE_SILENCE_TIME_100MS 2
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+ #define DP83TD510E_TDR_CFG1_PRE_SILENCE_TIME_1000MS 3
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+
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+ #define DP83TD510E_TDR_CFG2 0x301
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+ #define DP83TD510E_TDR_END_TAP_INDEX_1 GENMASK(14, 8)
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+ #define DP83TD510E_TDR_END_TAP_INDEX_1_DEF 36
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+ #define DP83TD510E_TDR_START_TAP_INDEX_1 GENMASK(6, 0)
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+ #define DP83TD510E_TDR_START_TAP_INDEX_1_DEF 4
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+
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+ #define DP83TD510E_TDR_CFG3 0x302
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+ /* cfg_tdr_tx_duration: Duration of the TDR transmission in microseconds.
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+ * This value sets the duration of the modulated signal used for TDR
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+ * measurements.
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+ * - Default: 16000 µs
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+ * - Observation: A minimum duration of 6000 µs is recommended to ensure
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+ * accurate detection of cable faults. Durations shorter than 6000 µs may
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+ * result in incomplete data, especially for shorter cables (e.g., 20 meters),
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+ * leading to false "OK" results. Longer durations (e.g., 6000 µs or more)
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+ * provide better accuracy, particularly for detecting open circuits.
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+ */
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+ #define DP83TD510E_TDR_TX_DURATION_US GENMASK(15, 0)
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+ #define DP83TD510E_TDR_TX_DURATION_US_DEF 16000
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+
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+ #define DP83TD510E_TDR_FAULT_CFG1 0x303
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+ #define DP83TD510E_TDR_FLT_LOC_OFFSET_1 GENMASK(14, 8)
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+ #define DP83TD510E_TDR_FLT_LOC_OFFSET_1_DEF 4
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+ #define DP83TD510E_TDR_FLT_INIT_1 GENMASK(7, 0)
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+ #define DP83TD510E_TDR_FLT_INIT_1_DEF 62
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+
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+ #define DP83TD510E_TDR_FAULT_STAT 0x30c
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+ #define DP83TD510E_TDR_PEAK_DETECT BIT(11)
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+ #define DP83TD510E_TDR_PEAK_SIGN BIT(10)
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+ #define DP83TD510E_TDR_PEAK_LOCATION GENMASK(9, 0)
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+
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+ /* Not documented registers and values but recommended according to
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+ * "DP83TD510E Cable Diagnostics Toolkit revC"
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+ */
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+ #define DP83TD510E_UNKN_030E 0x30e
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+ #define DP83TD510E_030E_VAL 0x2520
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+
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static int dp83td510_config_intr (struct phy_device * phydev )
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{
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int ret ;
@@ -198,6 +314,151 @@ static int dp83td510_get_sqi_max(struct phy_device *phydev)
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return DP83TD510_SQI_MAX ;
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}
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+ /**
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+ * dp83td510_cable_test_start - Start the cable test for the DP83TD510 PHY.
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+ * @phydev: Pointer to the phy_device structure.
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+ *
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+ * This sequence is implemented according to the "Application Note DP83TD510E
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+ * Cable Diagnostics Toolkit revC".
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+ *
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+ * Returns: 0 on success, a negative error code on failure.
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+ */
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+ static int dp83td510_cable_test_start (struct phy_device * phydev )
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+ {
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+ int ret ;
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+
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+ ret = phy_set_bits_mmd (phydev , MDIO_MMD_VEND2 , DP83TD510E_CTRL ,
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+ DP83TD510E_CTRL_HW_RESET );
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+ if (ret )
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+ return ret ;
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+
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+ ret = genphy_c45_an_disable_aneg (phydev );
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+ if (ret )
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+ return ret ;
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+
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+ /* Force master mode */
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+ ret = phy_set_bits_mmd (phydev , MDIO_MMD_PMAPMD , MDIO_PMA_PMD_BT1_CTRL ,
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+ MDIO_PMA_PMD_BT1_CTRL_CFG_MST );
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+ if (ret )
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+ return ret ;
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+
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+ /* There is no official recommendation for this register, but it is
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+ * better to use 1V for TDR since other values seems to be optimized
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+ * for this amplitude. Except of amplitude, it is better to configure
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+ * pre TDR silence time to 10ms to avoid false reflections (value 0
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+ * seems to be too short, otherwise we need to implement own silence
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+ * time). Also, post TDR silence time should be set to 1000ms to avoid
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+ * false link state detection, it fits to the polling time of the
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+ * PHY framework. The idea is to wait until
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+ * dp83td510_cable_test_get_status() will be called and reconfigure
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+ * the PHY to the default state within the post silence time window.
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+ */
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+ ret = phy_modify_mmd (phydev , MDIO_MMD_VEND2 , DP83TD510E_TDR_CFG1 ,
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+ DP83TD510E_TDR_TX_TYPE |
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+ DP83TD510E_TDR_CFG1_POST_SILENCE_TIME |
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+ DP83TD510E_TDR_CFG1_PRE_SILENCE_TIME ,
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+ DP83TD510E_TDR_TX_TYPE_1V |
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+ DP83TD510E_TDR_CFG1_PRE_SILENCE_TIME_10MS |
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+ DP83TD510E_TDR_CFG1_POST_SILENCE_TIME_1000MS );
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+ if (ret )
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+ return ret ;
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+
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+ ret = phy_write_mmd (phydev , MDIO_MMD_VEND2 , DP83TD510E_TDR_CFG2 ,
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+ FIELD_PREP (DP83TD510E_TDR_END_TAP_INDEX_1 ,
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+ DP83TD510E_TDR_END_TAP_INDEX_1_DEF ) |
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+ FIELD_PREP (DP83TD510E_TDR_START_TAP_INDEX_1 ,
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+ DP83TD510E_TDR_START_TAP_INDEX_1_DEF ));
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+ if (ret )
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+ return ret ;
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+
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+ ret = phy_write_mmd (phydev , MDIO_MMD_VEND2 , DP83TD510E_TDR_FAULT_CFG1 ,
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+ FIELD_PREP (DP83TD510E_TDR_FLT_LOC_OFFSET_1 ,
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+ DP83TD510E_TDR_FLT_LOC_OFFSET_1_DEF ) |
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+ FIELD_PREP (DP83TD510E_TDR_FLT_INIT_1 ,
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+ DP83TD510E_TDR_FLT_INIT_1_DEF ));
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+ if (ret )
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+ return ret ;
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+
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+ /* Undocumented register, from the "Application Note DP83TD510E Cable
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+ * Diagnostics Toolkit revC".
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+ */
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+ ret = phy_write_mmd (phydev , MDIO_MMD_VEND2 , DP83TD510E_UNKN_030E ,
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+ DP83TD510E_030E_VAL );
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+ if (ret )
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+ return ret ;
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+
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+ ret = phy_write_mmd (phydev , MDIO_MMD_VEND2 , DP83TD510E_TDR_CFG3 ,
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+ DP83TD510E_TDR_TX_DURATION_US_DEF );
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+ if (ret )
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+ return ret ;
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+
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+ ret = phy_set_bits_mmd (phydev , MDIO_MMD_VEND2 , DP83TD510E_CTRL ,
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+ DP83TD510E_CTRL_SW_RESET );
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+ if (ret )
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+ return ret ;
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+
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+ return phy_set_bits_mmd (phydev , MDIO_MMD_VEND2 , DP83TD510E_TDR_CFG ,
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+ DP83TD510E_TDR_START );
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+ }
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+
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+ /**
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+ * dp83td510_cable_test_get_status - Get the status of the cable test for the
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+ * DP83TD510 PHY.
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+ * @phydev: Pointer to the phy_device structure.
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+ * @finished: Pointer to a boolean that indicates whether the test is finished.
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+ *
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+ * The function sets the @finished flag to true if the test is complete.
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+ *
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+ * Returns: 0 on success or a negative error code on failure.
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+ */
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+ static int dp83td510_cable_test_get_status (struct phy_device * phydev ,
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+ bool * finished )
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+ {
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+ int ret , stat ;
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+
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+ * finished = false;
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+
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+ ret = phy_read_mmd (phydev , MDIO_MMD_VEND2 , DP83TD510E_TDR_CFG );
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+ if (ret < 0 )
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+ return ret ;
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+
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+ if (!(ret & DP83TD510E_TDR_DONE ))
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+ return 0 ;
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+
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+ if (!(ret & DP83TD510E_TDR_FAIL )) {
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+ int location ;
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+
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+ ret = phy_read_mmd (phydev , MDIO_MMD_VEND2 ,
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+ DP83TD510E_TDR_FAULT_STAT );
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+ if (ret < 0 )
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+ return ret ;
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+
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+ if (ret & DP83TD510E_TDR_PEAK_DETECT ) {
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+ if (ret & DP83TD510E_TDR_PEAK_SIGN )
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+ stat = ETHTOOL_A_CABLE_RESULT_CODE_OPEN ;
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+ else
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+ stat = ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT ;
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+
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+ location = FIELD_GET (DP83TD510E_TDR_PEAK_LOCATION ,
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+ ret ) * 100 ;
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+ ethnl_cable_test_fault_length (phydev ,
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+ ETHTOOL_A_CABLE_PAIR_A ,
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+ location );
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+ } else {
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+ stat = ETHTOOL_A_CABLE_RESULT_CODE_OK ;
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+ }
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+ } else {
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+ /* Most probably we have active link partner */
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+ stat = ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC ;
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+ }
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+
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+ * finished = true;
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+
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+ ethnl_cable_test_result (phydev , ETHTOOL_A_CABLE_PAIR_A , stat );
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+
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+ return phy_init_hw (phydev );
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+ }
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+
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static int dp83td510_get_features (struct phy_device * phydev )
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{
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/* This PHY can't respond on MDIO bus if no RMII clock is enabled.
@@ -221,13 +482,16 @@ static struct phy_driver dp83td510_driver[] = {
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PHY_ID_MATCH_MODEL (DP83TD510E_PHY_ID ),
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.name = "TI DP83TD510E" ,
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+ .flags = PHY_POLL_CABLE_TEST ,
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.config_aneg = dp83td510_config_aneg ,
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.read_status = dp83td510_read_status ,
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.get_features = dp83td510_get_features ,
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.config_intr = dp83td510_config_intr ,
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.handle_interrupt = dp83td510_handle_interrupt ,
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.get_sqi = dp83td510_get_sqi ,
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.get_sqi_max = dp83td510_get_sqi_max ,
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+ .cable_test_start = dp83td510_cable_test_start ,
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+ .cable_test_get_status = dp83td510_cable_test_get_status ,
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.suspend = genphy_suspend ,
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.resume = genphy_resume ,
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