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3 | 3 | * BIOS32 and PCI BIOS handling.
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4 | 4 | */
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5 | 5 |
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| 6 | +#include <linux/bits.h> |
| 7 | +#include <linux/bitfield.h> |
6 | 8 | #include <linux/pci.h>
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7 | 9 | #include <linux/init.h>
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8 | 10 | #include <linux/slab.h>
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29 | 31 | #define PCIBIOS_HW_TYPE1_SPEC 0x10
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30 | 32 | #define PCIBIOS_HW_TYPE2_SPEC 0x20
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31 | 33 |
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| 34 | +/* |
| 35 | + * Returned in EAX: |
| 36 | + * - AH: return code |
| 37 | + */ |
| 38 | +#define PCIBIOS_RETURN_CODE GENMASK(15, 8) |
| 39 | + |
32 | 40 | int pcibios_enabled;
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33 | 41 |
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| 42 | +static u8 pcibios_get_return_code(u32 eax) |
| 43 | +{ |
| 44 | + return FIELD_GET(PCIBIOS_RETURN_CODE, eax); |
| 45 | +} |
| 46 | + |
34 | 47 | /* According to the BIOS specification at:
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35 | 48 | * http://members.datafast.net.au/dft0802/specs/bios21.pdf, we could
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36 | 49 | * restrict the x zone to some pages and make it ro. But this may be
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@@ -154,7 +167,7 @@ static int __init check_pcibios(void)
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154 | 167 | : "memory");
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155 | 168 | local_irq_restore(flags);
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156 | 169 |
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157 |
| - status = (eax >> 8) & 0xff; |
| 170 | + status = pcibios_get_return_code(eax); |
158 | 171 | hw_mech = eax & 0xff;
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159 | 172 | major_ver = (ebx >> 8) & 0xff;
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160 | 173 | minor_ver = ebx & 0xff;
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@@ -227,7 +240,7 @@ static int pci_bios_read(unsigned int seg, unsigned int bus,
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227 | 240 |
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228 | 241 | raw_spin_unlock_irqrestore(&pci_config_lock, flags);
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229 | 242 |
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230 |
| - return (int)((result & 0xff00) >> 8); |
| 243 | + return pcibios_get_return_code(result); |
231 | 244 | }
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232 | 245 |
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233 | 246 | static int pci_bios_write(unsigned int seg, unsigned int bus,
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@@ -269,7 +282,7 @@ static int pci_bios_write(unsigned int seg, unsigned int bus,
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269 | 282 |
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270 | 283 | raw_spin_unlock_irqrestore(&pci_config_lock, flags);
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271 | 284 |
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272 |
| - return (int)((result & 0xff00) >> 8); |
| 285 | + return pcibios_get_return_code(result); |
273 | 286 | }
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274 | 287 |
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275 | 288 |
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@@ -385,9 +398,10 @@ struct irq_routing_table * pcibios_get_irq_routing_table(void)
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385 | 398 | "m" (opt)
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386 | 399 | : "memory");
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387 | 400 | DBG("OK ret=%d, size=%d, map=%x\n", ret, opt.size, map);
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388 |
| - if (ret & 0xff00) |
389 |
| - printk(KERN_ERR "PCI: Error %02x when fetching IRQ routing table.\n", (ret >> 8) & 0xff); |
390 |
| - else if (opt.size) { |
| 401 | + ret = pcibios_get_return_code(ret); |
| 402 | + if (ret) { |
| 403 | + printk(KERN_ERR "PCI: Error %02x when fetching IRQ routing table.\n", ret); |
| 404 | + } else if (opt.size) { |
391 | 405 | rt = kmalloc(sizeof(struct irq_routing_table) + opt.size, GFP_KERNEL);
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392 | 406 | if (rt) {
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393 | 407 | memset(rt, 0, sizeof(struct irq_routing_table));
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@@ -415,7 +429,7 @@ int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq)
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415 | 429 | "b" ((dev->bus->number << 8) | dev->devfn),
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416 | 430 | "c" ((irq << 8) | (pin + 10)),
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417 | 431 | "S" (&pci_indirect));
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418 |
| - return !(ret & 0xff00); |
| 432 | + return pcibios_get_return_code(ret) == PCIBIOS_SUCCESSFUL; |
419 | 433 | }
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420 | 434 | EXPORT_SYMBOL(pcibios_set_irq_routing);
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421 | 435 |
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