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drm/xe: Fix END redefinition
mips declares an END macro in its headers so it can't be used without namespace in a driver like xe. Instead of coming up with a longer name, just remove the macro and replace its use with 0 since it's still clear what that means: set_offsets() was already using that implicitly when checking the data variable. Reported-by: Guenter Roeck <[email protected]> Closes: http://kisskb.ellerman.id.au/kisskb/buildresult/15143996/ Tested-by: Guenter Roeck <[email protected]> Reviewed-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Lucas De Marchi <[email protected]> (cherry picked from commit 35b2264) Signed-off-by: Lucas De Marchi <[email protected]>
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drivers/gpu/drm/xe/xe_lrc.c

Lines changed: 9 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -97,7 +97,6 @@ static void set_offsets(u32 *regs,
9797
#define REG16(x) \
9898
(((x) >> 9) | BIT(7) | BUILD_BUG_ON_ZERO(x >= 0x10000)), \
9999
(((x) >> 2) & 0x7f)
100-
#define END 0
101100
{
102101
const u32 base = hwe->mmio_base;
103102

@@ -168,7 +167,7 @@ static const u8 gen12_xcs_offsets[] = {
168167
REG16(0x274),
169168
REG16(0x270),
170169

171-
END
170+
0
172171
};
173172

174173
static const u8 dg2_xcs_offsets[] = {
@@ -202,7 +201,7 @@ static const u8 dg2_xcs_offsets[] = {
202201
REG16(0x274),
203202
REG16(0x270),
204203

205-
END
204+
0
206205
};
207206

208207
static const u8 gen12_rcs_offsets[] = {
@@ -298,7 +297,7 @@ static const u8 gen12_rcs_offsets[] = {
298297
REG(0x084),
299298
NOP(1),
300299

301-
END
300+
0
302301
};
303302

304303
static const u8 xehp_rcs_offsets[] = {
@@ -339,7 +338,7 @@ static const u8 xehp_rcs_offsets[] = {
339338
LRI(1, 0),
340339
REG(0x0c8),
341340

342-
END
341+
0
343342
};
344343

345344
static const u8 dg2_rcs_offsets[] = {
@@ -382,7 +381,7 @@ static const u8 dg2_rcs_offsets[] = {
382381
LRI(1, 0),
383382
REG(0x0c8),
384383

385-
END
384+
0
386385
};
387386

388387
static const u8 mtl_rcs_offsets[] = {
@@ -425,7 +424,7 @@ static const u8 mtl_rcs_offsets[] = {
425424
LRI(1, 0),
426425
REG(0x0c8),
427426

428-
END
427+
0
429428
};
430429

431430
#define XE2_CTX_COMMON \
@@ -471,7 +470,7 @@ static const u8 xe2_rcs_offsets[] = {
471470
LRI(1, 0), /* [0x47] */
472471
REG(0x0c8), /* [0x48] R_PWR_CLK_STATE */
473472

474-
END
473+
0
475474
};
476475

477476
static const u8 xe2_bcs_offsets[] = {
@@ -482,16 +481,15 @@ static const u8 xe2_bcs_offsets[] = {
482481
REG16(0x200), /* [0x42] BCS_SWCTRL */
483482
REG16(0x204), /* [0x44] BLIT_CCTL */
484483

485-
END
484+
0
486485
};
487486

488487
static const u8 xe2_xcs_offsets[] = {
489488
XE2_CTX_COMMON,
490489

491-
END
490+
0
492491
};
493492

494-
#undef END
495493
#undef REG16
496494
#undef REG
497495
#undef LRI

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