Skip to content

Commit 0e45384

Browse files
committed
Merge tag 'mmc-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson: "These are the updates for MMC and MEMSTICK for v5.5. Note that this also contains quite some additional changes reaching beyond both the MMC and MEMSTICK subsystems. This is primarily because of fixing an old regression for a WiFi driver based on the SDIO interface on an OMAP openpandora board MMC core: - Add CMD13 polling for MMC IOCTLS with R1B response. - Add common DT properties for clk-phase-delays for various speed modes. - Fix size overflow for mmc gp-partitions. - Re-work HW reset for SDIO cards, which also includes a re-work for Marvell's WiFi mwifiex SDIO func driver. MMC host: - jz4740: Add support for X1000 and JZ4760. - jz4740: Add support for 8-bit bus and for low power mode. - mmci: Add support for HW busy timeout for the stm32_sdmmc variant. - owl-mmc: Add driver for Actions Semi Owl SoCs SD/MMC controller. - renesas_sdhi: Add support for r8a774b1. - sdhci_am654: Add support for Command Queuing Engine for J721E. - sdhci-milbeaut: Add driver for the Milbeaut SD controller. - sdhci-of-arasan: Add support for ZynqMP tap-delays. - sdhci-of-arasan: Add support for clk-phase-delays for SD cards. - sdhci-of-arasan: Add support for Intel LGM SDXC. - sdhci-of-aspeed: Allow inversion of the internal card detect signal. - sdhci-of-esdhc: Fixup workaround for erratum A-008171 for tunings. - sdhci-of-at91: Improve support for calibration. - sdhci-pci: Add support for Intel JSL. - sdhci-pci: Add quirk for AMD SDHC Device 0x7906. - tmio: Enable support for erase/discard/trim requests. MMC/OMAP/pandora/wl1251: The TI wl1251 WiFi driver for SDIO on the OMAP openpandora board has been broken since v4.7. To fix the problems, changes have been made cross subsystems, but also to OMAP2 machine code and to openpandora DTS files, as summarized below. Relevant changes have been tagged for stable. - mmc/wl1251: Re-introduce lost SDIO quirks and vendor-id for wl1251 - omap/omap_hsmmc: Remove redundant platform config for openpandora - omap_hsmmc: Initialize non-std SDIO card for wl1251 for pandora - omap/dts/pandora: Specify wl1251 through a child node of mmc3 - wl1251: Add devicetree support for TI wl1251 SDIO" * tag 'mmc-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (73 commits) dt-bindings: mmc: Correct the type of the clk phase properties Revert "mmc: tmio: remove workaround for NON_REMOVABLE" memstick: Fix Kconfig indentation mmc: sdhci-of-arasan: Add support for ZynqMP Platform Tap Delays Setup dt-bindings: mmc: arasan: Document 'xlnx,zynqmp-8.9a' controller firmware: xilinx: Add SDIO Tap Delay nodes mmc: sdhci-of-arasan: Add support to set clock phase delays for SD dt-bindings: mmc: Add optional generic properties for mmc mmc: sdhci-of-arasan: Add sampling clock for a phy to use dt-bindings: mmc: arasan: Update Documentation for the input clock mmc: sdhci-of-arasan: Separate out clk related data to another structure mmc: sdhci: Fix grammar in warning message mmc: sdhci-of-aspeed: add inversion signal presence mmc: sdhci-of-aspeed: enable CONFIG_MMC_SDHCI_IO_ACCESSORS mmc: sdhci_am654: Add Support for Command Queuing Engine to J721E mmc: core: Fix size overflow for mmc partitions mmc: tmio: Add MMC_CAP_ERASE to allow erase/discard/trim requests net: wireless: ti: remove local VENDOR_ID and DEVICE_ID definitions net: wireless: ti: wl1251 use new SDIO_VENDOR_ID_TI_WL1251 definition mmc: core: fix wl1251 sdio quirks ...
2 parents dc5fa46 + def7bd9 commit 0e45384

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

64 files changed

+2631
-694
lines changed

Documentation/devicetree/bindings/mmc/arasan,sdhci.txt

Lines changed: 39 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -15,10 +15,15 @@ Required Properties:
1515
- "arasan,sdhci-5.1": generic Arasan SDHCI 5.1 PHY
1616
- "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1": rk3399 eMMC PHY
1717
For this device it is strongly suggested to include arasan,soc-ctl-syscon.
18+
- "xlnx,zynqmp-8.9a": ZynqMP SDHCI 8.9a PHY
19+
For this device it is strongly suggested to include clock-output-names and
20+
#clock-cells.
1821
- "ti,am654-sdhci-5.1", "arasan,sdhci-5.1": TI AM654 MMC PHY
1922
Note: This binding has been deprecated and moved to [5].
2023
- "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1": Intel LGM eMMC PHY
2124
For this device it is strongly suggested to include arasan,soc-ctl-syscon.
25+
- "intel,lgm-sdhci-5.1-sdxc", "arasan,sdhci-5.1": Intel LGM SDXC PHY
26+
For this device it is strongly suggested to include arasan,soc-ctl-syscon.
2227

2328
[5] Documentation/devicetree/bindings/mmc/sdhci-am654.txt
2429

@@ -38,15 +43,19 @@ Optional Properties:
3843
- clock-output-names: If specified, this will be the name of the card clock
3944
which will be exposed by this device. Required if #clock-cells is
4045
specified.
41-
- #clock-cells: If specified this should be the value <0>. With this property
42-
in place we will export a clock representing the Card Clock. This clock
43-
is expected to be consumed by our PHY. You must also specify
46+
- #clock-cells: If specified this should be the value <0> or <1>. With this
47+
property in place we will export one or two clocks representing the Card
48+
Clock. These clocks are expected to be consumed by our PHY.
4449
- xlnx,fails-without-test-cd: when present, the controller doesn't work when
4550
the CD line is not connected properly, and the line is not connected
4651
properly. Test mode can be used to force the controller to function.
4752
- xlnx,int-clock-stable-broken: when present, the controller always reports
4853
that the internal clock is stable even when it is not.
4954

55+
- xlnx,mio-bank: When specified, this will indicate the MIO bank number in
56+
which the command and data lines are configured. If not specified, driver
57+
will assume this as 0.
58+
5059
Example:
5160
sdhci@e0100000 {
5261
compatible = "arasan,sdhci-8.9a";
@@ -83,6 +92,18 @@ Example:
8392
#clock-cells = <0>;
8493
};
8594

95+
sdhci: mmc@ff160000 {
96+
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
97+
interrupt-parent = <&gic>;
98+
interrupts = <0 48 4>;
99+
reg = <0x0 0xff160000 0x0 0x1000>;
100+
clocks = <&clk200>, <&clk200>;
101+
clock-names = "clk_xin", "clk_ahb";
102+
clock-output-names = "clk_out_sd0", "clk_in_sd0";
103+
#clock-cells = <1>;
104+
clk-phase-sd-hs = <63>, <72>;
105+
};
106+
86107
emmc: sdhci@ec700000 {
87108
compatible = "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1";
88109
reg = <0xec700000 0x300>;
@@ -97,3 +118,18 @@ Example:
97118
phy-names = "phy_arasan";
98119
arasan,soc-ctl-syscon = <&sysconf>;
99120
};
121+
122+
sdxc: sdhci@ec600000 {
123+
compatible = "arasan,sdhci-5.1", "intel,lgm-sdhci-5.1-sdxc";
124+
reg = <0xec600000 0x300>;
125+
interrupt-parent = <&ioapic1>;
126+
interrupts = <43 1>;
127+
clocks = <&cgu0 LGM_CLK_SDIO>, <&cgu0 LGM_CLK_NGI>,
128+
<&cgu0 LGM_GCLK_SDXC>;
129+
clock-names = "clk_xin", "clk_ahb", "gate";
130+
clock-output-names = "sdxc_cardclock";
131+
#clock-cells = <0>;
132+
phys = <&sdxc_phy>;
133+
phy-names = "phy_arasan";
134+
arasan,soc-ctl-syscon = <&sysconf>;
135+
};

Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,9 @@ Required properties:
1818
"fsl,imx6ull-usdhc"
1919
"fsl,imx7d-usdhc"
2020
"fsl,imx7ulp-usdhc"
21+
"fsl,imx8mq-usdhc"
22+
"fsl,imx8mm-usdhc"
23+
"fsl,imx8mn-usdhc"
2124
"fsl,imx8qxp-usdhc"
2225

2326
Optional properties:

Documentation/devicetree/bindings/mmc/jz4740.txt

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,14 +1,16 @@
1-
* Ingenic JZ47xx MMC controllers
1+
* Ingenic XBurst MMC controllers
22

33
This file documents the device tree properties used for the MMC controller in
4-
Ingenic JZ4740/JZ4780 SoCs. These are in addition to the core MMC properties
5-
described in mmc.txt.
4+
Ingenic JZ4740/JZ4760/JZ4780/X1000 SoCs. These are in addition to the core MMC
5+
properties described in mmc.txt.
66

77
Required properties:
88
- compatible: Should be one of the following:
99
- "ingenic,jz4740-mmc" for the JZ4740
1010
- "ingenic,jz4725b-mmc" for the JZ4725B
11+
- "ingenic,jz4760-mmc" for the JZ4760
1112
- "ingenic,jz4780-mmc" for the JZ4780
13+
- "ingenic,x1000-mmc" for the X1000
1214
- reg: Should contain the MMC controller registers location and length.
1315
- interrupts: Should contain the interrupt specifier of the MMC controller.
1416
- clocks: Clock for the MMC controller.

Documentation/devicetree/bindings/mmc/mmc-controller.yaml

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -333,6 +333,19 @@ patternProperties:
333333
required:
334334
- reg
335335

336+
"^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|uhs-(sdr(12|25|50|104)|ddr50))$":
337+
allOf:
338+
- $ref: /schemas/types.yaml#/definitions/uint32-array
339+
minItems: 2
340+
maxItems: 2
341+
items:
342+
minimum: 0
343+
maximum: 359
344+
description:
345+
Set the clock (phase) delays which are to be configured in the
346+
controller while switching to particular speed mode. These values
347+
are in pair of degrees.
348+
336349
dependencies:
337350
cd-debounce-delay-ms: [ cd-gpios ]
338351
fixed-emmc-driver-type: [ non-removable ]
@@ -351,6 +364,7 @@ examples:
351364
keep-power-in-suspend;
352365
wakeup-source;
353366
mmc-pwrseq = <&sdhci0_pwrseq>;
367+
clk-phase-sd-hs = <63>, <72>;
354368
};
355369
356370
- |
Lines changed: 59 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,59 @@
1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/mmc/owl-mmc.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Actions Semi Owl SoCs SD/MMC/SDIO controller
8+
9+
allOf:
10+
- $ref: "mmc-controller.yaml"
11+
12+
maintainers:
13+
- Manivannan Sadhasivam <[email protected]>
14+
15+
properties:
16+
compatible:
17+
const: actions,owl-mmc
18+
19+
reg:
20+
maxItems: 1
21+
22+
interrupts:
23+
maxItems: 1
24+
25+
clocks:
26+
minItems: 1
27+
28+
resets:
29+
maxItems: 1
30+
31+
dmas:
32+
maxItems: 1
33+
34+
dma-names:
35+
const: mmc
36+
37+
required:
38+
- compatible
39+
- reg
40+
- interrupts
41+
- clocks
42+
- resets
43+
- dmas
44+
- dma-names
45+
46+
examples:
47+
- |
48+
mmc0: mmc@e0330000 {
49+
compatible = "actions,owl-mmc";
50+
reg = <0x0 0xe0330000 0x0 0x4000>;
51+
interrupts = <0 42 4>;
52+
clocks = <&cmu 56>;
53+
resets = <&cmu 23>;
54+
dmas = <&dma 2>;
55+
dma-names = "mmc";
56+
bus-width = <4>;
57+
};
58+
59+
...

Documentation/devicetree/bindings/mmc/renesas,sdhi.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@ Required properties:
1111
"renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
1212
"renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
1313
"renesas,sdhi-r8a774a1" - SDHI IP on R8A774A1 SoC
14+
"renesas,sdhi-r8a774b1" - SDHI IP on R8A774B1 SoC
1415
"renesas,sdhi-r8a774c0" - SDHI IP on R8A774C0 SoC
1516
"renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC
1617
"renesas,sdhi-mmc-r8a77470" - SDHI/MMC IP on R8A77470 SoC

Documentation/devicetree/bindings/mmc/sdhci-atmel.txt

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,11 @@ Required properties:
99
- clocks: Phandlers to the clocks.
1010
- clock-names: Must be "hclock", "multclk", "baseclk";
1111

12+
Optional properties:
13+
- microchip,sdcal-inverted: when present, polarity on the SDCAL SoC pin is
14+
inverted. The default polarity for this signal is described in the datasheet.
15+
For instance on SAMA5D2, the pin is usually tied to the GND with a resistor
16+
and a capacitor (see "SDMMC I/O Calibration" chapter).
1217

1318
Example:
1419

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,30 @@
1+
* SOCIONEXT Milbeaut SDHCI controller
2+
3+
This file documents differences between the core properties in mmc.txt
4+
and the properties used by the sdhci_milbeaut driver.
5+
6+
Required properties:
7+
- compatible: "socionext,milbeaut-m10v-sdhci-3.0"
8+
- clocks: Must contain an entry for each entry in clock-names. It is a
9+
list of phandles and clock-specifier pairs.
10+
See ../clocks/clock-bindings.txt for details.
11+
- clock-names: Should contain the following two entries:
12+
"iface" - clock used for sdhci interface
13+
"core" - core clock for sdhci controller
14+
15+
Optional properties:
16+
- fujitsu,cmd-dat-delay-select: boolean property indicating that this host
17+
requires the CMD_DAT_DELAY control to be enabled.
18+
19+
Example:
20+
sdhci3: mmc@1b010000 {
21+
compatible = "socionext,milbeaut-m10v-sdhci-3.0";
22+
reg = <0x1b010000 0x10000>;
23+
interrupts = <0 265 0x4>;
24+
voltage-ranges = <3300 3300>;
25+
bus-width = <4>;
26+
clocks = <&clk 7>, <&ahb_clk>;
27+
clock-names = "core", "iface";
28+
cap-sdio-irq;
29+
fujitsu,cmd-dat-delay-select;
30+
};

Documentation/devicetree/bindings/net/wireless/ti,wl1251.txt

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,3 +35,29 @@ Examples:
3535
ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
3636
};
3737
};
38+
39+
&mmc3 {
40+
vmmc-supply = <&wlan_en>;
41+
42+
bus-width = <4>;
43+
non-removable;
44+
ti,non-removable;
45+
cap-power-off-card;
46+
47+
pinctrl-names = "default";
48+
pinctrl-0 = <&mmc3_pins>;
49+
50+
#address-cells = <1>;
51+
#size-cells = <0>;
52+
53+
wlan: wifi@1 {
54+
compatible = "ti,wl1251";
55+
56+
reg = <1>;
57+
58+
interrupt-parent = <&gpio1>;
59+
interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; /* GPIO_21 */
60+
61+
ti,wl1251-has-eeprom;
62+
};
63+
};

MAINTAINERS

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1399,6 +1399,7 @@ F: drivers/clk/actions/
13991399
F: drivers/clocksource/timer-owl*
14001400
F: drivers/dma/owl-dma.c
14011401
F: drivers/i2c/busses/i2c-owl.c
1402+
F: drivers/mmc/host/owl-mmc.c
14021403
F: drivers/pinctrl/actions/*
14031404
F: drivers/soc/actions/
14041405
F: include/dt-bindings/power/owl-*
@@ -1407,6 +1408,7 @@ F: Documentation/devicetree/bindings/arm/actions.yaml
14071408
F: Documentation/devicetree/bindings/clock/actions,owl-cmu.txt
14081409
F: Documentation/devicetree/bindings/dma/owl-dma.txt
14091410
F: Documentation/devicetree/bindings/i2c/i2c-owl.txt
1411+
F: Documentation/devicetree/bindings/mmc/owl-mmc.yaml
14101412
F: Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt
14111413
F: Documentation/devicetree/bindings/power/actions,owl-sps.txt
14121414
F: Documentation/devicetree/bindings/timer/actions,owl-timer.txt
@@ -17612,10 +17614,8 @@ S: Maintained
1761217614
F: drivers/hwmon/vt8231.c
1761317615

1761417616
VUB300 USB to SDIO/SD/MMC bridge chip
17615-
M: Tony Olech <[email protected]>
1761617617
17617-
17618-
S: Supported
17618+
S: Orphan
1761917619
F: drivers/mmc/host/vub300.c
1762017620

1762117621
W1 DALLAS'S 1-WIRE BUS

0 commit comments

Comments
 (0)