15
15
#include <asm/pci_debug.h>
16
16
#include <asm/pci_io.h>
17
17
#include <asm/processor.h>
18
+ #include <asm/asm.h>
18
19
19
20
#define ZPCI_INSN_BUSY_DELAY 1 /* 1 microsecond */
20
21
@@ -57,16 +58,16 @@ static inline void zpci_err_insn_addr(int lvl, u8 insn, u8 cc, u8 status,
57
58
/* Modify PCI Function Controls */
58
59
static inline u8 __mpcifc (u64 req , struct zpci_fib * fib , u8 * status )
59
60
{
60
- u8 cc ;
61
+ int cc ;
61
62
62
63
asm volatile (
63
64
" .insn rxy,0xe300000000d0,%[req],%[fib]\n"
64
- " ipm %[cc]\n"
65
- " srl %[cc],28\n"
66
- : [ cc ] "=d" ( cc ), [ req ] "+d" ( req ), [ fib ] "+Q" ( * fib )
67
- : : "cc" );
65
+ CC_IPM ( cc )
66
+ : CC_OUT ( cc , cc ), [ req ] " + d " (req), [fib] " + Q " (*fib)
67
+ :
68
+ : CC_CLOBBER );
68
69
* status = req >> 24 & 0xff ;
69
- return cc ;
70
+ return CC_TRANSFORM ( cc ) ;
70
71
}
71
72
72
73
u8 zpci_mod_fc (u64 req , struct zpci_fib * fib , u8 * status )
@@ -98,17 +99,16 @@ EXPORT_SYMBOL_GPL(zpci_mod_fc);
98
99
static inline u8 __rpcit (u64 fn , u64 addr , u64 range , u8 * status )
99
100
{
100
101
union register_pair addr_range = {.even = addr , .odd = range };
101
- u8 cc ;
102
+ int cc ;
102
103
103
104
asm volatile (
104
105
" .insn rre,0xb9d30000,%[fn],%[addr_range]\n"
105
- " ipm %[cc]\n"
106
- " srl %[cc],28\n"
107
- : [cc ] "=d" (cc ), [fn ] "+d" (fn )
106
+ CC_IPM (cc )
107
+ : CC_OUT (cc , cc ), [fn ] "+ d " (fn)
108
108
: [addr_range ] "d" (addr_range .pair )
109
- : "cc" );
109
+ : CC_CLOBBER );
110
110
* status = fn >> 24 & 0xff ;
111
- return cc ;
111
+ return CC_TRANSFORM ( cc ) ;
112
112
}
113
113
114
114
int zpci_refresh_trans (u64 fn , u64 addr , u64 range )
@@ -156,20 +156,23 @@ EXPORT_SYMBOL_GPL(zpci_set_irq_ctrl);
156
156
static inline int ____pcilg (u64 * data , u64 req , u64 offset , u8 * status )
157
157
{
158
158
union register_pair req_off = {.even = req , .odd = offset };
159
- int cc = - ENXIO ;
159
+ int cc , exception ;
160
160
u64 __data ;
161
161
162
+ exception = 1 ;
162
163
asm volatile (
163
164
" .insn rre,0xb9d20000,%[data],%[req_off]\n"
164
- "0: ipm %[cc]\n"
165
- " srl %[cc],28\n"
165
+ "0: lhi %[exc],0\n"
166
166
"1:\n"
167
+ CC_IPM (cc )
167
168
EX_TABLE (0b , 1b )
168
- : [cc ] "+ d " (cc), [data] " = d " (__data),
169
- [req_off ] "+&d" (req_off .pair ) :: "cc ");
169
+ : CC_OUT (cc , cc ), [data ] "= d " (__data),
170
+ [req_off ] "+ d " (req_off.pair), [exc] " + d " (exception)
171
+ :
172
+ : CC_CLOBBER );
170
173
* status = req_off .even >> 24 & 0xff ;
171
174
* data = __data ;
172
- return cc ;
175
+ return exception ? - ENXIO : CC_TRANSFORM ( cc ) ;
173
176
}
174
177
175
178
static inline int __pcilg (u64 * data , u64 req , u64 offset , u8 * status )
@@ -222,20 +225,23 @@ static inline int zpci_load_fh(u64 *data, const volatile void __iomem *addr,
222
225
static inline int __pcilg_mio (u64 * data , u64 ioaddr , u64 len , u8 * status )
223
226
{
224
227
union register_pair ioaddr_len = {.even = ioaddr , .odd = len };
225
- int cc = - ENXIO ;
228
+ int cc , exception ;
226
229
u64 __data ;
227
230
231
+ exception = 1 ;
228
232
asm volatile (
229
233
" .insn rre,0xb9d60000,%[data],%[ioaddr_len]\n"
230
- "0: ipm %[cc]\n"
231
- " srl %[cc],28\n"
234
+ "0: lhi %[exc],0\n"
232
235
"1:\n"
236
+ CC_IPM (cc )
233
237
EX_TABLE (0b , 1b )
234
- : [cc ] "+ d " (cc), [data] " = d " (__data),
235
- [ioaddr_len ] "+&d" (ioaddr_len .pair ) :: "cc ");
238
+ : CC_OUT (cc , cc ), [data ] "= d " (__data),
239
+ [ioaddr_len ] "+ d " (ioaddr_len.pair), [exc] " + d " (exception)
240
+ :
241
+ : CC_CLOBBER );
236
242
* status = ioaddr_len .odd >> 24 & 0xff ;
237
243
* data = __data ;
238
- return cc ;
244
+ return exception ? - ENXIO : CC_TRANSFORM ( cc ) ;
239
245
}
240
246
241
247
int zpci_load (u64 * data , const volatile void __iomem * addr , unsigned long len )
@@ -258,19 +264,20 @@ EXPORT_SYMBOL_GPL(zpci_load);
258
264
static inline int __pcistg (u64 data , u64 req , u64 offset , u8 * status )
259
265
{
260
266
union register_pair req_off = {.even = req , .odd = offset };
261
- int cc = - ENXIO ;
267
+ int cc , exception ;
262
268
269
+ exception = 1 ;
263
270
asm volatile (
264
271
" .insn rre,0xb9d00000,%[data],%[req_off]\n"
265
- "0: ipm %[cc]\n"
266
- " srl %[cc],28\n"
272
+ "0: lhi %[exc],0\n"
267
273
"1:\n"
274
+ CC_IPM (cc )
268
275
EX_TABLE (0b , 1b )
269
- : [ cc ] "+ d " (cc ), [req_off ] " + & d " (req_off.pair )
276
+ : CC_OUT ( cc , cc ), [ req_off ] "+ d " (req_off.pair ), [exc ] " + d " (exception )
270
277
: [data ] "d" (data )
271
- : " cc " );
278
+ : CC_CLOBBER );
272
279
* status = req_off .even >> 24 & 0xff ;
273
- return cc ;
280
+ return exception ? - ENXIO : CC_TRANSFORM ( cc ) ;
274
281
}
275
282
276
283
int __zpci_store (u64 data , u64 req , u64 offset )
@@ -311,19 +318,20 @@ static inline int zpci_store_fh(const volatile void __iomem *addr, u64 data,
311
318
static inline int __pcistg_mio (u64 data , u64 ioaddr , u64 len , u8 * status )
312
319
{
313
320
union register_pair ioaddr_len = {.even = ioaddr , .odd = len };
314
- int cc = - ENXIO ;
321
+ int cc , exception ;
315
322
323
+ exception = 1 ;
316
324
asm volatile (
317
325
" .insn rre,0xb9d40000,%[data],%[ioaddr_len]\n"
318
- "0: ipm %[cc]\n"
319
- " srl %[cc],28\n"
326
+ "0: lhi %[exc],0\n"
320
327
"1:\n"
328
+ CC_IPM (cc )
321
329
EX_TABLE (0b , 1b )
322
- : [ cc ] "+ d " (cc ), [ioaddr_len ] " + & d " (ioaddr_len.pair )
330
+ : CC_OUT ( cc , cc ), [ ioaddr_len ] "+ d " (ioaddr_len.pair ), [exc ] " + d " (exception )
323
331
: [data ] "d" (data )
324
- : " cc ", " memory ");
332
+ : CC_CLOBBER_LIST ( " memory") );
325
333
* status = ioaddr_len .odd >> 24 & 0xff ;
326
- return cc ;
334
+ return exception ? - ENXIO : CC_TRANSFORM ( cc ) ;
327
335
}
328
336
329
337
int zpci_store (const volatile void __iomem * addr , u64 data , unsigned long len )
@@ -345,19 +353,20 @@ EXPORT_SYMBOL_GPL(zpci_store);
345
353
/* PCI Store Block */
346
354
static inline int __pcistb (const u64 * data , u64 req , u64 offset , u8 * status )
347
355
{
348
- int cc = - ENXIO ;
356
+ int cc , exception ;
349
357
358
+ exception = 1 ;
350
359
asm volatile (
351
360
" .insn rsy,0xeb00000000d0,%[req],%[offset],%[data]\n"
352
- "0: ipm %[cc]\n"
353
- " srl %[cc],28\n"
361
+ "0: lhi %[exc],0\n"
354
362
"1:\n"
363
+ CC_IPM (cc )
355
364
EX_TABLE (0b , 1b )
356
- : [ cc ] "+ d " (cc ), [req ] " + d " (req )
365
+ : CC_OUT ( cc , cc ), [ req ] "+ d " (req ), [exc ] " + d " (exception )
357
366
: [offset ] "d " (offset), [data] " Q " (*data)
358
- : " cc " );
367
+ : CC_CLOBBER );
359
368
* status = req >> 24 & 0xff ;
360
- return cc ;
369
+ return exception ? - ENXIO : CC_TRANSFORM ( cc ) ;
361
370
}
362
371
363
372
int __zpci_store_block (const u64 * data , u64 req , u64 offset )
@@ -398,19 +407,20 @@ static inline int zpci_write_block_fh(volatile void __iomem *dst,
398
407
399
408
static inline int __pcistb_mio (const u64 * data , u64 ioaddr , u64 len , u8 * status )
400
409
{
401
- int cc = - ENXIO ;
410
+ int cc , exception ;
402
411
412
+ exception = 1 ;
403
413
asm volatile (
404
414
" .insn rsy,0xeb00000000d4,%[len],%[ioaddr],%[data]\n"
405
- "0: ipm %[cc]\n"
406
- " srl %[cc],28\n"
415
+ "0: lhi %[exc],0\n"
407
416
"1:\n"
417
+ CC_IPM (cc )
408
418
EX_TABLE (0b , 1b )
409
- : [ cc ] "+ d " (cc ), [len ] " + d " (len )
419
+ : CC_OUT ( cc , cc ), [ len ] "+ d " (len ), [exc ] " + d " (exception )
410
420
: [ioaddr ] "d " (ioaddr), [data] " Q " (*data)
411
- : " cc " );
421
+ : CC_CLOBBER );
412
422
* status = len >> 24 & 0xff ;
413
- return cc ;
423
+ return exception ? - ENXIO : CC_TRANSFORM ( cc ) ;
414
424
}
415
425
416
426
int zpci_write_block (volatile void __iomem * dst ,
0 commit comments