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LoongArch: dts: DeviceTree for Loongson-2K0500
Add DeviceTree file for Loongson-2K0500 processor, which integrates one 64-bit 2-issue superscalar LA264 processor core. Signed-off-by: Binbin Zhou <[email protected]> Signed-off-by: Huacai Chen <[email protected]>
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‎arch/loongarch/boot/dts/Makefile

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# SPDX-License-Identifier: GPL-2.0-only
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dtb-y = loongson-2k0500-ref.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))

‎arch/loongarch/boot/dts/loongson-2k0500-ref.dts

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2023 Loongson Technology Corporation Limited
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*/
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/dts-v1/;
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#include "loongson-2k0500.dtsi"
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/ {
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compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500";
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model = "Loongson-2K0500 Reference Board";
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aliases {
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ethernet0 = &gmac0;
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ethernet1 = &gmac1;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@200000 {
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device_type = "memory";
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reg = <0x0 0x00200000 0x0 0x0ee00000>,
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<0x0 0x90000000 0x0 0x60000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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linux,cma {
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compatible = "shared-dma-pool";
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reusable;
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size = <0x0 0x2000000>;
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linux,cma-default;
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};
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};
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};
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&gmac0 {
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status = "okay";
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phy-mode = "rgmii";
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bus_id = <0x0>;
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};
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&gmac1 {
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status = "okay";
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phy-mode = "rgmii";
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bus_id = <0x1>;
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};
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&i2c0 {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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eeprom@57{
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compatible = "atmel,24c16";
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reg = <0x57>;
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pagesize = <16>;
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};
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};
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&ehci0 {
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status = "okay";
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};
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&ohci0 {
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status = "okay";
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};
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&sata {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&rtc0 {
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status = "okay";
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};

‎arch/loongarch/boot/dts/loongson-2k0500.dtsi

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2023 Loongson Technology Corporation Limited
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*/
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/dts-v1/;
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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#address-cells = <2>;
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#size-cells = <2>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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compatible = "loongson,la264";
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device_type = "cpu";
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reg = <0x0>;
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clocks = <&cpu_clk>;
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};
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};
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cpu_clk: cpu-clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <500000000>;
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};
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cpuintc: interrupt-controller {
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compatible = "loongson,cpu-interrupt-controller";
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#interrupt-cells = <1>;
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interrupt-controller;
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};
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bus@10000000 {
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compatible = "simple-bus";
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ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
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<0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
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<0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>,
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<0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
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<0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
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#address-cells = <2>;
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#size-cells = <2>;
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isa@16400000 {
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compatible = "isa";
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#size-cells = <1>;
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#address-cells = <2>;
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ranges = <1 0x0 0x0 0x16400000 0x4000>;
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};
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liointc0: interrupt-controller@1fe11400 {
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compatible = "loongson,liointc-2.0";
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reg = <0x0 0x1fe11400 0x0 0x40>,
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<0x0 0x1fe11040 0x0 0x8>;
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reg-names = "main", "isr0";
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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interrupt-names = "int0";
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loongson,parent_int_map = <0xffffffff>, /* int0 */
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<0x00000000>, /* int1 */
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<0x00000000>, /* int2 */
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<0x00000000>; /* int3 */
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};
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liointc1: interrupt-controller@1fe11440 {
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compatible = "loongson,liointc-2.0";
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reg = <0x0 0x1fe11440 0x0 0x40>,
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<0x0 0x1fe11048 0x0 0x8>;
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reg-names = "main", "isr0";
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&cpuintc>;
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interrupts = <4>;
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interrupt-names = "int2";
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loongson,parent_int_map = <0x00000000>, /* int0 */
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<0x00000000>, /* int1 */
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<0xffffffff>, /* int2 */
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<0x00000000>; /* int3 */
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};
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eiointc: interrupt-controller@1fe11600 {
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compatible = "loongson,ls2k0500-eiointc";
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reg = <0x0 0x1fe11600 0x0 0xea00>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpuintc>;
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interrupts = <3>;
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};
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gmac0: ethernet@1f020000 {
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compatible = "snps,dwmac-3.70a";
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reg = <0x0 0x1f020000 0x0 0x10000>;
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interrupt-parent = <&liointc0>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq";
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status = "disabled";
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};
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gmac1: ethernet@1f030000 {
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compatible = "snps,dwmac-3.70a";
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reg = <0x0 0x1f030000 0x0 0x10000>;
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interrupt-parent = <&liointc0>;
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interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq";
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status = "disabled";
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};
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sata: sata@1f040000 {
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compatible = "snps,spear-ahci";
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reg = <0x0 0x1f040000 0x0 0x10000>;
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interrupt-parent = <&eiointc>;
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interrupts = <75>;
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status = "disabled";
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};
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ehci0: usb@1f050000 {
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compatible = "generic-ehci";
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reg = <0x0 0x1f050000 0x0 0x8000>;
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interrupt-parent = <&eiointc>;
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interrupts = <71>;
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status = "disabled";
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};
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ohci0: usb@1f058000 {
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compatible = "generic-ohci";
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reg = <0x0 0x1f058000 0x0 0x8000>;
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interrupt-parent = <&eiointc>;
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interrupts = <72>;
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status = "disabled";
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};
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uart0: serial@1ff40800 {
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compatible = "ns16550a";
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reg = <0x0 0x1ff40800 0x0 0x10>;
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clock-frequency = <100000000>;
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interrupt-parent = <&eiointc>;
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interrupts = <2>;
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no-loopback-test;
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status = "disabled";
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};
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i2c0: i2c@1ff48000 {
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compatible = "loongson,ls2k-i2c";
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reg = <0x0 0x1ff48000 0x0 0x0800>;
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interrupt-parent = <&eiointc>;
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interrupts = <14>;
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status = "disabled";
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};
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i2c@1ff48800 {
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compatible = "loongson,ls2k-i2c";
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reg = <0x0 0x1ff48800 0x0 0x0800>;
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interrupt-parent = <&eiointc>;
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interrupts = <15>;
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status = "disabled";
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};
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i2c@1ff49000 {
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compatible = "loongson,ls2k-i2c";
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reg = <0x0 0x1ff49000 0x0 0x0800>;
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interrupt-parent = <&eiointc>;
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interrupts = <16>;
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status = "disabled";
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};
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i2c@1ff49800 {
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compatible = "loongson,ls2k-i2c";
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reg = <0x0 0x1ff49800 0x0 0x0800>;
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interrupt-parent = <&eiointc>;
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interrupts = <17>;
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status = "disabled";
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};
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i2c@1ff4a000 {
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compatible = "loongson,ls2k-i2c";
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reg = <0x0 0x1ff4a000 0x0 0x0800>;
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interrupt-parent = <&eiointc>;
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interrupts = <18>;
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status = "disabled";
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};
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i2c@1ff4a800 {
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compatible = "loongson,ls2k-i2c";
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reg = <0x0 0x1ff4a800 0x0 0x0800>;
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interrupt-parent = <&eiointc>;
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interrupts = <19>;
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status = "disabled";
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};
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pmc: power-management@1ff6c000 {
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compatible = "loongson,ls2k0500-pmc", "syscon";
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reg = <0x0 0x1ff6c000 0x0 0x58>;
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interrupt-parent = <&eiointc>;
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interrupts = <56>;
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loongson,suspend-address = <0x0 0x1c000500>;
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syscon-reboot {
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compatible = "syscon-reboot";
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offset = <0x30>;
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mask = <0x1>;
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};
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syscon-poweroff {
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compatible = "syscon-poweroff";
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regmap = <&pmc>;
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offset = <0x14>;
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mask = <0x3c00>;
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value = <0x3c00>;
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};
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};
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rtc0: rtc@1ff6c100 {
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compatible = "loongson,ls2k0500-rtc", "loongson,ls7a-rtc";
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reg = <0x0 0x1ff6c100 0x0 0x100>;
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interrupt-parent = <&eiointc>;
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interrupts = <35>;
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status = "disabled";
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};
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pcie@1a000000 {
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compatible = "loongson,ls2k-pci";
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reg = <0x0 0x1a000000 0x0 0x02000000>,
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<0xfe 0x0 0x0 0x20000000>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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bus-range = <0x0 0x5>;
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ranges = <0x01000000 0x0 0x00004000 0x0 0x16404000 0x0 0x00004000>,
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<0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
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pcie@0,0 {
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reg = <0x0000 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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interrupt-parent = <&eiointc>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0x0 0x0 0x0 0x0>;
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interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 81>;
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ranges;
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};
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pcie@1,0 {
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reg = <0x0800 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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interrupt-parent = <&eiointc>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0x0 0x0 0x0 0x0>;
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interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 82>;
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ranges;
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};
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};
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};
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};

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