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Marc Zyngieroupton
Marc Zyngier
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oupton
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KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations
Latest kid on the block: NXS (Non-eXtra-Slow) TLBI operations. Let's add those in bulk (NSH, ISH, OSH, both normal and range) as they directly map to their XS (the standard ones) counterparts. Not a lot to say about them, they are basically useless. Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Oliver Upton <[email protected]>
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‎arch/arm64/kvm/hyp/vhe/tlb.c

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -227,6 +227,7 @@ void __kvm_flush_vm_context(void)
227227
* - a TLBI targeting EL2 S1 is remapped to EL1 S1
228228
* - a non-shareable TLBI is upgraded to being inner-shareable
229229
* - an outer-shareable TLBI is also mapped to inner-shareable
230+
* - an nXS TLBI is upgraded to XS
230231
*/
231232
int __kvm_tlbi_s1e2(struct kvm_s2_mmu *mmu, u64 va, u64 sys_encoding)
232233
{
@@ -250,6 +251,12 @@ int __kvm_tlbi_s1e2(struct kvm_s2_mmu *mmu, u64 va, u64 sys_encoding)
250251
case OP_TLBI_VMALLE1:
251252
case OP_TLBI_VMALLE1IS:
252253
case OP_TLBI_VMALLE1OS:
254+
case OP_TLBI_ALLE2NXS:
255+
case OP_TLBI_ALLE2ISNXS:
256+
case OP_TLBI_ALLE2OSNXS:
257+
case OP_TLBI_VMALLE1NXS:
258+
case OP_TLBI_VMALLE1ISNXS:
259+
case OP_TLBI_VMALLE1OSNXS:
253260
__tlbi(vmalle1is);
254261
break;
255262
case OP_TLBI_VAE2:
@@ -258,6 +265,12 @@ int __kvm_tlbi_s1e2(struct kvm_s2_mmu *mmu, u64 va, u64 sys_encoding)
258265
case OP_TLBI_VAE1:
259266
case OP_TLBI_VAE1IS:
260267
case OP_TLBI_VAE1OS:
268+
case OP_TLBI_VAE2NXS:
269+
case OP_TLBI_VAE2ISNXS:
270+
case OP_TLBI_VAE2OSNXS:
271+
case OP_TLBI_VAE1NXS:
272+
case OP_TLBI_VAE1ISNXS:
273+
case OP_TLBI_VAE1OSNXS:
261274
__tlbi(vae1is, va);
262275
break;
263276
case OP_TLBI_VALE2:
@@ -266,21 +279,36 @@ int __kvm_tlbi_s1e2(struct kvm_s2_mmu *mmu, u64 va, u64 sys_encoding)
266279
case OP_TLBI_VALE1:
267280
case OP_TLBI_VALE1IS:
268281
case OP_TLBI_VALE1OS:
282+
case OP_TLBI_VALE2NXS:
283+
case OP_TLBI_VALE2ISNXS:
284+
case OP_TLBI_VALE2OSNXS:
285+
case OP_TLBI_VALE1NXS:
286+
case OP_TLBI_VALE1ISNXS:
287+
case OP_TLBI_VALE1OSNXS:
269288
__tlbi(vale1is, va);
270289
break;
271290
case OP_TLBI_ASIDE1:
272291
case OP_TLBI_ASIDE1IS:
273292
case OP_TLBI_ASIDE1OS:
293+
case OP_TLBI_ASIDE1NXS:
294+
case OP_TLBI_ASIDE1ISNXS:
295+
case OP_TLBI_ASIDE1OSNXS:
274296
__tlbi(aside1is, va);
275297
break;
276298
case OP_TLBI_VAAE1:
277299
case OP_TLBI_VAAE1IS:
278300
case OP_TLBI_VAAE1OS:
301+
case OP_TLBI_VAAE1NXS:
302+
case OP_TLBI_VAAE1ISNXS:
303+
case OP_TLBI_VAAE1OSNXS:
279304
__tlbi(vaae1is, va);
280305
break;
281306
case OP_TLBI_VAALE1:
282307
case OP_TLBI_VAALE1IS:
283308
case OP_TLBI_VAALE1OS:
309+
case OP_TLBI_VAALE1NXS:
310+
case OP_TLBI_VAALE1ISNXS:
311+
case OP_TLBI_VAALE1OSNXS:
284312
__tlbi(vaale1is, va);
285313
break;
286314
case OP_TLBI_RVAE2:
@@ -289,6 +317,12 @@ int __kvm_tlbi_s1e2(struct kvm_s2_mmu *mmu, u64 va, u64 sys_encoding)
289317
case OP_TLBI_RVAE1:
290318
case OP_TLBI_RVAE1IS:
291319
case OP_TLBI_RVAE1OS:
320+
case OP_TLBI_RVAE2NXS:
321+
case OP_TLBI_RVAE2ISNXS:
322+
case OP_TLBI_RVAE2OSNXS:
323+
case OP_TLBI_RVAE1NXS:
324+
case OP_TLBI_RVAE1ISNXS:
325+
case OP_TLBI_RVAE1OSNXS:
292326
__tlbi(rvae1is, va);
293327
break;
294328
case OP_TLBI_RVALE2:
@@ -297,16 +331,28 @@ int __kvm_tlbi_s1e2(struct kvm_s2_mmu *mmu, u64 va, u64 sys_encoding)
297331
case OP_TLBI_RVALE1:
298332
case OP_TLBI_RVALE1IS:
299333
case OP_TLBI_RVALE1OS:
334+
case OP_TLBI_RVALE2NXS:
335+
case OP_TLBI_RVALE2ISNXS:
336+
case OP_TLBI_RVALE2OSNXS:
337+
case OP_TLBI_RVALE1NXS:
338+
case OP_TLBI_RVALE1ISNXS:
339+
case OP_TLBI_RVALE1OSNXS:
300340
__tlbi(rvale1is, va);
301341
break;
302342
case OP_TLBI_RVAAE1:
303343
case OP_TLBI_RVAAE1IS:
304344
case OP_TLBI_RVAAE1OS:
345+
case OP_TLBI_RVAAE1NXS:
346+
case OP_TLBI_RVAAE1ISNXS:
347+
case OP_TLBI_RVAAE1OSNXS:
305348
__tlbi(rvaae1is, va);
306349
break;
307350
case OP_TLBI_RVAALE1:
308351
case OP_TLBI_RVAALE1IS:
309352
case OP_TLBI_RVAALE1OS:
353+
case OP_TLBI_RVAALE1NXS:
354+
case OP_TLBI_RVAALE1ISNXS:
355+
case OP_TLBI_RVAALE1OSNXS:
310356
__tlbi(rvaale1is, va);
311357
break;
312358
default:

‎arch/arm64/kvm/sys_regs.c

Lines changed: 73 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3046,6 +3046,42 @@ static struct sys_reg_desc sys_insn_descs[] = {
30463046
SYS_INSN(TLBI_VALE1, handle_tlbi_el1),
30473047
SYS_INSN(TLBI_VAALE1, handle_tlbi_el1),
30483048

3049+
SYS_INSN(TLBI_VMALLE1OSNXS, handle_tlbi_el1),
3050+
SYS_INSN(TLBI_VAE1OSNXS, handle_tlbi_el1),
3051+
SYS_INSN(TLBI_ASIDE1OSNXS, handle_tlbi_el1),
3052+
SYS_INSN(TLBI_VAAE1OSNXS, handle_tlbi_el1),
3053+
SYS_INSN(TLBI_VALE1OSNXS, handle_tlbi_el1),
3054+
SYS_INSN(TLBI_VAALE1OSNXS, handle_tlbi_el1),
3055+
3056+
SYS_INSN(TLBI_RVAE1ISNXS, handle_tlbi_el1),
3057+
SYS_INSN(TLBI_RVAAE1ISNXS, handle_tlbi_el1),
3058+
SYS_INSN(TLBI_RVALE1ISNXS, handle_tlbi_el1),
3059+
SYS_INSN(TLBI_RVAALE1ISNXS, handle_tlbi_el1),
3060+
3061+
SYS_INSN(TLBI_VMALLE1ISNXS, handle_tlbi_el1),
3062+
SYS_INSN(TLBI_VAE1ISNXS, handle_tlbi_el1),
3063+
SYS_INSN(TLBI_ASIDE1ISNXS, handle_tlbi_el1),
3064+
SYS_INSN(TLBI_VAAE1ISNXS, handle_tlbi_el1),
3065+
SYS_INSN(TLBI_VALE1ISNXS, handle_tlbi_el1),
3066+
SYS_INSN(TLBI_VAALE1ISNXS, handle_tlbi_el1),
3067+
3068+
SYS_INSN(TLBI_RVAE1OSNXS, handle_tlbi_el1),
3069+
SYS_INSN(TLBI_RVAAE1OSNXS, handle_tlbi_el1),
3070+
SYS_INSN(TLBI_RVALE1OSNXS, handle_tlbi_el1),
3071+
SYS_INSN(TLBI_RVAALE1OSNXS, handle_tlbi_el1),
3072+
3073+
SYS_INSN(TLBI_RVAE1NXS, handle_tlbi_el1),
3074+
SYS_INSN(TLBI_RVAAE1NXS, handle_tlbi_el1),
3075+
SYS_INSN(TLBI_RVALE1NXS, handle_tlbi_el1),
3076+
SYS_INSN(TLBI_RVAALE1NXS, handle_tlbi_el1),
3077+
3078+
SYS_INSN(TLBI_VMALLE1NXS, handle_tlbi_el1),
3079+
SYS_INSN(TLBI_VAE1NXS, handle_tlbi_el1),
3080+
SYS_INSN(TLBI_ASIDE1NXS, handle_tlbi_el1),
3081+
SYS_INSN(TLBI_VAAE1NXS, handle_tlbi_el1),
3082+
SYS_INSN(TLBI_VALE1NXS, handle_tlbi_el1),
3083+
SYS_INSN(TLBI_VAALE1NXS, handle_tlbi_el1),
3084+
30493085
SYS_INSN(TLBI_IPAS2E1IS, handle_ipas2e1is),
30503086
SYS_INSN(TLBI_RIPAS2E1IS, handle_ripas2e1is),
30513087
SYS_INSN(TLBI_IPAS2LE1IS, handle_ipas2e1is),
@@ -3076,6 +3112,43 @@ static struct sys_reg_desc sys_insn_descs[] = {
30763112
SYS_INSN(TLBI_RVALE2, trap_undef),
30773113
SYS_INSN(TLBI_ALLE1, handle_alle1is),
30783114
SYS_INSN(TLBI_VMALLS12E1, handle_vmalls12e1is),
3115+
3116+
SYS_INSN(TLBI_IPAS2E1ISNXS, handle_ipas2e1is),
3117+
SYS_INSN(TLBI_RIPAS2E1ISNXS, handle_ripas2e1is),
3118+
SYS_INSN(TLBI_IPAS2LE1ISNXS, handle_ipas2e1is),
3119+
SYS_INSN(TLBI_RIPAS2LE1ISNXS, handle_ripas2e1is),
3120+
3121+
SYS_INSN(TLBI_ALLE2OSNXS, trap_undef),
3122+
SYS_INSN(TLBI_VAE2OSNXS, trap_undef),
3123+
SYS_INSN(TLBI_ALLE1OSNXS, handle_alle1is),
3124+
SYS_INSN(TLBI_VALE2OSNXS, trap_undef),
3125+
SYS_INSN(TLBI_VMALLS12E1OSNXS, handle_vmalls12e1is),
3126+
3127+
SYS_INSN(TLBI_RVAE2ISNXS, trap_undef),
3128+
SYS_INSN(TLBI_RVALE2ISNXS, trap_undef),
3129+
SYS_INSN(TLBI_ALLE2ISNXS, trap_undef),
3130+
SYS_INSN(TLBI_VAE2ISNXS, trap_undef),
3131+
3132+
SYS_INSN(TLBI_ALLE1ISNXS, handle_alle1is),
3133+
SYS_INSN(TLBI_VALE2ISNXS, trap_undef),
3134+
SYS_INSN(TLBI_VMALLS12E1ISNXS, handle_vmalls12e1is),
3135+
SYS_INSN(TLBI_IPAS2E1OSNXS, handle_ipas2e1is),
3136+
SYS_INSN(TLBI_IPAS2E1NXS, handle_ipas2e1is),
3137+
SYS_INSN(TLBI_RIPAS2E1NXS, handle_ripas2e1is),
3138+
SYS_INSN(TLBI_RIPAS2E1OSNXS, handle_ripas2e1is),
3139+
SYS_INSN(TLBI_IPAS2LE1OSNXS, handle_ipas2e1is),
3140+
SYS_INSN(TLBI_IPAS2LE1NXS, handle_ipas2e1is),
3141+
SYS_INSN(TLBI_RIPAS2LE1NXS, handle_ripas2e1is),
3142+
SYS_INSN(TLBI_RIPAS2LE1OSNXS, handle_ripas2e1is),
3143+
SYS_INSN(TLBI_RVAE2OSNXS, trap_undef),
3144+
SYS_INSN(TLBI_RVALE2OSNXS, trap_undef),
3145+
SYS_INSN(TLBI_RVAE2NXS, trap_undef),
3146+
SYS_INSN(TLBI_RVALE2NXS, trap_undef),
3147+
SYS_INSN(TLBI_ALLE2NXS, trap_undef),
3148+
SYS_INSN(TLBI_VAE2NXS, trap_undef),
3149+
SYS_INSN(TLBI_ALLE1NXS, handle_alle1is),
3150+
SYS_INSN(TLBI_VALE2NXS, trap_undef),
3151+
SYS_INSN(TLBI_VMALLS12E1NXS, handle_vmalls12e1is),
30793152
};
30803153

30813154
static const struct sys_reg_desc *first_idreg;

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