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Merge tag 'drm-fixes-2025-02-14' of https://gitlab.freedesktop.org/drm/kernel
Pull drm fixes from Dave Airlie: "Weekly drm fixes pull request, nothing too unusual, the hdmi tests needs a bit of refactoring after lockdep shouted at them, otherwise amdgpu and xe lead and a few misc otherwise. amdgpu: - Fix shutdown regression on old APUs - Fix compute queue hang on gfx9 APUs - Fix possible invalid access in PSP failure path - Avoid possible buffer overflow in pptable override amdkfd: - Properly free gang bo in failure path - GFX12 trap handler fix i915: - selftest fix: avoid using uninitialized context xe: - Remove bo->clients out of bos_lock area - Carve out wopcm portion from the stolen memory tests: - fix lockdep with hdmi infrastructure tests host1x: - fix uninitialised mutex usage panthor: - fix uninit variable hibmc: - fix missing Kconfig select" * tag 'drm-fixes-2025-02-14' of https://gitlab.freedesktop.org/drm/kernel: drm: Fix DSC BPP increment decoding drm/amdgpu: avoid buffer overflow attach in smu_sys_set_pp_table() drm/amdkfd: Ensure consistent barrier state saved in gfx12 trap handler drm/amdgpu: bail out when failed to load fw in psp_init_cap_microcode() amdkfd: properly free gang_ctx_bo when failed to init user queue drm/amdgpu: bump version for RV/PCO compute fix drm/amdgpu/gfx9: manually control gfxoff for CS on RV drm/amdgpu/pm: fix UVD handing in amdgpu_dpm_set_powergating_by_smu() drm/xe: Carve out wopcm portion from the stolen memory drm/i915/selftests: avoid using uninitialized context drm/xe/client: bo->client does not need bos_lock drm/hisilicon/hibmc: select CONFIG_DRM_DISPLAY_DP_HELPER drm/panthor: avoid garbage value in panthor_ioctl_dev_query() gpu: host1x: Fix a use of uninitialized mutex drm/tests: hdmi: Fix recursive locking drm/tests: hdmi: Reorder DRM entities variables assignment drm/tests: hdmi: Remove redundant assignments drm/tests: hdmi: Fix WW_MUTEX_SLOWPATH failures
2 parents 68763b2 + 04485cc commit 128c8f9

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-136
lines changed

18 files changed

+192
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lines changed

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -120,9 +120,10 @@
120120
* - 3.58.0 - Add GFX12 DCC support
121121
* - 3.59.0 - Cleared VRAM
122122
* - 3.60.0 - Add AMDGPU_TILING_GFX12_DCC_WRITE_COMPRESS_DISABLE (Vulkan requirement)
123+
* - 3.61.0 - Contains fix for RV/PCO compute queues
123124
*/
124125
#define KMS_DRIVER_MAJOR 3
125-
#define KMS_DRIVER_MINOR 60
126+
#define KMS_DRIVER_MINOR 61
126127
#define KMS_DRIVER_PATCHLEVEL 0
127128

128129
/*

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3815,9 +3815,10 @@ int psp_init_cap_microcode(struct psp_context *psp, const char *chip_name)
38153815
if (err == -ENODEV) {
38163816
dev_warn(adev->dev, "cap microcode does not exist, skip\n");
38173817
err = 0;
3818-
goto out;
3818+
} else {
3819+
dev_err(adev->dev, "fail to initialize cap microcode\n");
38193820
}
3820-
dev_err(adev->dev, "fail to initialize cap microcode\n");
3821+
goto out;
38213822
}
38223823

38233824
info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CAP];

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

Lines changed: 34 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7437,6 +7437,38 @@ static void gfx_v9_0_ring_emit_cleaner_shader(struct amdgpu_ring *ring)
74377437
amdgpu_ring_write(ring, 0); /* RESERVED field, programmed to zero */
74387438
}
74397439

7440+
static void gfx_v9_0_ring_begin_use_compute(struct amdgpu_ring *ring)
7441+
{
7442+
struct amdgpu_device *adev = ring->adev;
7443+
struct amdgpu_ip_block *gfx_block =
7444+
amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_GFX);
7445+
7446+
amdgpu_gfx_enforce_isolation_ring_begin_use(ring);
7447+
7448+
/* Raven and PCO APUs seem to have stability issues
7449+
* with compute and gfxoff and gfx pg. Disable gfx pg during
7450+
* submission and allow again afterwards.
7451+
*/
7452+
if (gfx_block && amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 1, 0))
7453+
gfx_v9_0_set_powergating_state(gfx_block, AMD_PG_STATE_UNGATE);
7454+
}
7455+
7456+
static void gfx_v9_0_ring_end_use_compute(struct amdgpu_ring *ring)
7457+
{
7458+
struct amdgpu_device *adev = ring->adev;
7459+
struct amdgpu_ip_block *gfx_block =
7460+
amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_GFX);
7461+
7462+
/* Raven and PCO APUs seem to have stability issues
7463+
* with compute and gfxoff and gfx pg. Disable gfx pg during
7464+
* submission and allow again afterwards.
7465+
*/
7466+
if (gfx_block && amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 1, 0))
7467+
gfx_v9_0_set_powergating_state(gfx_block, AMD_PG_STATE_GATE);
7468+
7469+
amdgpu_gfx_enforce_isolation_ring_end_use(ring);
7470+
}
7471+
74407472
static const struct amd_ip_funcs gfx_v9_0_ip_funcs = {
74417473
.name = "gfx_v9_0",
74427474
.early_init = gfx_v9_0_early_init,
@@ -7613,8 +7645,8 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_compute = {
76137645
.emit_wave_limit = gfx_v9_0_emit_wave_limit,
76147646
.reset = gfx_v9_0_reset_kcq,
76157647
.emit_cleaner_shader = gfx_v9_0_ring_emit_cleaner_shader,
7616-
.begin_use = amdgpu_gfx_enforce_isolation_ring_begin_use,
7617-
.end_use = amdgpu_gfx_enforce_isolation_ring_end_use,
7648+
.begin_use = gfx_v9_0_ring_begin_use_compute,
7649+
.end_use = gfx_v9_0_ring_end_use_compute,
76187650
};
76197651

76207652
static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_kiq = {

drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4121,7 +4121,8 @@ static const uint32_t cwsr_trap_gfx12_hex[] = {
41214121
0x0000ffff, 0x8bfe7e7e,
41224122
0x8bea6a6a, 0xb97af804,
41234123
0xbe804ec2, 0xbf94fffe,
4124-
0xbe804a6c, 0xbfb10000,
4124+
0xbe804a6c, 0xbe804ec2,
4125+
0xbf94fffe, 0xbfb10000,
41254126
0xbf9f0000, 0xbf9f0000,
41264127
0xbf9f0000, 0xbf9f0000,
41274128
0xbf9f0000, 0x00000000,

drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx12.asm

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1049,6 +1049,10 @@ L_SKIP_BARRIER_RESTORE:
10491049
s_rfe_b64 s_restore_pc_lo //Return to the main shader program and resume execution
10501050

10511051
L_END_PGM:
1052+
// Make sure that no wave of the workgroup can exit the trap handler
1053+
// before the workgroup barrier state is saved.
1054+
s_barrier_signal -2
1055+
s_barrier_wait -2
10521056
s_endpgm_saved
10531057
end
10541058

drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -300,7 +300,7 @@ static int init_user_queue(struct process_queue_manager *pqm,
300300
return 0;
301301

302302
free_gang_ctx_bo:
303-
amdgpu_amdkfd_free_gtt_mem(dev->adev, (*q)->gang_ctx_bo);
303+
amdgpu_amdkfd_free_gtt_mem(dev->adev, &(*q)->gang_ctx_bo);
304304
cleanup:
305305
uninit_queue(*q);
306306
*q = NULL;

drivers/gpu/drm/amd/pm/amdgpu_dpm.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,7 @@ int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev,
7878
int ret = 0;
7979
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
8080
enum ip_power_state pwr_state = gate ? POWER_STATE_OFF : POWER_STATE_ON;
81-
bool is_vcn = (block_type == AMD_IP_BLOCK_TYPE_UVD || block_type == AMD_IP_BLOCK_TYPE_VCN);
81+
bool is_vcn = block_type == AMD_IP_BLOCK_TYPE_VCN;
8282

8383
if (atomic_read(&adev->pm.pwr_state[block_type]) == pwr_state &&
8484
(!is_vcn || adev->vcn.num_vcn_inst == 1)) {

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -612,7 +612,8 @@ static int smu_sys_set_pp_table(void *handle,
612612
return -EIO;
613613
}
614614

615-
if (!smu_table->hardcode_pptable) {
615+
if (!smu_table->hardcode_pptable || smu_table->power_play_table_size < size) {
616+
kfree(smu_table->hardcode_pptable);
616617
smu_table->hardcode_pptable = kzalloc(size, GFP_KERNEL);
617618
if (!smu_table->hardcode_pptable)
618619
return -ENOMEM;

drivers/gpu/drm/display/drm_dp_helper.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2544,7 +2544,7 @@ u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
25442544
{
25452545
u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT];
25462546

2547-
switch (bpp_increment_dpcd) {
2547+
switch (bpp_increment_dpcd & DP_DSC_BITS_PER_PIXEL_MASK) {
25482548
case DP_DSC_BITS_PER_PIXEL_1_16:
25492549
return 16;
25502550
case DP_DSC_BITS_PER_PIXEL_1_8:

drivers/gpu/drm/hisilicon/hibmc/Kconfig

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,8 @@ config DRM_HISI_HIBMC
44
depends on DRM && PCI
55
depends on MMU
66
select DRM_CLIENT_SELECTION
7+
select DRM_DISPLAY_HELPER
8+
select DRM_DISPLAY_DP_HELPER
79
select DRM_KMS_HELPER
810
select DRM_VRAM_HELPER
911
select DRM_TTM

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