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candicelicyalexdeucher
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drm/amdgpu: Add nps_mode in RAS init_flag
Add nps_mode in RAS init_flag. Signed-off-by: Candice Li <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

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@@ -1834,6 +1834,9 @@ int psp_ras_initialize(struct psp_context *psp)
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ras_cmd->ras_in_message.init_flags.xcc_mask =
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adev->gfx.xcc_mask;
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ras_cmd->ras_in_message.init_flags.channel_dis_num = hweight32(adev->gmc.m_half_use) * 2;
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if (adev->gmc.gmc_funcs->query_mem_partition_mode)
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ras_cmd->ras_in_message.init_flags.nps_mode =
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adev->gmc.gmc_funcs->query_mem_partition_mode(adev);
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ret = psp_ta_load(psp, &psp->ras_context.context);
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drivers/gpu/drm/amd/amdgpu/ta_ras_if.h

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@@ -113,6 +113,14 @@ enum ta_ras_address_type {
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TA_RAS_PA_TO_MCA,
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};
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enum ta_ras_nps_mode {
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TA_RAS_UNKNOWN_MODE = 0,
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TA_RAS_NPS1_MODE = 1,
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TA_RAS_NPS2_MODE = 2,
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TA_RAS_NPS4_MODE = 4,
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TA_RAS_NPS8_MODE = 8,
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};
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/* Input/output structures for RAS commands */
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/**********************************************************/
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@@ -139,6 +147,7 @@ struct ta_ras_init_flags {
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uint8_t dgpu_mode;
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uint16_t xcc_mask;
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uint8_t channel_dis_num;
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uint8_t nps_mode;
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};
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struct ta_ras_mca_addr {

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