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Ben Skeggs
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drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_core_set()
Signed-off-by: Ben Skeggs <[email protected]> Reviewed-by: Lyude Paul <[email protected]>
1 parent a66a096 commit 1302634

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3 files changed

+76
-32
lines changed

3 files changed

+76
-32
lines changed

‎drivers/gpu/drm/nouveau/dispnv50/head507d.c

Lines changed: 28 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -194,16 +194,30 @@ head507d_core_set(struct nv50_head *head, struct nv50_head_atom *asyh)
194194
if ((ret = PUSH_WAIT(push, 9)))
195195
return ret;
196196

197-
PUSH_NVSQ(push, NV507D, 0x0860 + (i * 0x400), asyh->core.offset >> 8);
198-
PUSH_NVSQ(push, NV507D, 0x0868 + (i * 0x400), asyh->core.h << 16 | asyh->core.w,
199-
0x086c + (i * 0x400), asyh->core.layout << 20 |
200-
(asyh->core.pitch >> 8) << 8 |
201-
asyh->core.blocks << 8 |
202-
asyh->core.blockh,
203-
0x0870 + (i * 0x400), asyh->core.kind << 16 |
204-
asyh->core.format << 8,
205-
0x0874 + (i * 0x400), asyh->core.handle);
206-
PUSH_NVSQ(push, NV507D, 0x08c0 + (i * 0x400), asyh->core.y << 16 | asyh->core.x);
197+
PUSH_MTHD(push, NV507D, HEAD_SET_OFFSET(i, 0),
198+
NVVAL(NV507D, HEAD_SET_OFFSET, ORIGIN, asyh->core.offset >> 8));
199+
200+
PUSH_MTHD(push, NV507D, HEAD_SET_SIZE(i),
201+
NVVAL(NV507D, HEAD_SET_SIZE, WIDTH, asyh->core.w) |
202+
NVVAL(NV507D, HEAD_SET_SIZE, HEIGHT, asyh->core.h),
203+
204+
HEAD_SET_STORAGE(i),
205+
NVVAL(NV507D, HEAD_SET_STORAGE, BLOCK_HEIGHT, asyh->core.blockh) |
206+
NVVAL(NV507D, HEAD_SET_STORAGE, PITCH, asyh->core.pitch >> 8) |
207+
NVVAL(NV507D, HEAD_SET_STORAGE, PITCH, asyh->core.blocks) |
208+
NVVAL(NV507D, HEAD_SET_STORAGE, MEMORY_LAYOUT, asyh->core.layout),
209+
210+
HEAD_SET_PARAMS(i),
211+
NVVAL(NV507D, HEAD_SET_PARAMS, FORMAT, asyh->core.format) |
212+
NVVAL(NV507D, HEAD_SET_PARAMS, KIND, asyh->core.kind) |
213+
NVDEF(NV507D, HEAD_SET_PARAMS, PART_STRIDE, PARTSTRIDE_256),
214+
215+
HEAD_SET_CONTEXT_DMA_ISO(i),
216+
NVVAL(NV507D, HEAD_SET_CONTEXT_DMA_ISO, HANDLE, asyh->core.handle));
217+
218+
PUSH_MTHD(push, NV507D, HEAD_SET_VIEWPORT_POINT_IN(i, 0),
219+
NVVAL(NV507D, HEAD_SET_VIEWPORT_POINT_IN, X, asyh->core.x) |
220+
NVVAL(NV507D, HEAD_SET_VIEWPORT_POINT_IN, Y, asyh->core.y));
207221

208222
/* EVO will complain with INVALID_STATE if we have an
209223
* active cursor and (re)specify HeadSetContextDmaIso
@@ -238,10 +252,10 @@ head507d_core_calc(struct nv50_head *head, struct nv50_head_atom *asyh)
238252
}
239253
asyh->core.handle = disp->core->chan.vram.handle;
240254
asyh->core.offset = 0;
241-
asyh->core.format = 0xcf;
242-
asyh->core.kind = 0;
243-
asyh->core.layout = 1;
244-
asyh->core.blockh = 0;
255+
asyh->core.format = NV507D_HEAD_SET_PARAMS_FORMAT_A8R8G8B8;
256+
asyh->core.kind = NV507D_HEAD_SET_PARAMS_KIND_KIND_PITCH;
257+
asyh->core.layout = NV507D_HEAD_SET_STORAGE_MEMORY_LAYOUT_PITCH;
258+
asyh->core.blockh = NV507D_HEAD_SET_STORAGE_BLOCK_HEIGHT_ONE_GOB;
245259
asyh->core.blocks = 0;
246260
asyh->core.pitch = ALIGN(asyh->core.w, 64) * 4;
247261
}

‎drivers/gpu/drm/nouveau/dispnv50/head827d.c

Lines changed: 24 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -69,15 +69,30 @@ head827d_core_set(struct nv50_head *head, struct nv50_head_atom *asyh)
6969
if ((ret = PUSH_WAIT(push, 9)))
7070
return ret;
7171

72-
PUSH_NVSQ(push, NV827D, 0x0860 + (i * 0x400), asyh->core.offset >> 8);
73-
PUSH_NVSQ(push, NV827D, 0x0868 + (i * 0x400), asyh->core.h << 16 | asyh->core.w,
74-
0x086c + (i * 0x400), asyh->core.layout << 20 |
75-
(asyh->core.pitch >> 8) << 8 |
76-
asyh->core.blocks << 8 |
77-
asyh->core.blockh,
78-
0x0870 + (i * 0x400), asyh->core.format << 8,
79-
0x0874 + (i * 0x400), asyh->core.handle);
80-
PUSH_NVSQ(push, NV827D, 0x08c0 + (i * 0x400), asyh->core.y << 16 | asyh->core.x);
72+
PUSH_MTHD(push, NV827D, HEAD_SET_OFFSET(i, 0),
73+
NVVAL(NV827D, HEAD_SET_OFFSET, ORIGIN, asyh->core.offset >> 8));
74+
75+
PUSH_MTHD(push, NV827D, HEAD_SET_SIZE(i),
76+
NVVAL(NV827D, HEAD_SET_SIZE, WIDTH, asyh->core.w) |
77+
NVVAL(NV827D, HEAD_SET_SIZE, HEIGHT, asyh->core.h),
78+
79+
HEAD_SET_STORAGE(i),
80+
NVVAL(NV827D, HEAD_SET_STORAGE, BLOCK_HEIGHT, asyh->core.blockh) |
81+
NVVAL(NV827D, HEAD_SET_STORAGE, PITCH, asyh->core.pitch >> 8) |
82+
NVVAL(NV827D, HEAD_SET_STORAGE, PITCH, asyh->core.blocks) |
83+
NVVAL(NV827D, HEAD_SET_STORAGE, MEMORY_LAYOUT, asyh->core.layout),
84+
85+
HEAD_SET_PARAMS(i),
86+
NVVAL(NV827D, HEAD_SET_PARAMS, FORMAT, asyh->core.format) |
87+
NVDEF(NV827D, HEAD_SET_PARAMS, SUPER_SAMPLE, X1_AA) |
88+
NVDEF(NV827D, HEAD_SET_PARAMS, GAMMA, LINEAR),
89+
90+
HEAD_SET_CONTEXT_DMAS_ISO(i, 0),
91+
NVVAL(NV827D, HEAD_SET_CONTEXT_DMAS_ISO, HANDLE, asyh->core.handle));
92+
93+
PUSH_MTHD(push, NV827D, HEAD_SET_VIEWPORT_POINT_IN(i, 0),
94+
NVVAL(NV827D, HEAD_SET_VIEWPORT_POINT_IN, X, asyh->core.x) |
95+
NVVAL(NV827D, HEAD_SET_VIEWPORT_POINT_IN, Y, asyh->core.y));
8196
return 0;
8297
}
8398

‎drivers/gpu/drm/nouveau/dispnv50/head907d.c

Lines changed: 24 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -198,15 +198,30 @@ head907d_core_set(struct nv50_head *head, struct nv50_head_atom *asyh)
198198
if ((ret = PUSH_WAIT(push, 9)))
199199
return ret;
200200

201-
PUSH_NVSQ(push, NV907D, 0x0460 + (i * 0x300), asyh->core.offset >> 8);
202-
PUSH_NVSQ(push, NV907D, 0x0468 + (i * 0x300), asyh->core.h << 16 | asyh->core.w,
203-
0x046c + (i * 0x300), asyh->core.layout << 24 |
204-
(asyh->core.pitch >> 8) << 8 |
205-
asyh->core.blocks << 8 |
206-
asyh->core.blockh,
207-
0x0470 + (i * 0x300), asyh->core.format << 8,
208-
0x0474 + (i * 0x300), asyh->core.handle);
209-
PUSH_NVSQ(push, NV907D, 0x04b0 + (i * 0x300), asyh->core.y << 16 | asyh->core.x);
201+
PUSH_MTHD(push, NV907D, HEAD_SET_OFFSET(i),
202+
NVVAL(NV907D, HEAD_SET_OFFSET, ORIGIN, asyh->core.offset >> 8));
203+
204+
PUSH_MTHD(push, NV907D, HEAD_SET_SIZE(i),
205+
NVVAL(NV907D, HEAD_SET_SIZE, WIDTH, asyh->core.w) |
206+
NVVAL(NV907D, HEAD_SET_SIZE, HEIGHT, asyh->core.h),
207+
208+
HEAD_SET_STORAGE(i),
209+
NVVAL(NV907D, HEAD_SET_STORAGE, BLOCK_HEIGHT, asyh->core.blockh) |
210+
NVVAL(NV907D, HEAD_SET_STORAGE, PITCH, asyh->core.pitch >> 8) |
211+
NVVAL(NV907D, HEAD_SET_STORAGE, PITCH, asyh->core.blocks) |
212+
NVVAL(NV907D, HEAD_SET_STORAGE, MEMORY_LAYOUT, asyh->core.layout),
213+
214+
HEAD_SET_PARAMS(i),
215+
NVVAL(NV907D, HEAD_SET_PARAMS, FORMAT, asyh->core.format) |
216+
NVDEF(NV907D, HEAD_SET_PARAMS, SUPER_SAMPLE, X1_AA) |
217+
NVDEF(NV907D, HEAD_SET_PARAMS, GAMMA, LINEAR),
218+
219+
HEAD_SET_CONTEXT_DMAS_ISO(i),
220+
NVVAL(NV907D, HEAD_SET_CONTEXT_DMAS_ISO, HANDLE, asyh->core.handle));
221+
222+
PUSH_MTHD(push, NV907D, HEAD_SET_VIEWPORT_POINT_IN(i),
223+
NVVAL(NV907D, HEAD_SET_VIEWPORT_POINT_IN, X, asyh->core.x) |
224+
NVVAL(NV907D, HEAD_SET_VIEWPORT_POINT_IN, Y, asyh->core.y));
210225
return 0;
211226
}
212227

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