|
37 | 37 | enum {
|
38 | 38 | IOMMUFD_CMD_BASE = 0x80,
|
39 | 39 | IOMMUFD_CMD_DESTROY = IOMMUFD_CMD_BASE,
|
40 |
| - IOMMUFD_CMD_IOAS_ALLOC, |
41 |
| - IOMMUFD_CMD_IOAS_ALLOW_IOVAS, |
42 |
| - IOMMUFD_CMD_IOAS_COPY, |
43 |
| - IOMMUFD_CMD_IOAS_IOVA_RANGES, |
44 |
| - IOMMUFD_CMD_IOAS_MAP, |
45 |
| - IOMMUFD_CMD_IOAS_UNMAP, |
46 |
| - IOMMUFD_CMD_OPTION, |
47 |
| - IOMMUFD_CMD_VFIO_IOAS, |
48 |
| - IOMMUFD_CMD_HWPT_ALLOC, |
49 |
| - IOMMUFD_CMD_GET_HW_INFO, |
50 |
| - IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING, |
51 |
| - IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP, |
52 |
| - IOMMUFD_CMD_HWPT_INVALIDATE, |
53 |
| - IOMMUFD_CMD_FAULT_QUEUE_ALLOC, |
| 40 | + IOMMUFD_CMD_IOAS_ALLOC = 0x81, |
| 41 | + IOMMUFD_CMD_IOAS_ALLOW_IOVAS = 0x82, |
| 42 | + IOMMUFD_CMD_IOAS_COPY = 0x83, |
| 43 | + IOMMUFD_CMD_IOAS_IOVA_RANGES = 0x84, |
| 44 | + IOMMUFD_CMD_IOAS_MAP = 0x85, |
| 45 | + IOMMUFD_CMD_IOAS_UNMAP = 0x86, |
| 46 | + IOMMUFD_CMD_OPTION = 0x87, |
| 47 | + IOMMUFD_CMD_VFIO_IOAS = 0x88, |
| 48 | + IOMMUFD_CMD_HWPT_ALLOC = 0x89, |
| 49 | + IOMMUFD_CMD_GET_HW_INFO = 0x8a, |
| 50 | + IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING = 0x8b, |
| 51 | + IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP = 0x8c, |
| 52 | + IOMMUFD_CMD_HWPT_INVALIDATE = 0x8d, |
| 53 | + IOMMUFD_CMD_FAULT_QUEUE_ALLOC = 0x8e, |
54 | 54 | };
|
55 | 55 |
|
56 | 56 | /**
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@@ -400,8 +400,8 @@ struct iommu_hwpt_vtd_s1 {
|
400 | 400 | * @IOMMU_HWPT_DATA_VTD_S1: Intel VT-d stage-1 page table
|
401 | 401 | */
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402 | 402 | enum iommu_hwpt_data_type {
|
403 |
| - IOMMU_HWPT_DATA_NONE, |
404 |
| - IOMMU_HWPT_DATA_VTD_S1, |
| 403 | + IOMMU_HWPT_DATA_NONE = 0, |
| 404 | + IOMMU_HWPT_DATA_VTD_S1 = 1, |
405 | 405 | };
|
406 | 406 |
|
407 | 407 | /**
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@@ -491,8 +491,8 @@ struct iommu_hw_info_vtd {
|
491 | 491 | * @IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type
|
492 | 492 | */
|
493 | 493 | enum iommu_hw_info_type {
|
494 |
| - IOMMU_HW_INFO_TYPE_NONE, |
495 |
| - IOMMU_HW_INFO_TYPE_INTEL_VTD, |
| 494 | + IOMMU_HW_INFO_TYPE_NONE = 0, |
| 495 | + IOMMU_HW_INFO_TYPE_INTEL_VTD = 1, |
496 | 496 | };
|
497 | 497 |
|
498 | 498 | /**
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@@ -629,7 +629,7 @@ struct iommu_hwpt_get_dirty_bitmap {
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629 | 629 | * @IOMMU_HWPT_INVALIDATE_DATA_VTD_S1: Invalidation data for VTD_S1
|
630 | 630 | */
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631 | 631 | enum iommu_hwpt_invalidate_data_type {
|
632 |
| - IOMMU_HWPT_INVALIDATE_DATA_VTD_S1, |
| 632 | + IOMMU_HWPT_INVALIDATE_DATA_VTD_S1 = 0, |
633 | 633 | };
|
634 | 634 |
|
635 | 635 | /**
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@@ -768,7 +768,7 @@ struct iommu_hwpt_pgfault {
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768 | 768 | */
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769 | 769 | enum iommufd_page_response_code {
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770 | 770 | IOMMUFD_PAGE_RESP_SUCCESS = 0,
|
771 |
| - IOMMUFD_PAGE_RESP_INVALID, |
| 771 | + IOMMUFD_PAGE_RESP_INVALID = 1, |
772 | 772 | };
|
773 | 773 |
|
774 | 774 | /**
|
|
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