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LoongArch: KVM: Implement handle gspr exception
Implement kvm handle gspr exception interface, including emulate the reading and writing of cpucfg, csr, iocsr resource. Reviewed-by: Bibo Mao <[email protected]> Tested-by: Huacai Chen <[email protected]> Signed-off-by: Tianrui Zhao <[email protected]> Signed-off-by: Huacai Chen <[email protected]>
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arch/loongarch/kvm/exit.c

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@@ -214,3 +214,110 @@ int kvm_emu_idle(struct kvm_vcpu *vcpu)
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return EMULATE_DONE;
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}
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static int kvm_trap_handle_gspr(struct kvm_vcpu *vcpu)
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{
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int rd, rj;
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unsigned int index;
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unsigned long curr_pc;
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larch_inst inst;
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enum emulation_result er = EMULATE_DONE;
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struct kvm_run *run = vcpu->run;
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/* Fetch the instruction */
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inst.word = vcpu->arch.badi;
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curr_pc = vcpu->arch.pc;
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update_pc(&vcpu->arch);
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trace_kvm_exit_gspr(vcpu, inst.word);
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er = EMULATE_FAIL;
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switch (((inst.word >> 24) & 0xff)) {
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case 0x0: /* CPUCFG GSPR */
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if (inst.reg2_format.opcode == 0x1B) {
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rd = inst.reg2_format.rd;
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rj = inst.reg2_format.rj;
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++vcpu->stat.cpucfg_exits;
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index = vcpu->arch.gprs[rj];
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er = EMULATE_DONE;
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/*
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* By LoongArch Reference Manual 2.2.10.5
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* return value is 0 for undefined cpucfg index
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*/
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if (index < KVM_MAX_CPUCFG_REGS)
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vcpu->arch.gprs[rd] = vcpu->arch.cpucfg[index];
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else
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vcpu->arch.gprs[rd] = 0;
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}
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break;
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case 0x4: /* CSR{RD,WR,XCHG} GSPR */
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er = kvm_handle_csr(vcpu, inst);
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break;
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case 0x6: /* Cache, Idle and IOCSR GSPR */
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switch (((inst.word >> 22) & 0x3ff)) {
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case 0x18: /* Cache GSPR */
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er = EMULATE_DONE;
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trace_kvm_exit_cache(vcpu, KVM_TRACE_EXIT_CACHE);
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break;
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case 0x19: /* Idle/IOCSR GSPR */
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switch (((inst.word >> 15) & 0x1ffff)) {
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case 0xc90: /* IOCSR GSPR */
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er = kvm_emu_iocsr(inst, run, vcpu);
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break;
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case 0xc91: /* Idle GSPR */
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er = kvm_emu_idle(vcpu);
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break;
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default:
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er = EMULATE_FAIL;
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break;
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}
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break;
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default:
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er = EMULATE_FAIL;
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break;
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}
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break;
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default:
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er = EMULATE_FAIL;
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break;
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}
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/* Rollback PC only if emulation was unsuccessful */
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if (er == EMULATE_FAIL) {
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kvm_err("[%#lx]%s: unsupported gspr instruction 0x%08x\n",
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curr_pc, __func__, inst.word);
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kvm_arch_vcpu_dump_regs(vcpu);
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vcpu->arch.pc = curr_pc;
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}
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return er;
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}
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/*
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* Trigger GSPR:
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* 1) Execute CPUCFG instruction;
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* 2) Execute CACOP/IDLE instructions;
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* 3) Access to unimplemented CSRs/IOCSRs.
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*/
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static int kvm_handle_gspr(struct kvm_vcpu *vcpu)
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{
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int ret = RESUME_GUEST;
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enum emulation_result er = EMULATE_DONE;
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er = kvm_trap_handle_gspr(vcpu);
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if (er == EMULATE_DONE) {
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ret = RESUME_GUEST;
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} else if (er == EMULATE_DO_MMIO) {
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vcpu->run->exit_reason = KVM_EXIT_MMIO;
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ret = RESUME_HOST;
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} else if (er == EMULATE_DO_IOCSR) {
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vcpu->run->exit_reason = KVM_EXIT_LOONGARCH_IOCSR;
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ret = RESUME_HOST;
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} else {
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kvm_queue_exception(vcpu, EXCCODE_INE, 0);
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ret = RESUME_GUEST;
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}
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return ret;
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}

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