@@ -26,6 +26,7 @@ static const struct dpu_mdp_cfg sm6350_mdp = {
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[DPU_CLK_CTRL_DMA0 ] = { .reg_off = 0x2ac , .bit_off = 8 },
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[DPU_CLK_CTRL_DMA1 ] = { .reg_off = 0x2b4 , .bit_off = 8 },
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[DPU_CLK_CTRL_DMA2 ] = { .reg_off = 0x2c4 , .bit_off = 8 },
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+ [DPU_CLK_CTRL_WB2 ] = { .reg_off = 0x2bc , .bit_off = 16 },
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[DPU_CLK_CTRL_REG_DMA ] = { .reg_off = 0x2bc , .bit_off = 20 },
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},
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};
@@ -145,6 +146,21 @@ static const struct dpu_dsc_cfg sm6350_dsc[] = {
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},
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};
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+ static const struct dpu_wb_cfg sm6350_wb [] = {
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+ {
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+ .name = "wb_2" , .id = WB_2 ,
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+ .base = 0x65000 , .len = 0x2c8 ,
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+ .features = WB_SM8250_MASK ,
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+ .format_list = wb2_formats_rgb ,
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+ .num_formats = ARRAY_SIZE (wb2_formats_rgb ),
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+ .clk_ctrl = DPU_CLK_CTRL_WB2 ,
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+ .xin_id = 6 ,
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+ .vbif_idx = VBIF_RT ,
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+ .maxlinewidth = 1920 ,
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+ .intr_wb_done = DPU_IRQ_IDX (MDP_SSPP_TOP0_INTR , 4 ),
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+ },
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+ };
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+
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static const struct dpu_intf_cfg sm6350_intf [] = {
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{
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.name = "intf_0" , .id = INTF_0 ,
@@ -218,6 +234,8 @@ const struct dpu_mdss_cfg dpu_sm6350_cfg = {
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.dsc = sm6350_dsc ,
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.pingpong_count = ARRAY_SIZE (sm6350_pp ),
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.pingpong = sm6350_pp ,
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+ .wb_count = ARRAY_SIZE (sm6350_wb ),
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+ .wb = sm6350_wb ,
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.intf_count = ARRAY_SIZE (sm6350_intf ),
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.intf = sm6350_intf ,
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.vbif_count = ARRAY_SIZE (sdm845_vbif ),
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