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ALSA: emu10k1: make E-MU FPGA writes potentially more reliable
We did not delay after the second strobe signal, so another immediately following access could potentially corrupt the written value. This is a purely speculative fix with no supporting evidence, but after taking out the spinlocks around the writes, it seems plausible that a modern processor could be actually too fast. Also, it's just cleaner to be consistent. Signed-off-by: Oswald Buddenhagen <[email protected]> Signed-off-by: Takashi Iwai <[email protected]> Message-ID: <[email protected]>
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sound/pci/emu10k1/io.c

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@@ -285,6 +285,7 @@ static void snd_emu1010_fpga_write_locked(struct snd_emu10k1 *emu, u32 reg, u32
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outw(value, emu->port + A_GPIO);
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udelay(10);
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outw(value | 0x80 , emu->port + A_GPIO); /* High bit clocks the value into the fpga. */
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udelay(10);
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}
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void snd_emu1010_fpga_write(struct snd_emu10k1 *emu, u32 reg, u32 value)

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