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#define QM_DFX_COMMON_LEN 0xC3
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#define QM_DFX_REGS_LEN 4UL
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#define QM_DBG_TMP_BUF_LEN 22
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+ #define QM_XQC_ADDR_MASK GENMASK(31, 0)
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#define CURRENT_FUN_MASK GENMASK(5, 0)
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#define CURRENT_Q_MASK GENMASK(31, 16)
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#define QM_SQE_ADDR_MASK GENMASK(7, 0)
@@ -167,7 +168,6 @@ static void dump_show(struct hisi_qm *qm, void *info,
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static int qm_sqc_dump (struct hisi_qm * qm , char * s , char * name )
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{
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struct device * dev = & qm -> pdev -> dev ;
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- struct qm_sqc * sqc_curr ;
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struct qm_sqc sqc ;
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u32 qp_id ;
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int ret ;
@@ -183,16 +183,19 @@ static int qm_sqc_dump(struct hisi_qm *qm, char *s, char *name)
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ret = qm_set_and_get_xqc (qm , QM_MB_CMD_SQC , & sqc , qp_id , 1 );
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if (!ret ) {
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+ sqc .base_h = cpu_to_le32 (QM_XQC_ADDR_MASK );
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+ sqc .base_l = cpu_to_le32 (QM_XQC_ADDR_MASK );
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dump_show (qm , & sqc , sizeof (struct qm_sqc ), name );
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return 0 ;
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}
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down_read (& qm -> qps_lock );
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if (qm -> sqc ) {
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- sqc_curr = qm -> sqc + qp_id ;
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-
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- dump_show (qm , sqc_curr , sizeof (* sqc_curr ), "SOFT SQC" );
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+ memcpy (& sqc , qm -> sqc + qp_id * sizeof (struct qm_sqc ), sizeof (struct qm_sqc ));
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+ sqc .base_h = cpu_to_le32 (QM_XQC_ADDR_MASK );
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+ sqc .base_l = cpu_to_le32 (QM_XQC_ADDR_MASK );
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+ dump_show (qm , & sqc , sizeof (struct qm_sqc ), "SOFT SQC" );
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}
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up_read (& qm -> qps_lock );
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@@ -202,7 +205,6 @@ static int qm_sqc_dump(struct hisi_qm *qm, char *s, char *name)
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static int qm_cqc_dump (struct hisi_qm * qm , char * s , char * name )
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{
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struct device * dev = & qm -> pdev -> dev ;
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- struct qm_cqc * cqc_curr ;
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struct qm_cqc cqc ;
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u32 qp_id ;
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int ret ;
@@ -218,16 +220,19 @@ static int qm_cqc_dump(struct hisi_qm *qm, char *s, char *name)
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ret = qm_set_and_get_xqc (qm , QM_MB_CMD_CQC , & cqc , qp_id , 1 );
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if (!ret ) {
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+ cqc .base_h = cpu_to_le32 (QM_XQC_ADDR_MASK );
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+ cqc .base_l = cpu_to_le32 (QM_XQC_ADDR_MASK );
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dump_show (qm , & cqc , sizeof (struct qm_cqc ), name );
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return 0 ;
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}
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down_read (& qm -> qps_lock );
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if (qm -> cqc ) {
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- cqc_curr = qm -> cqc + qp_id ;
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-
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- dump_show (qm , cqc_curr , sizeof (* cqc_curr ), "SOFT CQC" );
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+ memcpy (& cqc , qm -> cqc + qp_id * sizeof (struct qm_cqc ), sizeof (struct qm_cqc ));
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+ cqc .base_h = cpu_to_le32 (QM_XQC_ADDR_MASK );
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+ cqc .base_l = cpu_to_le32 (QM_XQC_ADDR_MASK );
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+ dump_show (qm , & cqc , sizeof (struct qm_cqc ), "SOFT CQC" );
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}
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up_read (& qm -> qps_lock );
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@@ -263,6 +268,10 @@ static int qm_eqc_aeqc_dump(struct hisi_qm *qm, char *s, char *name)
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if (ret )
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return ret ;
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+ aeqc .base_h = cpu_to_le32 (QM_XQC_ADDR_MASK );
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+ aeqc .base_l = cpu_to_le32 (QM_XQC_ADDR_MASK );
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+ eqc .base_h = cpu_to_le32 (QM_XQC_ADDR_MASK );
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+ eqc .base_l = cpu_to_le32 (QM_XQC_ADDR_MASK );
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dump_show (qm , xeqc , size , name );
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return ret ;
@@ -310,10 +319,10 @@ static int q_dump_param_parse(struct hisi_qm *qm, char *s,
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static int qm_sq_dump (struct hisi_qm * qm , char * s , char * name )
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{
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- u16 sq_depth = qm -> qp_array -> cq_depth ;
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- void * sqe ;
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+ u16 sq_depth = qm -> qp_array -> sq_depth ;
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struct hisi_qp * qp ;
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u32 qp_id , sqe_id ;
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+ void * sqe ;
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int ret ;
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ret = q_dump_param_parse (qm , s , & sqe_id , & qp_id , sq_depth );
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