Skip to content

Commit 170645f

Browse files
committed
Merge tag 'arm-soc/for-6.14/devicetree-fixes' of https://github.com/Broadcom/stblinux into arm/fixes
This pull request contains Broadcom ARM-based SoCs Device Tree fixes for 6.14: - Stefan fixes the xHCI power domain on the Raspberry Pi 4 - Phil fixes the Raspberry Pi 4 PL011 UART primecell ID to indicate they are r1p5 and thus have a 32-byte FIFO * tag 'arm-soc/for-6.14/devicetree-fixes' of https://github.com/Broadcom/stblinux: ARM: dts: bcm2711: PL011 UARTs are actually r1p5 ARM: dts: bcm2711: Fix xHCI power-domain Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2 parents 7eb1721 + 0de0902 commit 170645f

File tree

2 files changed

+6
-9
lines changed

2 files changed

+6
-9
lines changed

arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
#include "bcm2835-rpi.dtsi"
33

4-
#include <dt-bindings/power/raspberrypi-power.h>
54
#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
65

76
/ {
@@ -101,7 +100,3 @@
101100
&vchiq {
102101
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
103102
};
104-
105-
&xhci {
106-
power-domains = <&power RPI_POWER_DOMAIN_USB>;
107-
};

arch/arm/boot/dts/broadcom/bcm2711.dtsi

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -134,7 +134,7 @@
134134
clocks = <&clocks BCM2835_CLOCK_UART>,
135135
<&clocks BCM2835_CLOCK_VPU>;
136136
clock-names = "uartclk", "apb_pclk";
137-
arm,primecell-periphid = <0x00241011>;
137+
arm,primecell-periphid = <0x00341011>;
138138
status = "disabled";
139139
};
140140

@@ -145,7 +145,7 @@
145145
clocks = <&clocks BCM2835_CLOCK_UART>,
146146
<&clocks BCM2835_CLOCK_VPU>;
147147
clock-names = "uartclk", "apb_pclk";
148-
arm,primecell-periphid = <0x00241011>;
148+
arm,primecell-periphid = <0x00341011>;
149149
status = "disabled";
150150
};
151151

@@ -156,7 +156,7 @@
156156
clocks = <&clocks BCM2835_CLOCK_UART>,
157157
<&clocks BCM2835_CLOCK_VPU>;
158158
clock-names = "uartclk", "apb_pclk";
159-
arm,primecell-periphid = <0x00241011>;
159+
arm,primecell-periphid = <0x00341011>;
160160
status = "disabled";
161161
};
162162

@@ -167,7 +167,7 @@
167167
clocks = <&clocks BCM2835_CLOCK_UART>,
168168
<&clocks BCM2835_CLOCK_VPU>;
169169
clock-names = "uartclk", "apb_pclk";
170-
arm,primecell-periphid = <0x00241011>;
170+
arm,primecell-periphid = <0x00341011>;
171171
status = "disabled";
172172
};
173173

@@ -610,6 +610,7 @@
610610
#address-cells = <1>;
611611
#size-cells = <0>;
612612
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
613+
power-domains = <&pm BCM2835_POWER_DOMAIN_USB>;
613614
/* DWC2 and this IP block share the same USB PHY,
614615
* enabling both at the same time results in lockups.
615616
* So keep this node disabled and let the bootloader
@@ -1177,6 +1178,7 @@
11771178
};
11781179

11791180
&uart0 {
1181+
arm,primecell-periphid = <0x00341011>;
11801182
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
11811183
};
11821184

0 commit comments

Comments
 (0)