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torvaldstorvalds
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Merge tag 'xtensa-20220523' of https://github.com/jcmvbkbc/linux-xtensa
Pull xtensa architecture updates from Max Filippov: - support coprocessors on SMP - support KCSAN - support handling protection faults in noMMU configurations - support using coprocessors in the kernel mode - support hibernation - enable context tracking - enable HAVE_VIRT_CPU_ACCOUNTING_GEN - support division by 0 exception on cores without HW division option - clean up locking in the ISS network driver - clean up kernel entry assemly code - various minor fixes * tag 'xtensa-20220523' of https://github.com/jcmvbkbc/linux-xtensa: (36 commits) xtensa: Return true/false (not 1/0) from bool function xtensa: improve call0 ABI probing xtensa: support artificial division by 0 exception xtensa: add trap handler for division by zero xtensa/simdisk: fix proc_read_simdisk() xtensa: no need to initialise statics to 0 xtensa: clean up labels in the kernel entry assembly xtensa: don't leave invalid TLB entry in fast_store_prohibited xtensa: fix declaration of _SecondaryResetVector_text_* irqchip: irq-xtensa-mx: fix initial IRQ affinity xtensa: enable ARCH_HAS_DEBUG_VM_PGTABLE xtensa: add hibernation support xtensa: support coprocessors on SMP xtensa: get rid of stack frame in coprocessor_flush xtensa: merge SAVE_CP_REGS_TAB and LOAD_CP_REGS_TAB xtensa: add xtensa_xsr macro xtensa: handle coprocessor exceptions in kernel mode xtensa: use callx0 opcode in fast_coprocessor xtensa: clean up excsave1 initialization xtensa: clean up declarations in coprocessor.h ...
2 parents d613060 + dc60001 commit 17a05c8

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32 files changed

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‎Documentation/features/debug/debug-vm-pgtable/arch-support.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -27,5 +27,5 @@
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| sparc: | TODO |
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| um: | TODO |
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| x86: | ok |
30-
| xtensa: | TODO |
30+
| xtensa: | ok |
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-----------------------

‎Documentation/features/time/context-tracking/arch-support.txt

Lines changed: 1 addition & 1 deletion
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@@ -27,5 +27,5 @@
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| sparc: | ok |
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| um: | TODO |
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| x86: | ok |
30-
| xtensa: | TODO |
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| xtensa: | ok |
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-----------------------

‎Documentation/features/time/virt-cpuacct/arch-support.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -27,5 +27,5 @@
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| sparc: | ok |
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| um: | TODO |
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| x86: | ok |
30-
| xtensa: | TODO |
30+
| xtensa: | ok |
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-----------------------

‎arch/xtensa/Kconfig

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@ config XTENSA
44
select ARCH_32BIT_OFF_T
55
select ARCH_HAS_BINFMT_FLAT if !MMU
66
select ARCH_HAS_CURRENT_STACK_POINTER
7+
select ARCH_HAS_DEBUG_VM_PGTABLE
78
select ARCH_HAS_DMA_PREP_COHERENT if MMU
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select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU
@@ -29,8 +30,10 @@ config XTENSA
2930
select HAVE_ARCH_AUDITSYSCALL
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select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
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select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL
33+
select HAVE_ARCH_KCSAN
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select HAVE_ARCH_SECCOMP_FILTER
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select HAVE_ARCH_TRACEHOOK
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select HAVE_CONTEXT_TRACKING
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select HAVE_DEBUG_KMEMLEAK
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select HAVE_DMA_CONTIGUOUS
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select HAVE_EXIT_THREAD
@@ -42,6 +45,7 @@ config XTENSA
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select HAVE_PERF_EVENTS
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select HAVE_STACKPROTECTOR
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select HAVE_SYSCALL_TRACEPOINTS
48+
select HAVE_VIRT_CPU_ACCOUNTING_GEN
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select IRQ_DOMAIN
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select MODULES_USE_ELF_RELA
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select PERF_USE_VMALLOC
@@ -79,6 +83,7 @@ config STACKTRACE_SUPPORT
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8084
config MMU
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def_bool n
86+
select PFAULT
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config HAVE_XTENSA_GPIO32
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def_bool n
@@ -178,6 +183,16 @@ config XTENSA_FAKE_NMI
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If unsure, say N.
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186+
config PFAULT
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bool "Handle protection faults" if EXPERT && !MMU
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default y
189+
help
190+
Handle protection faults. MMU configurations must enable it.
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noMMU configurations may disable it if used memory map never
192+
generates protection faults or faults are always fatal.
193+
194+
If unsure, say Y.
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181196
config XTENSA_UNALIGNED_USER
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bool "Unaligned memory access in user space"
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help
@@ -773,6 +788,9 @@ endmenu
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774789
menu "Power management options"
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791+
config ARCH_HIBERNATION_POSSIBLE
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def_bool y
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source "kernel/power/Kconfig"
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endmenu

‎arch/xtensa/boot/lib/Makefile

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Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@ CFLAGS_REMOVE_inffast.o = -pg
1616
endif
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KASAN_SANITIZE := n
19+
KCSAN_SANITIZE := n
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2021
CFLAGS_REMOVE_inflate.o += -fstack-protector -fstack-protector-strong
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CFLAGS_REMOVE_zmem.o += -fstack-protector -fstack-protector-strong

‎arch/xtensa/include/asm/barrier.h

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -11,9 +11,15 @@
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1212
#include <asm/core.h>
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14-
#define mb() ({ __asm__ __volatile__("memw" : : : "memory"); })
15-
#define rmb() barrier()
16-
#define wmb() mb()
14+
#define __mb() ({ __asm__ __volatile__("memw" : : : "memory"); })
15+
#define __rmb() barrier()
16+
#define __wmb() __mb()
17+
18+
#ifdef CONFIG_SMP
19+
#define __smp_mb() __mb()
20+
#define __smp_rmb() __rmb()
21+
#define __smp_wmb() __wmb()
22+
#endif
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#if XCHAL_HAVE_S32C1I
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#define __smp_mb__before_atomic() barrier()

‎arch/xtensa/include/asm/bitops.h

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,7 @@ static inline unsigned long __fls(unsigned long word)
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#if XCHAL_HAVE_EXCLUSIVE
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101101
#define BIT_OP(op, insn, inv) \
102-
static inline void op##_bit(unsigned int bit, volatile unsigned long *p)\
102+
static inline void arch_##op##_bit(unsigned int bit, volatile unsigned long *p)\
103103
{ \
104104
unsigned long tmp; \
105105
unsigned long mask = 1UL << (bit & 31); \
@@ -119,7 +119,7 @@ static inline void op##_bit(unsigned int bit, volatile unsigned long *p)\
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120120
#define TEST_AND_BIT_OP(op, insn, inv) \
121121
static inline int \
122-
test_and_##op##_bit(unsigned int bit, volatile unsigned long *p) \
122+
arch_test_and_##op##_bit(unsigned int bit, volatile unsigned long *p) \
123123
{ \
124124
unsigned long tmp, value; \
125125
unsigned long mask = 1UL << (bit & 31); \
@@ -142,7 +142,7 @@ test_and_##op##_bit(unsigned int bit, volatile unsigned long *p) \
142142
#elif XCHAL_HAVE_S32C1I
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144144
#define BIT_OP(op, insn, inv) \
145-
static inline void op##_bit(unsigned int bit, volatile unsigned long *p)\
145+
static inline void arch_##op##_bit(unsigned int bit, volatile unsigned long *p)\
146146
{ \
147147
unsigned long tmp, value; \
148148
unsigned long mask = 1UL << (bit & 31); \
@@ -163,7 +163,7 @@ static inline void op##_bit(unsigned int bit, volatile unsigned long *p)\
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164164
#define TEST_AND_BIT_OP(op, insn, inv) \
165165
static inline int \
166-
test_and_##op##_bit(unsigned int bit, volatile unsigned long *p) \
166+
arch_test_and_##op##_bit(unsigned int bit, volatile unsigned long *p) \
167167
{ \
168168
unsigned long tmp, value; \
169169
unsigned long mask = 1UL << (bit & 31); \
@@ -205,6 +205,8 @@ BIT_OPS(change, "xor", )
205205
#undef BIT_OP
206206
#undef TEST_AND_BIT_OP
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208+
#include <asm-generic/bitops/instrumented-atomic.h>
209+
208210
#include <asm-generic/bitops/le.h>
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210212
#include <asm-generic/bitops/ext2-atomic-setbit.h>

‎arch/xtensa/include/asm/coprocessor.h

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -142,11 +142,12 @@ typedef struct { XCHAL_CP6_SA_LIST(2) } xtregs_cp6_t
142142
typedef struct { XCHAL_CP7_SA_LIST(2) } xtregs_cp7_t
143143
__attribute__ ((aligned (XCHAL_CP7_SA_ALIGN)));
144144

145-
extern struct thread_info* coprocessor_owner[XCHAL_CP_MAX];
146-
extern void coprocessor_flush(struct thread_info*, int);
147-
148-
extern void coprocessor_release_all(struct thread_info*);
149-
extern void coprocessor_flush_all(struct thread_info*);
145+
struct thread_info;
146+
void coprocessor_flush(struct thread_info *ti, int cp_index);
147+
void coprocessor_release_all(struct thread_info *ti);
148+
void coprocessor_flush_all(struct thread_info *ti);
149+
void coprocessor_flush_release_all(struct thread_info *ti);
150+
void local_coprocessors_flush_release_all(void);
150151

151152
#endif /* XTENSA_HAVE_COPROCESSORS */
152153

‎arch/xtensa/include/asm/processor.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -246,6 +246,13 @@ extern unsigned long __get_wchan(struct task_struct *p);
246246
v; \
247247
})
248248

249+
#define xtensa_xsr(x, sr) \
250+
({ \
251+
unsigned int __v__ = (unsigned int)(x); \
252+
__asm__ __volatile__ ("xsr %0, " __stringify(sr) : "+a"(__v__)); \
253+
__v__; \
254+
})
255+
249256
#if XCHAL_HAVE_EXTERN_REGS
250257

251258
static inline void set_er(unsigned long value, unsigned long addr)

‎arch/xtensa/include/asm/sections.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@ extern char _Level5InterruptVector_text_end[];
2929
extern char _Level6InterruptVector_text_start[];
3030
extern char _Level6InterruptVector_text_end[];
3131
#endif
32-
#ifdef CONFIG_SMP
32+
#ifdef CONFIG_SECONDARY_RESET_VECTOR
3333
extern char _SecondaryResetVector_text_start[];
3434
extern char _SecondaryResetVector_text_end[];
3535
#endif

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